This PR provides implementation of ticker_free() function for the following boards:
ARCH_PRO
EV_COG_AD3029LZ
EV_COG_AD4050LZ
K22F
K64F
K82F
KW24D
KW41Z
LPC546XX
NRF51_DK
NRF52_DK
NUCLEO_F207ZG
NUCLEO_F401RE
NUCLEO_F429ZI
NUCLEO_F746ZG
REALTEK_RTL8195AM
- Disable microsecond ticker interrupt on reinitialization
- Skip us_ticker_set_interrupt() if timestamp is already past
- Eliminate tmr2Config since tmrConfig is adequate for all timer config
- fix compiler warning message of flash_api.c
- fix compiler warning message of startup_ADuCM4050.c
- eliminate absolute address of ROM tables
- add MBED_APP_START and MBED_APP_SIZE to linker scripts
- ensure us_ticker_irq_handler() is called only when GP2 timer expires
- set us_ticker_set_interrupt() time interval to be 9.846 us
- set us_ticker_fire_interrupt() time interval to be 0.03846 us
- ensure us_ticker_irq_handler() is called only when GP2 timer expires
- set us_ticker_set_interrupt() time interval to be 9.846 us
- set us_ticker_fire_interrupt() time interval to be 0.03846 us
- convert tab to space
- sector size is 0x800 bytes
- writeable unit size is 0x8 bytes
- flash start address is 0x0
- total ADuCM3029 on chip flash size is 0x40000 bytes
- total ADuCM4050 on chip flash size is 0x7F000 bytes
Set buffer for 1 sample in analogin_read_u16. Before it assumes the
buffer is set outside by the higher layer. Now it's temporarily
located on the stack since only the ADC value is returned.
Ensure all instance memory blocks meet 4 byte alignment requirement
without relying on compiler's or liker's optional settings:
- gpioMemory[] for adi_gpio_Init()
- aRtcDevMem0[] for adi_rtc_Open()
- i2c_Mem[] or I2C_Mem[] for adi_i2c_Open()
- spi_Mem0[], spi_Mem1[], spi_Mem2[] or SPI_Mem[] for adi_spi_Open()
- Maintain compatible code for ARM 5 and ARM 6 while default alignment
settings differ.
- Instance memory containing memory pointers must be 4 byte aligned for
all compilers regardless compilers' settings.
- uint32_t is recommended to replace uint8_t for instance memory
declaration because uint32_t guarantee 4 byte alignment.
Fixed issues raised from ARM PR review and removed the unsupported platform.
- Fixed an issue where the TRNG is read even though it may not be ready;
- Added configuration to ensure the buffering mode is disabled so only 8-bit bytes are generated;
- Moved the TRNG device handle into the trng_t structure.
Removed undefined spi slave related functions.
- Added error checking for trng_get_bytes function;
- Added curly brackets to single line conditions for some files;
- Changed rx and tx buffers in serial module as local variables;
- Removed some unused code and some minor formatting corrections;
- Minor i2c & spi updates for github pull request;
- Added function definition for spi_master_block_write.
Added default delay and sample times for the ADC during initialization.
- Added code to clear stack variable in trng_get_bytes upon exiting the
function;
- Remove lp ticker functionality as the timer hardware does not satisfy
lp timer requirements.
Added a check for the STUCK bit before reading the RNG data register to ensure there are no hardware faults.
- Removed .mbedignore to work around some exporter issues;
- Added #includes to some of the driver data C files for them to build on their own.
- Added curly brackets to single line conditions in gpio_qpi.c and gpio_irq_api.c;
- Changed rx and tx buffers in serial module as local variables;
- Minor i2c & spi updates for github pull request;
- Added function definition for spi_master_block_write.
- Added a configuration call in trng_init to make sure the TRNG buffering mode is disabled, so only 8-bit bytes are returned;
- Moved the TRNG device handle into the trng_t structure;
- Fixed some formatting errors in the adc driver.
Edmund Hsu
Przemyslaw Stekiel
Dave Wu