Provides basic power up / power down sequences for Quectel EC2X series
modems. Can be used in PPP mode. For using the on-board IP stack, we
will need to add and implement classes that provide context.
Driver constructor takes power and reset control pins along with the
FileHandle. A default construction is provided which can be chosen by
the application in its mbed_app.json. Otherwise the user is free to
construct as per demand.
This change moves all PDL drivers into common source and include
directories to alleviate issue with Windows version of GNU Make 4.x
maximum command line length limit.
New `target.console-uart` option added to indicate whether a target has
a console UART on STDIO_UART_TX/RX/RTS/CTS pins. (The existing option
`target.console-uart-flow-control` indicates whether RTS and or CTS is
available in addition to TX and RX).
The option defaults to true, and is currently true on all platforms. It
only applies if DEVICE_SERIAL is true, so no need to go through and mark
it false for non-SERIAL platforms.
An application can turn off target.console-uart to save ROM/power/etc if
they don't want to use the serial console. If this is turned off, the
console won't be activated for stdin/stdout, but the application is
still free to open `UARTSerial(STDIO_UART_TX, STDIO_UART_RX)`
themselves.
Since commit 12c6b1bd8, the i.MX RT1050 has effectively had its data
cache disabled, as the SDRAM was marked Shareable; for the Cortex-M7,
shareable memory is not cached.
This was done to make the Ethernet driver work without any cache
maintenance code. This commit adds cache maintenance and memory barriers
to the Ethernet driver, and removes the Shareable attribute from the
SDRAM, so the data cache is used again.
Cache code in the base fsl_enet.c driver has not been activated - the
bulk of it is in higher-level Read and Write calls that we're not using,
and there is one flawed invalidate in its initialisation. Instead
imx_emac.cpp takes full cache responsibility.
This commit also marks the SDRAM as read/write-allocate. As the
Cortex-M7 has its "Dynamic read allocate mode" to automatically switch
back to read-allocate in cases where write allocate is working poorly
(eg large memset), this should result in a performance boost with no
downside.
Activating write-allocate is also an attempt to provoke any flaws in
cache maintenance - the Ethernet transmit buffers for example will be
more likely to have a little data in the cache that needs cleaning.
FastModels are a software simulator for Arm platform/cores.
They mean to be used as a tool for testing or early prototype stage development.
Due to the nature of software simulator can't grantee the timing accuracy like HW.
So time drifting test is skipped for software models.
Make equeue_create_inplace align the passed-in buffer and size to
sizeof(void *).
Really we should be aiming to align more for ARM, as blocks should be
8-byte aligned, but the internal heap mechanisms only work to 4-byte
alignment at the moment. More work would be needed to ensure 8-byte
alignment of allocated blocks.
Projects have only ever made use of one linker script per compiler.
However, the tools would store references to multiple linker scripts in
a project and select one in a non-deterministic way. Now we clear out
any existing linker script when we add a new one to a project. This way,
the last added linker script is always used.
Hasnain Virk
Leszek Rusinowicz
paul-szczepanek-arm
Kevin Bracey
Qinghao Shi
Michal Paszta
Teppo Järvelin
Vincent Veron
Martin Kojtal
Oren Cohen
Brian Daniels
Kari Haapalehto
Ganesh Ramachandran
Aleksi Klasila
Andrii Lishchynskyi
Mahesh Mahadevan
jeromecoutant
Teemu Kultala