mirror of https://github.com/ARMmbed/mbed-os.git
Merge pull request #10267 from cy-vivekp/pr/psoc_32_bit_lp_ticker
PSOC6: Modify lp_ticker to 32 bitpull/10302/head
commit
0066ba9b0d
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@ -40,29 +40,38 @@
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#define LPT_INTERRUPT_PRIORITY 6
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#define LPT_INTERRUPT_SOURCE srss_interrupt_mcwdt_1_IRQn
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#endif
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#define LPT_MCWDT_DELAY_WAIT 0 // Recommended value is 93, but then we fail function execution time test.
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#define LPT_MCWDT_DELAY_WAIT 93 // Recommended value is 93, but then we fail function execution time test.
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#define LPT_MCWDT_DELAY_NO_WAIT 0
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#if !defined (CY_CFG_SYSCLK_CLKLF_FREQ_HZ)
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#define CY_CFG_SYSCLK_CLKLF_FREQ_HZ 32768UL /* Default to 32K ILO */
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#endif /* CY_CFG_SYSCLK_CLKLF_FREQ_HZ */
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#define MCWDT_COUNTER0_MAX_COUNT (0xffffUL)
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#define MCWDT_COUNTER1_MAX_COUNT (0xffffUL)
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#define MCWDT_COUNTER2_MAX_COUNT (0xffffffffUL)
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#define MAX_MCWDT_DURATION_SEC (35UL*60UL*60UL*1000UL)
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#define PLATFORM_MAX_DEEP_SLEEP_TICKS (MAX_MCWDT_DURATION_SEC*CY_CFG_SYSCLK_CLKLF_FREQ_HZ)
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#define MAX_MCWDT_COUNTER0_DURATION_SEC ((MCWDT_COUNTER0_MAX_COUNT + 1)/(CY_CFG_SYSCLK_CLKLF_FREQ_HZ))
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#define LPT_MCWDT_CTRL (CY_MCWDT_CTR0 | CY_MCWDT_CTR1 | CY_MCWDT_CTR2)
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static const ticker_info_t lp_ticker_info = {
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.frequency = CY_CFG_SYSCLK_CLKLF_FREQ_HZ,
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.bits = 16UL,
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.bits = 32UL,
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};
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static bool lpt_init_done = false;
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// Timer h/w configuration.
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static cy_stc_mcwdt_config_t config = {
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.c0Match = 0,
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.c1Match = 0,
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.c0Match = MCWDT_COUNTER0_MAX_COUNT,
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.c1Match = MCWDT_COUNTER1_MAX_COUNT,
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.c0Mode = CY_MCWDT_MODE_INT,
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.c1Mode = CY_MCWDT_MODE_NONE,
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.c2ToggleBit = 0,
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.c1Mode = CY_MCWDT_MODE_INT,
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.c2Mode = CY_MCWDT_MODE_NONE,
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.c2ToggleBit = 0,
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.c0ClearOnMatch = false,
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.c1ClearOnMatch = false,
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.c0c1Cascade = false,
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.c0c1Cascade = true,
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.c1c2Cascade = false
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};
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@ -77,7 +86,6 @@ static cy_stc_sysint_t lpt_sysint_config = {
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.intrPriority = LPT_INTERRUPT_PRIORITY
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};
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void lp_ticker_init(void)
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{
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lp_ticker_disable_interrupt();
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@ -100,14 +108,14 @@ void lp_ticker_init(void)
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Cy_MCWDT_Init(LPT_MCWDT_UNIT, &config);
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Cy_SysInt_Init(&lpt_sysint_config, lp_ticker_irq_handler);
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NVIC_EnableIRQ(lpt_sysint_config.intrSrc);
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Cy_MCWDT_Enable(LPT_MCWDT_UNIT, CY_MCWDT_CTR0, LPT_MCWDT_DELAY_WAIT);
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Cy_MCWDT_Enable(LPT_MCWDT_UNIT, LPT_MCWDT_CTRL, LPT_MCWDT_DELAY_WAIT);
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lpt_init_done = true;
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}
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void lp_ticker_free(void)
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{
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NVIC_DisableIRQ(lpt_sysint_config.intrSrc);
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Cy_MCWDT_Disable(LPT_MCWDT_UNIT, CY_MCWDT_CTR0, LPT_MCWDT_DELAY_WAIT);
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Cy_MCWDT_Disable(LPT_MCWDT_UNIT, LPT_MCWDT_CTRL, LPT_MCWDT_DELAY_WAIT);
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#ifdef TARGET_MCU_PSOC6_M0
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cy_m0_nvic_release_channel(CY_LP_TICKER_IRQN_ID, lpt_sysint_config.intrSrc);
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lpt_sysint_config.intrSrc = (IRQn_Type)(-1);
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@ -117,32 +125,55 @@ void lp_ticker_free(void)
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uint32_t lp_ticker_read(void)
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{
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return Cy_MCWDT_GetCount(LPT_MCWDT_UNIT, CY_MCWDT_COUNTER0);
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return Cy_MCWDT_GetCount(LPT_MCWDT_UNIT, CY_MCWDT_COUNTER2);
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}
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void lp_ticker_set_interrupt(timestamp_t timestamp)
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{
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uint16_t delay;
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uint16_t current = Cy_MCWDT_GetCount(LPT_MCWDT_UNIT, CY_MCWDT_COUNTER0);
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uint16_t new_ts = (uint16_t)timestamp;
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delay = new_ts - current;
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// Make sure the event is set for the future. Mbed internally will not schedule
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// delays longer than 0x7000, so too large delay means it should occur already.
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// MCWDT has internal delay of about 1.5 LF clock ticks, so this is the minimum
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// that we can schedule.
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if ((delay < 3) || (delay > (uint16_t)(-3))) {
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// Cheating a bit here.
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new_ts = current + 3;
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}
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uint32_t delay;
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uint16_t c0_count = Cy_MCWDT_GetCount(LPT_MCWDT_UNIT, CY_MCWDT_COUNTER0);
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uint16_t c1_count = Cy_MCWDT_GetCount(LPT_MCWDT_UNIT, CY_MCWDT_COUNTER1);
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uint32_t c2_count = Cy_MCWDT_GetCount(LPT_MCWDT_UNIT, CY_MCWDT_COUNTER2);
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// Cypress PDL manual says that valid match range is 1..65535.
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if (new_ts == 0) {
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new_ts = 1;
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}
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uint32_t new_ts = (uint32_t)timestamp;
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// Set up and enable match interrupt.
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Cy_MCWDT_SetMatch(LPT_MCWDT_UNIT, CY_MCWDT_COUNTER0, new_ts, LPT_MCWDT_DELAY_WAIT);
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Cy_MCWDT_SetInterruptMask(LPT_MCWDT_UNIT, CY_MCWDT_CTR0);
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delay = new_ts - c2_count;
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lp_ticker_clear_interrupt();
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if (delay > MCWDT_COUNTER0_MAX_COUNT) {
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uint32_t c0_increment = delay % (MCWDT_COUNTER0_MAX_COUNT + 1);
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uint32_t counter0_count = (c0_count + delay) % (MCWDT_COUNTER0_MAX_COUNT + 1);
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uint32_t counter1_count = (delay - c0_increment) / (MCWDT_COUNTER1_MAX_COUNT + 1) ;
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counter1_count = (c1_count + counter1_count) % (MCWDT_COUNTER1_MAX_COUNT + 1);
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if(counter1_count == 0) {
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counter1_count = 1;
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}
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if(counter0_count == 0) {
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counter0_count = 1;
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}
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Cy_MCWDT_SetMatch(LPT_MCWDT_UNIT, CY_MCWDT_COUNTER1, counter1_count, LPT_MCWDT_DELAY_NO_WAIT);
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Cy_MCWDT_SetMatch(LPT_MCWDT_UNIT, CY_MCWDT_COUNTER0, counter0_count, LPT_MCWDT_DELAY_NO_WAIT);
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Cy_MCWDT_SetInterruptMask(LPT_MCWDT_UNIT, CY_MCWDT_CTR1);
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}
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else {
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uint16_t counter0_count = c0_count + (uint16_t)delay;
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// MCWDT has internal delay of about 1.5 LF clock ticks, so this is the minimum
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// that we can schedule.
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if (delay < 3) {
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// Cheating a bit here.
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counter0_count = c0_count + 3;
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}
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if(counter0_count == 0) {
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counter0_count = 1;
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}
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Cy_MCWDT_SetMatch(LPT_MCWDT_UNIT, CY_MCWDT_COUNTER1, MCWDT_COUNTER1_MAX_COUNT, LPT_MCWDT_DELAY_NO_WAIT);
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Cy_MCWDT_SetMatch(LPT_MCWDT_UNIT, CY_MCWDT_COUNTER0, counter0_count, LPT_MCWDT_DELAY_NO_WAIT);
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Cy_MCWDT_SetInterruptMask(LPT_MCWDT_UNIT, CY_MCWDT_CTR0);
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}
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}
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void lp_ticker_disable_interrupt(void)
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@ -152,7 +183,7 @@ void lp_ticker_disable_interrupt(void)
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void lp_ticker_clear_interrupt(void)
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{
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Cy_MCWDT_ClearInterrupt(LPT_MCWDT_UNIT, CY_MCWDT_CTR0);
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Cy_MCWDT_ClearInterrupt(LPT_MCWDT_UNIT, (CY_MCWDT_CTR0 | CY_MCWDT_CTR1));
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}
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void lp_ticker_fire_interrupt(void)
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