Code generated for pioneer kits:
* CY8CKIT-062-4343W
* CY8CKIT-062-BLE
* CY8CKIT-WIFI-BT
Prototyping boards:
* CY8CPROTO-062-4343W
The source is generated with ModusToolbox Device Configurator.
The origin design.modus files used to produce the GeneratedSource
will be submitted in the consequent pull requests.
Copy the porting layer from TARGET_PSOC6_FUTURE to TARGET_PSOC6.
This commit is intended to make the history and changes applied easier
to follow.
ipcpipe_transport.c, ipcpipe_transport.h, rpc_api.h, rpc_defs.h
are excluded (not used by Cypress port).
PeripheralNames.h is moved to BSP layer introduced in subsequent
commits (the peripheral names and count are board-specific).
The targets/TARGET_Cypress/TARGET_PSOC6 is dedicated to the mbed-os HAL
and PSoC 6 MCU targets developed by Cypress Semiconductor. Move the
existing port developed by Future Electronics to TARGET_PSOC_FUTURE
and update the labels in targets.json appropriately.
The DEVICE_FOO macros are always defined (either 0 or 1).
This patch replaces any instances of a define check on a DEVICE_FOO
macro with value test instead.
Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
* Modify linker scripts to be compatible with bootloader and PSA
* Add memory protection
* Modify original post-build step to allow link with PSA binaries
* Config kvstore for ITS on FUTURE_SEQUANA_PSA
* Enable PSA-Crypto on PSoC6 with NVSeed
hex files subfolder moved up one level to avoid license confusion.
Removed non-TLS implementation of TRNG. Removed unused crypto libraries and headers.
Replaced Cypress copyright licence per agreement.
Removed unsed eeprom emulation middleware files.
Renamed assembler files from *.s to *.S
Removed "device_name" from targets.json definitions as it is not supoprted yet.
Exporter hooks removed completely.
Cleanup and improvements to the comments, including removal of the redundant doxygen comments.
Code run through astyle. Additionally:
- changes to drivers/Timer.cpp reverted
- ipcpipe_transport.* files removed as they are not used for now,
- fixed condition in stdio_init.cpp to perform serial initialization only when STDIO is enabled,
- added missing resurce manager call in PWM initialization,
- us_ticker initialization changed to use pre-reserved clock divider (to avoid resource manager call).
Changed reporting level from info to debug in PSOC6.py.
Added missing includes for function declarations in startup files.
Fixed (removed) garbadge text in psoc6_utils.c
Precompiled binaries updated for recent changes in psoc6_utils.c and moved to a separate folder; README and LICENSE files added.
1. Complete set of HAL drivers for all peripherals of CY8C63xx PSoC chips.
2. Cypress PDL library updated to official 3.0.1 version.
3. Tree structure reorganized and cleaned up:
+ TARGET_Cypress
+--+ TARGET_PSOC6+ -> code & libs applicable to all PSoC 6 based devices
+--+ TARGET_CY86XX -> code & libs applicable to PSoC 63 based devices
| +--- TARGET_MCU_PSOC6_M0 -> code & libs applicable to PSoC6 Corted M0+ core
| +--- TARGET_MCU_PSOC6_M4 -> code & libs applicable to PSoC6 Corted M0F core
|
+--+ TARGET_FUTURE_SEQUANA -> code applicable to Sequana board, both cores
+--- TARGET_FUTURE_SEQUANA_M0 -> code applicable only to M0+ core on Sequana board
Russ Butler
Volodymyr Medvid
Leszek Rusinowicz
Martin Kojtal
Oren Cohen
Cruz Monrreal
Przemyslaw Stekiel
Alastair D'Silva
David Saada
Adrien Chardon