Static pinmap extension required to use pin_function() and pin_mode() functions instead of pinmap_pinout(). Unfortunatelly pin_function() does not allow passing NC pin.
Call pin_function() and pin_mode() only if MISO/MOSI pin is not NC.
* Change "is supported" check to be a macro, so it can be done at
compile-time.
* Eliminate weird shift on 7-bit CRCs.
* Add support for 32-bit CRCs and reversals to TMPM3HQ.
* Change "is supported" check to be a macro, so it can be done at
compile-time.
* Eliminate weird shift on 7-bit CRCs.
* Add support for 32-bit CRCs and reversals to TMPM3HQ.
Enable the Watchdog Timer for the low-power stop modes of operation,
including the VLPS used in deepsleep.
Enable the Watchdog Timer for the Debug mode.
ARM Compiler 6.13 testing revealed linker errors pointing out
conflicting use of `__user_setup_stackheap` and
`__user_initial_stackheap` in some targets. Remove the unwanted
`__user_initial_stackheap` from the targets - the setup is
centralised in the common platform code.
Looking into this, a number of other issues were highlighted
* Almost all targets had `__initial_sp` hardcoded in assembler,
rather than getting it from the scatter file. This was behind
issue #11313. Fix this generally.
* A few targets' `__initial_sp` values did not match the scatter
file layout, in some cases meaning they were overlapping heap
space. They now all use the area reserved in the scatter file.
If any problems are seen, then there is an error in the
scatter file.
* A number of targets were reserving unneeded space for heap and
stack in their startup assembler, on top of the space reserved in
the scatter file, so wasting a few K. A couple were using that
space for the stack, rather than the space in the scatter file.
To clarify expected behaviour:
* Each scatter file contains empty regions `ARM_LIB_HEAP` and
`ARM_LIB_STACK` to reserve space. `ARM_LIB_STACK` is sized
by the macro `MBED_BOOT_STACK_SIZE`, which is set by the tools.
`ARM_LIB_HEAP` is generally the space left over after static
RAM and stack.
* The address of the end of `ARM_LIB_STACK` is written into the
vector table and on reset the CPU sets MSP to that address.
* The common platform code in Mbed OS provides `__user_setup_stackheap`
for the ARM library. The ARM library calls this during startup, and
it calls `__mbed_user_setup_stackheap`.
* The default weak definition of `__mbed_user_setup_stackheap` does not
modify SP, so we remain on the boot stack, and the heap is set to
the region described by `ARM_LIB_HEAP`. If `ARM_LIB_HEAP` doesn't
exist, then the heap is the space from the end of the used data in
`RW_IRAM1` to the start of `ARM_LIB_STACK`.
* Targets can override `__mbed_user_setup_stackheap` if they want.
Currently only Renesas (ARMv7-A class) devices do.
* If microlib is in use, then it doesn't call `__user_setup_stackheap`.
Instead it just finds and uses `ARM_LIB_STACK` and `ARM_LIB_HEAP`
itself.
We should not block in case the UART is busy transmitting. The
API has been updated to check the status of all UART's and return
1 in case any of them is busy transmitting.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The code checks if any of the UART's is still transmitting.
If so then prevent from entering deepsleep
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
1. FPGA test shield requires at least half sclk period delay between
CS assertion and first sclk edge
2. Update Kinetis SPI drivers to match what is already done for K64F
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
- Added dummy data setup API to allow users to configure
the dummy data to be transferred.
- Added new APIs for half-duplex transfer function. Users
can send and receive data by one API in the polling/interrupt/EDMA way,
and they can choose either to transmit first or to receive first.
Additionally, the PCS pin can be configured as assert status in
transmission (between transmit and receive) by setting the
isPcsAssertInTransfer to true.
- Fix for MISRA issues
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Update includes allocating RAM region for code to enter
stop modes and execute this code in RAM, thus the flash
is idle and no prefetch is performed while entering stop
mode.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Martin Kojtal
Przemyslaw Stekiel
Alan Mock
Filip Jagodzinski
Veijo Pesonen
Kevin Bracey
int_szyk
Michal Paszta
Mahesh Mahadevan
Hugues Kamba