Renesas mbed boards incorporate NVIC Wrapper because Cortex-A9 use GIC. For example, NVIC_SystemReset() is defined in nvic_wrapper.c and declared in nvic_wrapper.h.
Because I removed one of include processing accidentally, I fixed the lack.
This supplements PR #5890.
Related to the review of #5857, I fixed the TRNG function for GR-LYCHEE.
- I modified to zeroize "recv_data" before the function return.
- I added the processing that check the return value of I2C.read function. If return value is error, "output" is zeroized before function return.
- In trng_get_bytes_esp32 function, there is a time lag in the period from ESP32 reset to start working, error may occur when "Write" is called. Thus, I added a retry counter due to address this concern. There is not this counter for "Read" since it is called after "Write".
I modified the lack of license header in the below header files.
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/TARGET_MBED_MBRZA1H/reserved_pins.h
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/TARGET_MBED_MBRZA1LU/reserved_pins.h
I supported the TRNG function when target is GR-LYCHEE.
GR-LYCHEE generates TRNG by acquiring the random number of Wifi module(ESP32) incorporated in it using I2C.
For supporting to CMSIS5/RTX5, I added the start-up processing of 3 toolchains (ARMCC, GCC_ARM, IAR) and the register definition of RZ/A1LU specific.
In addition, I added the linker script files to implement the dynamic HEAP the same as GR-PEACH(RZ/A1H).
I modified the lack of copyright in the below header files that I added for commonizing the RZ_A1 related files.
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/mbed_drv_cfg.h
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_VK_RZ_A1H/mbed_drv_cfg.h
I made be available in common whatever the board related to RZ_A1 in the below files.
- Since there are the table code of Pinmap differs for each board, I moved the code to "PeripheralPins" file for each board, and changed to include PeripheralPins.h.
analogin_api.c, can_api.c, gpio_irq_api.c, i2c_api.c, pinmap.c, port_api.c, pwmout_api.c, serial_api.c, spi_api.c and us_ticker.c
- Since there are some board-specific processes, I enclosed the processes with "#ifdef" and rearranged the functions to make be easier to enclose.
can_api.c, ethernet_api.c and serial_api.c
- Since there are the driver configuration values differs for each board, I added "mbed_drv_cfg.h" file for each board and defined macros for the values, and changed to refer to the macros.
can_api.c, gpio_api.c, pwmout_api.c and rtc_api.c
In "targets/TARGET_RENESAS" folders, same as Cortex-M targets, I changed the folder structure to combine files that can be shared as RZ/A1 related.
And I renamed the folder name to "TARGET_RZ_A1XX" in order to make commonality explicit.
- "targets/TARGET_RENESAS" folder
<before>
\targets\TARGET_RENESAS\TARGET_RZ_A1H
\targets\TARGET_RENESAS\TARGET_VK_RZ_A1H
<after>
\targets\TARGET_RENESAS\TARGET_RZ_A1XX
Although the extened RTC is supported by #5363 commit ("Add support and tests for extended RTC"), it seems that the changes was overlooked in RZ_A1H_api.c.
So I added the changes with reference to other rtc_api.c.
I changed disable_irq() / enable_irq() to core_util_critical_section_enter() / core_util_critical_section_exit() by utilizing "mbed_critical" function in the below drivers.
- serial_api.c
- us_ticker.c
I added the below definitions for working "Dynamic Stack" and "Dynamic heap" on Mbed OS by referencing with the codes of Cortex-M target board.
"ISR_STACK_START", "ISR_STACK_SIZE", "INITIAL_SP", "HEAP_START" and "HEAP_SIZE"
By updating to the codes of CMSIS5/RTX5, GIC_SetConfigration() function was added for Cortex-A, this function is set the interrupt configuration using GIC's ICFGR register. Therefore, I added this function to satisfy Cortex-A interrupt spec in the below files.
"can_api.c", "ethernet_api.c", "gpio_irq_api.c", "i2c_api.c", "spi_api.c" and "us_ticker.c"
For supporting tp CMSIS5/RTX5, I changed the start-up processing of 3 toolchains(ARMCC, GCC_ARM, IAR) and updated the register definition of PEACH specific.
In addition,
I changed the linker script files to implement the dynamic HEAP the same as Cortex-M targets.Since GR-PEACH's HEAP was a fixed area, I changed the label name(ZI_DATA to RW_IRAM1) and replaced the allocation of STACK/HEAP.
fire_interrupt function should be used for events in the past. As we have now
64bit timestamp, we can figure out what is in the past, and ask a target to invoke
an interrupt immediately. The previous attemps in the target HAL tickers were not ideal, as it can wrap around easily (16 or 32 bit counters). This new
functionality should solve this problem.
set_interrupt for tickers in HAL code should not handle anything but the next match interrupt. If it was in the past is handled by the upper layer.
It is possible that we are setting next event to the close future, so once it is set it is already in the past. Therefore we add a check after set interrupt to verify it is in future.
If it is not, we fire interrupt immediately. This results in
two events - first one immediate, correct one. The second one might be scheduled in far future (almost entire ticker range),
that should be discarded.
The specification for the fire_interrupts are:
- should set pending bit for the ticker interrupt (as soon as possible),
the event we are scheduling is already in the past, and we do not want to skip
any events
- no arguments are provided, neither return value, not needed
- ticker should be initialized prior calling this function (no need to check if it is already initialized)
All our targets provide this new functionality, removing old misleading if (timestamp is in the past) checks.
The use of mktime was causing a fault when called in interrupt handler because on GCC it lock the mutex protecting the environment, To overcome this issue, this patch add dedicated routine to convert a time_t into a tm and vice versa.
In the process mktime has been optimized and is now an order of magnitude faster than the routines present in the C library.
There is an easy default implementation of spi_master_block_write that
just calls spi_master_write in a loop, so the default implementation
of spi_master_block_write has been added to all targets.
Revert HRM1017 file source deletion
Added in small comment next to additions
Added mapping to BTN-labelled switches
Added mapping to USER_BUTTON-labelled switches
Undo incorrect mapping to SWIO pin in NORDIC target
Currently, there is the issue in register setting into serial_format().
The issue is that parameter for baudrate setting is initialed zero in this function.
In baudrate is less 9600bps, the issue occurs. In baudrate is over 9600, not occurs. When call serial_baud() before serial_format(), baudrate override and set with an incorrect value.
Therefore, I fixed register setting not to set the parameter of baudrate setting in serial_format().
I modified the bug in PR #3289. But It seems not enough the changes.
For the reason, It occured the following issue.
https://github.com/ARMmbed/mbed-os/issues/3694
So I reviewed and re-modified about the setting of initial value of interrupt edge in "gpio_irq_init".
Previously, when "length = 0" as failsafe, "return 0" is executed.
But we changed so that only START bit and STOP bit are executed same as other devices.
I modified the TTB setting of RO_DATA area.
The current setting of this area is "not executable".
Therefore, when trying to execute a program placed in this area, a prefetch abort will occur.
So I changed from "Sect_Normal_RO" to "Sect_Normal_Cod".
Until now, when the frequency function of CAN driver was executed, signal no output, and the frequency could not be changed.
Since there was an error in the frequency changing procedure I modified it.
Renesas modified the initial value of interrupt edge in "gpio_irq_init" function.
The value was "both egde(rise and fall)".So we modified it to "low revel".
When the floating-point calculation is executed into the processing which is called from IRQ handlers, VFP register is overwritten.
Therefore, we fixed the issue. we added the process to execute the saving (Push) and the returning (Pop) of VFP register in before and after the appropriate processing.
TomoYamanaka
Cruz Monrreal
Martin Kojtal
Przemyslaw Stekiel
Bartosz Szatkowski
Bartek Szatkowski
mbedNoobNinja
Jimmy Brisson
Deepika
Sam Grove
Vincent Coubard
Christopher Haster
adustm
Kevin Gilbert
Toyomasa Watarai