Update the code to check all addresses for all interfaces. Move
the code from mbed_lwip_socket_bind() to a new function called
mbed_lwip_is_local_addr()
Return NSAPI_ERROR_PARAMETER when:
Binding to a non-local address
Socket listen() is called without calling bind() first
Socket accept() is called without calling listen() first
The K64F Ethernet driver installs an interrupt handler that sets thread
flags, and this could be called before the thread was initialised, so it
would use a NULL thread ID.
This triggers an RTX error-checking trap in debug builds, and could also
lead to other problems with received packets not being processed.
Adjusted so the RX interrupt handler does nothing if the thread isn't
initialised yet, and manually trigger a RX event flag after initialising
the thread in case any interrupts were ignored.
An alternative would have been to implement eth_arch_enable_interrupts,
but this mechanism is not present in the EMAC world - drivers will have
to start returning interrupts in their power up.
Fixes#5680
In pararell threads of "thread" test is a simple thread, but it seems that there is a difference in the stack used between Cortex-A and Cortex-M.
As a result of check, in Cortex-A, program aborts because of the lack of stack when PARALLEL_THREAD_STACK_SIZE is 384, workes properly when PARALLEL_THREAD_STACK_SIZE is 512 at least.
"malloc" test is used a simple thread that executes only malloc and free, but it seems that there is a difference in the stack used between Cortex-A and Cortex-M.
As a result of check, in Cortex-A, program aborts because of the lack of stack when THREAD_STACK_SIZE is 256, workes properly when THREAD_STACK_SIZE is 512 at least. Since it seems that the definition processing of "DEFAULT_STACK_SIZE" was gone from Mbed OS by updating CMSIS5/RTX5, I setted 512 directly for Cortex-A.
Although the extened RTC is supported by #5363 commit ("Add support and tests for extended RTC"), it seems that the changes was overlooked in RZ_A1H_api.c.
So I added the changes with reference to other rtc_api.c.
I changed disable_irq() / enable_irq() to core_util_critical_section_enter() / core_util_critical_section_exit() by utilizing "mbed_critical" function in the below drivers.
- serial_api.c
- us_ticker.c
I added the below definitions for working "Dynamic Stack" and "Dynamic heap" on Mbed OS by referencing with the codes of Cortex-M target board.
"ISR_STACK_START", "ISR_STACK_SIZE", "INITIAL_SP", "HEAP_START" and "HEAP_SIZE"
By updating to the codes of CMSIS5/RTX5, GIC_SetConfigration() function was added for Cortex-A, this function is set the interrupt configuration using GIC's ICFGR register. Therefore, I added this function to satisfy Cortex-A interrupt spec in the below files.
"can_api.c", "ethernet_api.c", "gpio_irq_api.c", "i2c_api.c", "spi_api.c" and "us_ticker.c"
For supporting tp CMSIS5/RTX5, I changed the start-up processing of 3 toolchains(ARMCC, GCC_ARM, IAR) and updated the register definition of PEACH specific.
In addition,
I changed the linker script files to implement the dynamic HEAP the same as Cortex-M targets.Since GR-PEACH's HEAP was a fixed area, I changed the label name(ZI_DATA to RW_IRAM1) and replaced the allocation of STACK/HEAP.
Set buffer for 1 sample in analogin_read_u16. Before it assumes the
buffer is set outside by the higher layer. Now it's temporarily
located on the stack since only the ADC value is returned.
Cruz Monrreal II
Maciej Bocianski
Ashok Rao
Martin Kojtal
Juha Ylinen
Veijo Pesonen
adbridge
Joris Aerts
Seppo Takalo
Kevin Bracey
Jonatan Antoni
Vladimir Umek
TomoYamanaka
Daniel Brondani
Robert Rostohar
Dave Wu