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13552 Commits (31f7ea7688a3b56cbca22967949db2e85791297c)

Author SHA1 Message Date
Jimmy Brisson 31f7ea7688
Merge pull request #5708 from SeppoTakalo/debug_info 
Add minimal debug info to release and develop profiles.
 2018-01-08 10:36:30 -06:00
Jimmy Brisson cef1cc26d8
Merge pull request #5651 from gorazdko/ff_lpc546xx-add-ethernet 
ff_lpc546xx: add enet, change led1 and led3 pins
 2018-01-08 10:35:56 -06:00
Jimmy Brisson 737f75a68f
Merge pull request #5608 from productize/nucleo-f413zh 
NUCLEO_F413ZH: Add support for the NUCLEO-F413ZH board
 2018-01-08 10:35:27 -06:00
Jimmy Brisson 3c5390883f
Merge pull request #4925 from OpenNuvoton/nuvoton_crypto 
NUC472/M487: Refine code with mbed TLS crypto alternatives
 2018-01-08 10:34:27 -06:00
ccli8 67386b9ebd [NUC472/M487] Fix DMA input/output buffers are overlapped in AES alter. 2018-01-05 09:18:26 +08:00
ccli8 4023078e14 [NUC472/M487] Remove unnecessary H/W context clone functions in SHA alter. 2018-01-05 09:18:26 +08:00
ccli8 acff29e6f2 [NUC472/M487] Fix context clone corner case in SHA alter. 
As destination/source contexts are the same, we return immediately.
 2018-01-05 09:18:25 +08:00
ccli8 d96bcda606 [NUC472/M487] Fix indefinite loop in SHA alter. 2018-01-05 09:18:25 +08:00
ccli8 8b7ff095a9 [NUC472/M487] Remove duplicate configuration of CRPT->SHA_CTL/CRPT->HMAC_CTL in SHA alter. 2018-01-05 09:18:25 +08:00
ccli8 a00f8d0e8b [NUC472/M487] Guard from reordering DMA wait and post-wait for crypto modules 2018-01-05 09:18:25 +08:00
ccli8 3a8c1aa687 [NUC472/M487] Use interrupt signal rather than polling to check operation completion in DES alter. 
This is to be consistent with PRNG/AES.
 2018-01-05 09:18:24 +08:00
ccli8 0c1098483f [NUC472/M487] Refine flow control code between crypto start and crypto ISR 2018-01-05 09:18:24 +08:00
ccli8 e1fbf0f6a7 [NUC472/M487] Add comment for crypto_zeroize 2018-01-05 09:18:24 +08:00
ccli8 add839c808 [NUC472/M487] Refine code in SHA alter. 2018-01-05 09:18:24 +08:00
ccli8 b443a23b07 [NUC472/M487] Add memory barrier for DMA transfer in AES/DES alter. 2018-01-05 09:18:23 +08:00
ccli8 c906790257 [NUC472/M487] Call BSP driver rather than direct register access in DES alter. 2018-01-05 09:18:23 +08:00
ccli8 9edda18b0f [NUC472] Update BSP crypto driver 2018-01-05 09:18:23 +08:00
ccli8 dc3c84c011 [NUC472/M487] Fix parameter check for TMODE/OPMODE in DES alter. 2018-01-05 09:18:23 +08:00
ccli8 815a6a7c4d [NUC472/M487] Add parameter check for configuring DES registers in DES alter. 2018-01-05 09:18:23 +08:00
ccli8 1d62b9120b [NUC472/M487] Refine comment with BSP driver use in DES alter. 2018-01-05 09:18:22 +08:00
ccli8 479cf687ff [NUC472/M487] Fix multiple calls to SHA free in SHA alter. 2018-01-05 09:18:22 +08:00
ccli8 7d92550d11 [NUC472/M487] Remove superfluous code in AES alter. 2018-01-05 09:18:22 +08:00
ccli8 116b14aa84 [NUC472/M487] Refine code with SHA context selection in SHA alter. 2018-01-05 09:18:22 +08:00
ccli8 980cb6b9c8 [NUC472/M487] Guard against SHA internal state size is not word-aligned in SHA alter. 2018-01-05 09:18:21 +08:00
ccli8 8ba07815ed [NUC472/M487] Fix SHA H/W resource leakage in context cloning 2018-01-05 09:18:21 +08:00
ccli8 83fb50cca3 [NUC472/M487] Fix SHA H/W is not stopped in corner case 
Take SHA1 for example, without the fix, SHA H/W is not stopped in either case:
(1) ctx->total == 0 in mbedtls_sha1_hw_finish()
(2) mbedtls_sha1_hw_finish() is not called by upper layer
 2018-01-05 09:18:21 +08:00
ccli8 a0a8a955a9 [NUC472/M487] Strengthen crypto DMA buffer check 
1. Catch incompatible buffer range, where buffer base = 0xffffff00 and buffer size = 0x100.
2. Add buffer size alignment check.
 2018-01-05 09:18:21 +08:00
ccli8 ac000244f4 [NUC472/M487] Refine AES/DES alter. DMA buffer requirement comment 2018-01-05 09:18:20 +08:00
ccli8 aafbdc8d38 [NUC472/M487] Fix compile error with disabled crypto 
For example, even though MBEDTLS_SHA512_C is disabled (via #undef MBEDTLS_SHA512_C),
mbedtls_sha512_context is still necessary due to referenced in sha512.h.
 2018-01-05 09:18:20 +08:00
ccli8 b0228d020d [NUC472/M487] Fix compile error as mbedtls is not included 
Currently, trng_api.c is located in targets/ and AES/DES/SHA alter. are located in mbedtls/.
They have shared crypto code.
If they could locate at same location e.g. mbedtls/, the shared crypto code placement would be more reasonable.
 2018-01-05 09:18:20 +08:00
ccli8 ba16fd9617 [NUC472/M487] Refine AES alter. key endianness code 2018-01-05 09:18:20 +08:00
ccli8 6464649c41 [NUC472/M487] Coordinate crypto interrupt handler among AES/PRNG 2018-01-05 09:18:20 +08:00
ccli8 0c2d59d327 [NUC472/M487] Refine AES/DES alter. code 2018-01-05 09:18:19 +08:00
ccli8 289bbf0ec7 [NUC472/M487] Fix AES alter. CFB128 error 2018-01-05 09:18:19 +08:00
ccli8 7076675fec [NUC472/M487] Optimize AES alter. code 2018-01-05 09:18:19 +08:00
ccli8 6cc3aa3e54 [NUC472/M487] Guard from re-entry into crypto H/W 2018-01-05 09:18:19 +08:00
ccli8 d66074fecc [NUC472/M487] Coordinate crypto init among AES/DES/SHA/PRNG 
Add counter to track crypto init among crypto sub-modules. It includes:
1. Enable crypto clock
2. Enable crypto interrupt

As counter gets zero, crypto clock is disabled to save power.
 2018-01-05 09:18:18 +08:00
ccli8 b0eededdaf [NUC472/M487] Fix DES alter. DMA buffer could locate at unsupported region 2018-01-05 09:18:18 +08:00
ccli8 f85875c7b6 [NUC472/M487] Fix AES alter. DMA buffer could locate at unsupported region 2018-01-05 09:18:18 +08:00
ccli8 70e9a90957 [NUC472/M487] Refine AES alter. input/output data endianness 2018-01-05 09:18:18 +08:00
ccli8 a1e202518f [NUC472/M487] Fix AES alter. DMA buffer check 2018-01-05 09:18:18 +08:00
ccli8 20aa516e79 [NUC472/M487] Refine config check code 2018-01-05 09:18:17 +08:00
ccli8 126aa565c7 [NUC472/M487] Remove redundant S/W DES code 
This S/W DES code was to test DES H/W port before.
 2018-01-05 09:18:17 +08:00
ccli8 2e7f07e264 [NUC472/M487] Refine DES alter. code 2018-01-05 09:18:17 +08:00
ccli8 b2b67af189 [NUC472/M487] Add comment for DES alter. context 2018-01-05 09:18:17 +08:00
ccli8 ed57432c95 [NUC472/M487] Add comment for AES alter. context 2018-01-05 09:18:17 +08:00
ccli8 9e5837fd77 [NUC472/M487] Refine AES alter. code with IV endianness 2018-01-05 09:18:16 +08:00
ccli8 087186aba7 [NUC472/M487] Rework AES alter. CFB128 
1. Fix bug on non-block aligned data size
2. More concise
 2018-01-05 09:18:16 +08:00
ccli8 93f6ef996f [NUC472/M487] Refine AES alter. DMA buffer code 2018-01-05 09:18:16 +08:00
ccli8 f24ca8c857 [NUC472/M487] Refine AES alter. code 2018-01-05 09:18:16 +08:00