ARMmbed
/
mbed-os
mirror of https://github.com/ARMmbed/mbed-os.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
17,341 Commits
52 Branches
336 Tags
628 MiB
Commit Graph

1363 Commits (31bf7bf3421fc29ee86d26de149c1a7fb85aa9f9)

Author SHA1 Message Date
bcostm e09e1147d8 Cleanup 
- Remove calls to HAL_SuspendTick and HAL_ResumeTick
- Rename stm_common.c in hal_tick_common.c
 2018-06-05 14:48:54 +02:00
Kari Haapalehto 0c3047f4cc Fix data aligment problem at STM32F4 hash write 2018-06-05 15:03:37 +03:00
bcostm 74c29cb0e5 Remove code related to timer channel 2 2018-06-05 11:21:02 +02:00
bcostm 91e826d459 Replace HAL_GetTick 2018-06-04 16:00:56 +02:00
jeromecoutant b79be416c8 Dual Bank Flash support update 2018-06-04 13:37:59 +02:00
bcostm cc14540140 Add support of Flash dual bank mode on DISCO_F769NI 2018-06-04 13:37:59 +02:00
bcostm b647ecf80c Add support of Flash dual bank mode on NUCLEO_767ZI 2018-06-04 13:37:59 +02:00
ytsuboi e5b8591818 [Wio 3G] Adding platform 2018-06-04 15:55:43 +09:00
Cruz Monrreal cabcdcf133
Merge pull request #7062 from jeromecoutant/PR_F413 
DISCO_F413ZH : map SPI3 to WIFI module
 2018-06-02 20:53:18 -05:00
Cruz Monrreal 07fb7c1adc
Merge pull request #6987 from jeromecoutant/PR_ADC 
STM32 ADC update
 2018-06-02 19:52:51 -05:00
Anna Bridge 9986abe499
Merge pull request #6803 from chuanga/wise-1510-uart-config 
Wise 1510 uart config
 2018-06-01 11:52:34 +01:00
jeromecoutant 2d0890b989 DISCO_F413ZH : pin value error 2018-05-31 13:55:55 +02:00
jeromecoutant 422e124854 DISCO_F413ZH : map SPI3 to WIFI module 2018-05-30 17:56:46 +02:00
jeromecoutant e3deaecc27 STM32 LPTICKER update for targets supporting RTC 2018-05-25 12:29:54 -05:00
jeromecoutant 39a9801675 STM32 LPTICKER : clean include file 2018-05-25 12:29:54 -05:00
jeromecoutant 1c4174d3eb STM32 RTC Init minor update 2018-05-25 12:26:05 -05:00
jeromecoutant 2b8d6cbcc5 STM32 LPTICKER : read counter 2018-05-25 12:26:05 -05:00
jeromecoutant 5701fd5ab6 STM32 LPTICKER update for targets supporting LPTIMER 2018-05-25 12:22:35 -05:00
Laurent MEUNIER beda4904d3 Make us_ticker common between 16 and 32 bits counters 2018-05-25 12:20:10 -05:00
Laurent MEUNIER c3d5daf80a Update STM32 16 bits us_tickers in line with new mbed HAL 
The new HAL allows to share the timer bit width and frequency,
the actual handling of mapping 16 bits counter up to 32 bits or
64 bits is now managed by mbed common layer.

This makes this ticker layer very similar to 32bits one and much
easier than before.
 2018-05-25 12:20:10 -05:00
Bartek Szatkowski 6e9f04bf2f Rename DEVICE_LOWPOWERTIMER to DEVICE_LPTICKER 
That's to match DEVICE_USTICKER.
 2018-05-25 12:20:09 -05:00
Alan Chuang 7f4272d9a7 make uart console port configurable via mbed_app.json 2018-05-25 16:30:57 +08:00
Steven Cartmell a92ac70e82 HAL CRC: Move STM32 implementation to common folder and add targets 2018-05-24 17:51:50 +01:00
Steven Cartmell 6b5dabe08b HAL CRC: Use HAL polynomial enum instead of STM32 enum 2018-05-24 17:51:50 +01:00
Steven Cartmell acbf41e673 HAL CRC: Basic implementation for STM32F0 2018-05-24 17:51:50 +01:00
Kevin Bracey 13dcef63e3
Merge pull request #6847 from ARMmbed/feature-emac 
Merge feature-emac branch into master
 2018-05-24 16:47:04 +03:00
Martin Kojtal d8cb72a0a2
Merge pull request #6273 from bulislaw/update_cmsis_5.3 
Update cmsis/rtx to version 5.3
 2018-05-24 09:37:40 +02:00
Asif Rizwan 332c6eabeb recompiled driver against NetworkInterface changes on latest feature-emac 2018-05-23 12:25:23 +03:00
Asif Rizwan ce08691dad WiFi EMAC class name reflected in WiFi drivers binaries 2018-05-23 12:25:22 +03:00
Asif Rizwan 657ac3f643 WIFI_EMAC class renamed to OdinWiFiEMAC, Formatting 
Revert "in ODIN emac initialization required before connection"
 2018-05-23 12:25:21 +03:00
Asif Rizwan 0b14f1277e EMAC adaption added, updated ODIN drivers to v2.5.0 RC1 2018-05-23 12:25:18 +03:00
Mika Leppänen ef68eb8b4d Enabled greentea and mbed-os-example-tls/client/sockets test for STM 2018-05-23 12:24:02 +03:00
Kevin Bracey 6930c6d3cf Ignore old EMAC Wifi drivers 
Suppress Odin W2 and Realtek Wi-fi drivers using .mbedignore
 2018-05-23 12:23:59 +03:00
Cruz Monrreal 3bcc076c0c
Merge pull request #6931 from jeromecoutant/PR_PERIPH 
STM32 : PeripheralPins.c and PinNames.h files alignment
 2018-05-22 14:56:37 -05:00
jeromecoutant 7fd4203b58 STM32L4 ADC internal channels update 2018-05-22 13:18:25 +02:00
jeromecoutant 881a8e31ff STM32L1 ADC internal channels update 2018-05-22 13:17:52 +02:00
jeromecoutant 4d3a54443d STM32L0 ADC internal channels update 2018-05-22 13:17:16 +02:00
jeromecoutant 06bca28268 STM32F7 ADC internal channels update 2018-05-22 13:16:37 +02:00
jeromecoutant e438bd6dc8 STM32F3 ADC internal channels update 2018-05-22 11:42:35 +02:00
jeromecoutant 5f21c3f73e STM32F2 ADC internal channels update 2018-05-22 11:37:09 +02:00
jeromecoutant 743a812be6 STM32F1 ADC internal channels update 2018-05-22 11:36:09 +02:00
jeromecoutant d7932c26eb STM32F0 ADC internal channels update 2018-05-22 11:35:23 +02:00
jeromecoutant cb579cba1c STM32F4 ADC internal channels update 2018-05-22 11:32:19 +02:00
bcostm 2d7b13c540 STM32 SPI: fix NSS pin configuration 2018-05-18 14:26:26 +02:00
jeromecoutant c31554f618 STM32 ETH : remove TX RX locking interrupt perforation 2018-05-18 10:53:02 +02:00
jeromecoutant b30f3abf11 STM32 PeripheralPins.c second update after review 
genpinmap script version 1.1
 2018-05-17 17:58:09 +02:00
jeromecoutant 3ac1855d93 STM32L4 DISCO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:05:14 +02:00
jeromecoutant 3e56a68eca STM32L0 DISCO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:05:10 +02:00
jeromecoutant b928439ef7 STM32F7 DISCO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:05:06 +02:00
jeromecoutant 2b9b817aed STM32F4 DISCO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:05:03 +02:00
jeromecoutant 02e8172538 STM32F3 DISCO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:04:58 +02:00
jeromecoutant 1e0ae6de14 STM32F1 DISCO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:04:55 +02:00
jeromecoutant b22c0d1bc1 STM32F0 DISCO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:04:51 +02:00
jeromecoutant 3e92ff1f85 STM32L4 NUCLEO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:04:41 +02:00
jeromecoutant 945bf78b6e STM32L1 NUCLEO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:04:36 +02:00
jeromecoutant b308d5cb71 STM32L0 NUCLEO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:04:31 +02:00
jeromecoutant d0da6dd34e STM32F7 NUCLEO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:04:27 +02:00
jeromecoutant bcadeff645 STM32F4 NUCLEO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:04:15 +02:00
jeromecoutant 817bdc213d STM32F3 NUCLEO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:04:10 +02:00
jeromecoutant 4ebbcc2197 STM32F2 NUCLEO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:03:56 +02:00
jeromecoutant 0025ebc0c7 STM32F1 NUCLEO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:03:33 +02:00
Cruz Monrreal 8be2e34390
Merge pull request #6832 from bcostm/PULL_REQUEST_CUBE_UPDATE_F3_V1.9.0 
STM32F3: Update with STM32CubeF3 V1.9.0
 2018-05-15 10:09:16 -05:00
jeromecoutant 0e510cfe3a STM32F0 NUCLEO : PeripheralPins.c and PinNames.h files alignment 2018-05-15 14:50:07 +02:00
Bartek Szatkowski 42b48821eb Fix platform failing to build after rebase 2018-05-14 12:18:21 +01:00
Cruz Monrreal 0f51ea031e
Merge pull request #6610 from pauluap/stm32_eth_remove_tx_rx_locking_interrupt_perforation 
Stm32 eth remove tx rx locking interrupt perforation
 2018-05-07 10:51:03 -05:00
bcostm 6154fd2598 F3 ST CUBE V1.9.0: remove pcd patch 
The Lock field is no more available in PCD structure.
 2018-05-07 10:58:49 +02:00
bcostm ccf71f0360 F3 ST CUBE V1.9.0: fix build errors with legacy macros 2018-05-07 10:58:49 +02:00
bcostm d0f8def2d7 F3 ST CUBE V1.9.0 2018-05-07 10:58:49 +02:00
Martin Kojtal 45b3fffe9a
Merge pull request #6729 from JammuKekkonen/f411re_add_bootloader_support 
Add bootloader support for NUCLEO_F411RE target
 2018-05-03 16:30:29 +01:00
Jammu Kekkonen d2cf341348 Add bootloader support for NUCLEO_F411RE target 2018-04-26 16:19:43 +03:00
jeromecoutant 7b5a79f56e STM32 RTC Init minor update 2018-04-24 13:50:57 +02:00
bcostm 893b759663 L0 ST CUBE V1.10.0: change adc sampling time 2018-04-18 14:06:21 +02:00
bcostm 61576f8131 L0 ST CUBE V1.10.0: spi and i2c corrections 2018-04-18 14:06:20 +02:00
bcostm 8191487a4d L0 ST CUBE V1.10.0 2018-04-18 14:06:20 +02:00
Cruz Monrreal e2567e5dad
Merge pull request #6599 from jeromecoutant/PR_WARNING 
STM32 compilation warning issues
 2018-04-16 10:41:36 -05:00
Cruz Monrreal fe44dc0468
Merge pull request #6601 from KariHaapalehto/add_mtb_adv_wise_1530 
Add new target MTB_ADV_WISE_1530
 2018-04-16 10:40:12 -05:00
Paul Thompson 20f11bc13f Extend changes to other STM32 devices that have the PCD_WriteEmptyTxFifo() function 2018-04-13 05:27:03 -07:00
Paul Thompson b45d4233e1 Make the atomic_clr_u32 conditional use raw values rather than computed, remove need for guards 2018-04-13 04:44:43 -07:00
Paul Thompson 2211a27f53 Drop usage of ilen, just use len and cast it to int32_t as appropriate 2018-04-13 00:27:00 -07:00
Paul Thompson 8f4a5e2093 Revert to original fix concentrating on type correctness 2018-04-12 10:09:53 -07:00
Paul Thompson 430784b084 Initial work was for unsigned-signed comparison fix. Current work fixes negative number issues 
Compile: stm32f7xx_hal_pcd.c
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c: In function 'PCD_WriteEmptyTxFifo':
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c:1310:11: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
   if (len > ep->maxpacket)
           ^
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c:1325:13: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
     if (len > ep->maxpacket)
             ^
 2018-04-12 09:43:18 -07:00
Paul Thompson c67f535fb3 Drop locking around TX and RX. The DMA channels are independent of each other 2018-04-12 09:42:28 -07:00
jeromecoutant 71d7d24bd6 STM32L4 : correct compilation warnings 2018-04-12 10:56:41 +02:00
jeromecoutant e7c4120550 STM32L1 : correct compilation warnings 2018-04-12 10:55:16 +02:00
jeromecoutant eeca430b23 STM32L0 : correct compilation warnings 2018-04-12 10:55:11 +02:00
jeromecoutant 2d0dce1db5 STM32F7 : correct compilation warnings 2018-04-12 10:55:02 +02:00
jeromecoutant 2fcf8d8990 STM32F4 : correct compilation warnings 2018-04-12 10:52:21 +02:00
jeromecoutant a540a21106 STM32F3 : correct compilation warnings 2018-04-12 10:51:33 +02:00
jeromecoutant 4e9e9f5c62 STM32F2 : correct compilation warnings 2018-04-12 10:51:18 +02:00
Kari Haapalehto f2b37b7d42 Add new target MTB_ADV_WISE_1530. 
MTB_ADV_WISE_1530 and MTB_USI_WM_BN_BM_22 includes same usi chip,
so common USI_WM_BN_BM_22 target has been created.
MTB_ADV_WISE_1530 and MTB_USI_WM_BN_BM_22 are inheting the common usi target
 2018-04-11 15:50:28 +03:00
jeromecoutant b6a8a50a28 STM32F1 : correct compilation warnings 2018-04-11 11:06:44 +02:00
jeromecoutant c2ee8f34b6 STM32F0 : correct compilation warnings 2018-04-11 09:57:54 +02:00
Paul Thompson f41cf081c9 STM32 : correct compilation warnings 2018-04-11 09:53:15 +02:00
Cruz Monrreal e913e917c0
Merge pull request #6544 from ithinuel/add_rak811_adc 
add ADC_AN0-2 mapped on PA_0-2
 2018-04-10 18:08:03 -05:00
Martin Kojtal 8b2eb20a54
Merge pull request #6553 from theotherjimmy/stmL4-armc6 
Correct armc6 detection logic for STM32L4
 2018-04-09 17:36:52 +02:00
Martin Kojtal 96084a3c67
Merge pull request #6561 from LMESTM/Stm32DeepSleepClock 
Stm32 deep sleep clock
 2018-04-09 17:11:23 +02:00
Martin Kojtal a3faf58a9e
Merge pull request #6511 from ashok-rao/MTB_USI_BM22 
Add new target USI WM-BN-BM-22
 2018-04-09 17:07:00 +02:00
Laurent MEUNIER ad4a250292 Style fix 2018-04-06 17:03:53 +02:00
Laurent MEUNIER 3d92af50ce Add delay to let clock stabilize when out of deep sleep 
Tests have shown that there is hich-up on MSI clock during the setup phase.
If this stabilization phase happens when application has restarted again
this can have side effects, like grambled UART characters typically.

So we're adding a delay before hading-over back to application.

With this modification, on NCULEO_L476RG, the wake-up time is increased
from 2ms to 2,5ms.
If possible this should be improved in the future to save 500 microseconds
of wak-up time.  See TODO
 2018-04-06 16:10:27 +02:00
Laurent MEUNIER 8007b1df7c Use temporarily MSI or HSI when exiting Deep Sleep 
There are cases where HW registers are found in unpexcepted state when
exiting Deep Sleep only few micro-seconds after it was entered.

By using an internal clock that does not depend on anythin and clocking
the system without using PLL, this allows SetSysClock default configuration
to run fine whatever possible configuration we find the HW in when
exiting Deep Sleep.

Also we shall restore interrupts only after all cloks are back to
expected running state.
 2018-04-06 16:10:27 +02:00