5fafb73a29
TARGET_STM : USB FS STM HAL changes
2016-12-19 14:31:49 +00:00
98d8acb6c8
DISCO_L476VG : align memory mapping with ARM
2016-12-19 14:31:47 +00:00
e566f711a6
DISCO_L476VG: modify clock for USB support
2016-12-19 14:31:46 +00:00
9abb7c3777
Updated ARM binary
2016-11-23 17:39:28 +01:00
4648ec606b
Added updated drivers for GCC, IAR
2016-11-23 15:18:17 +01:00
c2d09bd6a2
Fixed wrong start params to cbMAIN_startWlan
2016-11-23 11:38:35 +01:00
6f12eca4a6
NUCLEO_F103RB - Add RTS/CTS pins for Serial Flow Control
2016-11-17 10:15:21 +01:00
6eb33e5f3c
Merge pull request #3251 from LMESTM/dev_stm32l0_cube_v1.7.0
...
Dev stm32l0 cube v1.7.0
2016-11-16 17:43:16 +00:00
5750f31d6d
Merge pull request #3238 from LMESTM/dev_i2c_stm32f4hal
...
Dev i2c stm32f4hal
2016-11-16 17:42:12 +00:00
e875dbc90d
Merge pull request #3237 from javierpedrido/master
...
Added back USART 6 pins
2016-11-14 21:46:59 -06:00
c131a27dcf
Merge pull request #3231 from monkiineko/master
...
STM32F3: DISCO_F303VC - Add missing UART and ADC pin muxing options
2016-11-14 21:44:32 -06:00
e293e07749
stm32f4 make comment more explicit
...
As reported during review, this was not understandable as it is.
the get_i2c_obj allows to get a pointer to i2c_s struct from the
handle pointer. This therefore makes a hard-coded assumption
about the struct itself
2016-11-10 17:30:04 +01:00
fa9d147f69
Update Serial following L0 HAL update
2016-11-10 11:03:46 +01:00
ab0a8ad508
STM32L0: Cube update V1.5.0 to v1.7.0
...
Including HAL and CMSIS udpate
2016-11-10 11:03:46 +01:00
52dc7c5423
Renames all prebuilt binaries to be prefixed with 'lib'
...
This fixes an issue with make_iar, since IAR requires all libraries that
are linked to be prefixed with 'lib'.
2016-11-09 11:08:01 -06:00
b491165eac
[STM32F4] Add few prints for I2C debug
2016-11-09 18:03:04 +01:00
a65bacc032
[STM32F4] Master receive sequential - fix for HAL I2C
...
in case of 2 consecutives calls to HAL_I2C_Master_Sequential_Receive_IT
with the Xfer mode I2C_FIRST_AND_LAST_FRAME, the second trasnfer does
not start at all.
It seems this is because the previous state is maintained as I2C_STATE_MASTER_BUSY_RX
and therefore the START condition will not be generated
2016-11-09 18:03:02 +01:00
a50dc77c60
STM32: I2C: Change the master sync implementation to use ITs
...
With this new implementation, as in slave implementaiton, we use the
interrupts instead of accessing to registers continuously.
This has 2 main advantages:
- this shall improve performances overall and allows for sleep
time in the future
- this also removes some direct registers access from this
layer of code and makes it more generic among families
2016-11-09 18:02:59 +01:00
ec95aa5701
STM32: I2C: Reset I2C in case of errors to recover
...
This is to avoid an IP / bus deadlock.
This requires to store scl and sda in order to call the init function.
2016-11-09 18:02:57 +01:00
42d89b0665
STM32: I2C: Update Timeout computation
...
The timeout values are based on for loops and therefore should depend
on the core frequency and the I2C interface frequency.
This patch introduces this computation and base the timeout on the time
it should take to send a byte over the I2C interface. When sending a
number of bytes, this value can also be used.
In the loops, the timeout should also be decreased before the while
condition so that its value is 0 in case the timeout elapsed and this
can be treated as an error.
2016-11-09 18:02:54 +01:00
79504a6a38
STM32: I2C: Change the slave API implementation to use ITs
...
With this new implementation, the slave use the Interrupt
to be notified of a request from master, instead of
accessing to registers continuously.
This has 2 main advantages:
- this shall improve performances overall and allows for sleep
time in the future
- this also removes some direct registers access from this
layer of code and makes it more generic among families
2016-11-09 17:22:28 +01:00
d71537bb00
STM32: I2C: use irq helper function
2016-11-09 17:22:28 +01:00
c2060e34a3
STM32: I2C: Add-up irq handlers
...
With this commit we define I2C irq handlers that can be used by the driver
in sync mode. This also provides a mecanism for enabling and/or disabling
these handlers
Those handlers will be superseded by MBED ones in case of async mode usage.
2016-11-09 17:22:28 +01:00
490437ae29
STM32: I2C: Move up get_i2c_obj
...
so that it can be used as well in sync mode
2016-11-09 17:22:28 +01:00
0bee69023c
STM32: I2C: Don't use global init variables
...
No need to store the init status of each IP.
Init can be called again in case we try to recover.
2016-11-09 17:22:28 +01:00
2b53dfc453
STM32: I2C: configure slave address with HAL API
...
Instead of direct registers access, let's use HAL API.
This makes the code more generic accross STM32 families.
2016-11-09 17:22:28 +01:00
b7882d6e9b
Added back USART 6 pins
2016-11-09 12:14:35 -03:00
6d3f03c73d
STM32F3: DISCO_F303VC - Add missing ADC pin muxing options
...
Corrects the incorrect PA_5 ADC channel mapping, and removes the
non-existent PB_11 ADC channel mapping.
2016-11-08 17:07:15 -05:00
130fddc467
STM32F3: DISCO_F303VC - Add missing UART pin muxing options
2016-11-08 17:04:21 -05:00
31a7cd017e
Tab -> spaces
2016-11-07 21:59:27 +01:00
baf519f4c5
Updated ublox ODIN-W2 binaries
2016-11-07 19:11:39 +01:00
fde39602b9
Fixed dynamic message queue for scan results
2016-11-07 15:52:59 +01:00
a4f09b5fdb
Added cbMAIN_dispatchEventQueue
2016-11-07 15:52:58 +01:00
32dfe73b09
Added missing checks for wifi_link_out when allocating packets
2016-11-07 15:52:57 +01:00
fd7c9cc13a
Added copying of the wifi_link_out buffer since the buffer might change after call chain has ended.
2016-11-07 15:52:56 +01:00
7eaf32baa0
Merge pull request #3075 from geky/nsapi-error-size-types-2
...
nsapi - Add standardized return types for size and errors
2016-11-07 11:13:40 +00:00
b045c8ba00
nsapi - Adopted standardized return types in the Odin wifi interface
2016-11-02 15:37:34 -05:00
6cddb4df8b
[MTS_MDOT_F411RE] add back SPI3 pins that shouldn't have been removed
2016-11-02 13:41:04 -05:00
38a9c84bae
Merge pull request #2988 from martinjaeger/master
...
Update of can_api.c fixing #2987
2016-11-01 10:02:37 -05:00
eb95c14fa6
Fixing some typos
2016-10-30 16:49:49 +01:00
4a4d09f6d1
Merge pull request #3074 from jamike/TARGET_STM_INIT_GCC_ALIGNEMENT
...
Target STM - init gcc alignement
2016-10-28 11:04:50 +02:00
4a69072161
INIT:GCC add call to HAL_Init
...
system_init, stops all on going timer.
gcc _start , perform zero initialized.
=> HAL_Init must be done again also in GCC toolchain
2016-10-27 10:40:28 +02:00
b225a5ca97
STM32F1xx : GCC_ARM remove zero bss done at startup.
...
Zero bss is done after the call to _start.
2016-10-27 10:40:17 +02:00
702f64a6f2
STM32F0xx: GCC_ARM remove zero bss, in startup.
...
zero bss is done in libc init after call to _start.
2016-10-27 10:40:02 +02:00
9f20c4641d
STM32F0xx : GCC_ARM use a call to _start which performs
...
zero bss, C++ init and the call to main.
Remove direct call to __libc_init_array and main not needed
as _start is beeing called.
2016-10-27 10:39:02 +02:00
af090e3e6e
STM32L0xx : GCC_ARM remove zero bss, in startup.
...
zero bss is done in libc init after call to _start.
2016-10-27 10:38:56 +02:00
479a1a2715
STM32L1xx : GCC_ARM remove zero bss, in startup.
...
zero bss is done in libc init after call to _start.
2016-10-27 10:38:52 +02:00
f3b1c0a0c8
STM32L1xx : GCC_ARM a call to _start which performs
...
zero bss, C++ init and the call to main.
Remove direct call to __libc_init_array and main not needed
as _start is beeing called.
2016-10-27 10:38:35 +02:00
da377aa5d8
Merge pull request #3121 from monkiineko/master
...
STM32F3: Correct UART4 and UART5 defines when using DEVICE_SERIAL_ASYNCH
2016-10-27 10:12:13 +02:00
a711ff360b
STM32F7xx : GCC_ARM remove zero bss, in startup.
...
zero bss is done in libc init after call to _start.
2016-10-26 14:42:47 +02:00
Michel Jaouen
andreas.larsson
bcostm
Martin Kojtal
Sam Grove
Laurent MEUNIER
Brian Daniels
javierpedrido
Bradley Scott
Andreas Larsson
Christopher Haster
Mike Fiore
Martin Jäger