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4788 Commits (2a080a0840c6ae7c39e9ce457e691b28a838e47f)

Author SHA1 Message Date
Martin Kojtal 2a694cf1d9
Merge pull request #10143 from jeromecoutant/PR_ADC_RESETINTERNAL 
STM32 ADC INTERNAL CHANNEL reset after read
 2019-04-02 13:02:14 +02:00
Cruz Monrreal 4950178db5
Merge pull request #10246 from NXPmicro/Fix_LPC55S69_Flash_ClockSpeed 
LPC55S69: Update Flash driver to set clock frequency
 2019-04-01 21:53:18 -05:00
Cruz Monrreal cdc2579b7b
Merge pull request #10248 from VVESTM/issue_9934 
TARGET_STM32F7: Refresh cache when erasing or programming flash
 2019-04-01 17:04:26 -05:00
Cruz Monrreal 4dd55d2db6
Merge pull request #10281 from ashok-rao/S2_LP 
Adding support for S2_LP (WiSUN) as a new MTB target
 2019-04-01 17:03:37 -05:00
Mahesh Mahadevan 1b9531d1af LPC55S69: Update Flash driver to set clock frequency 
This is to ensure the flash access time is set correctly

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-04-01 12:10:24 -05:00
Ashok Rao 1f572f987e SPDX license identifier changed to Apache-2.0 2019-04-01 15:17:06 +01:00
Ashok Rao 5cb1c64d59 Adding SPDX identifier 2019-04-01 11:21:45 +01:00
Ashok Rao 479bcfdbfe Incorporating review comments 
Removing USBDEVICE since USB pins are NOT brought out on the MTB/MCB.
 2019-04-01 11:16:16 +01:00
Ashok Rao d2af702ed9 Incorporating review comments 2019-04-01 10:06:30 +01:00
Ashok Rao 83ad921196 Resolving merge conflicts from my remote 2019-04-01 07:49:37 +01:00
Ashok Rao d4c83fc056 Adding STM32_F429 + S2_LP (WiSUN) as a new MTB target 2019-04-01 07:31:01 +01:00
jeromecoutant ec00ea5655 STM32 ADC INTERNAL CHANNEL reset after read 
Internal channels use is enabling ADC "internal path"
which needs to be disabled after measurement
 2019-03-29 14:30:49 +01:00
Cruz Monrreal 6443e4360a
Merge pull request #10212 from ecoromka/master 
Fix tempsensor cal1 constant in stm32f3xx_ll_adc.h
 2019-03-28 17:07:46 -05:00
Vincent Veron 5765c4d0e0 TARGET_STM32F7: Refresh cache when erasing or programming flash 
The cache must be refreshed when we erase or program flash memory.
It fix 2 issues :
    Fix #9934
    Fix #6380

This solution was initially proposed in #6380.

Signed-off-by: Vincent Veron <vincent.veron@st.com>
 2019-03-28 14:48:12 +01:00
Cruz Monrreal 54e1ec6ea5
Merge pull request #10213 from d-kato/rza1xx_wait_ns 
GR_LYCHEE,RZ_A1H,VK_RZ_A1H: Fix greentea ticker test case failures
 2019-03-27 00:35:33 -05:00
Cruz Monrreal be38d95383
Merge pull request #10209 from OpenNuvoton/nuvoton_add-button-name 
Nuvoton: Add button names BUTTON1/BUTTON2
 2019-03-27 00:35:03 -05:00
Cruz Monrreal 61b0d8ecdc
Merge pull request #10206 from kfnta/lpc55s69_program_cycle 
Define program_cycle_s for LPC55S69 & CY8CKIT_062_WIFI_BT
 2019-03-27 00:25:02 -05:00
Cruz Monrreal fcf4999098
Merge pull request #10155 from kfnta/us_ticker 
Remove dependency on us_ticker HAL apis for non USTICKER targets
 2019-03-27 00:22:49 -05:00
Cruz Monrreal 0395150bfb
Merge pull request #10074 from morser499/cy-mbed-os-5.12.0-pwm-free 
Fixed issue with PWM not being freed when the object is destroyed
 2019-03-27 00:21:54 -05:00
Cruz Monrreal b872d08181
Merge pull request #10000 from malavikasajikumar/master 
Adding support for SDP-K1.
 2019-03-27 00:21:13 -05:00
ecoromka 757b9e250d Fix tempsensor cal1 constant in stm32f3xx_ll_adc.h 
Fix TEMPSENSOR_CAL1_TEMP according to datasheet.
 2019-03-26 10:42:38 -05:00
d-kato e96c6334f7 Refactoring system clock driver 2019-03-26 19:02:46 +09:00
d-kato 2509ea82fd Removed clock mode decision of "SystemCoreClockUpdate()" 
Since GPIO.PPR0 can not check clock mode, I changed it to set a fixed value for each board.
 2019-03-26 19:02:46 +09:00
d-kato cb31d11319 Fix the value of SystemCoreClock 
The OS timer of RZ/A1 uses P0 clock, so until now it has been set the value of P0 clock in SystemCoreClock.
Changed the system clock value to set to SystemCoreClock.
Changed to refer to P0 clock macro instead of SystemCoreClock in OS timer processing.
 2019-03-26 19:02:46 +09:00
ccli8 be96ade527 [Nuvoton] Add button names BUTTON1/BUTTON2 2019-03-26 17:05:43 +08:00
Michael Schwarcz a91f17e824 LPC targets: Compile us_ticker.c only if USTICKER defined 2019-03-26 09:52:18 +02:00
Michael Schwarcz 0e73a83bb2 Add USTICKER to more targets 
- LPC4088
- LPC4088_DM
- MAX32600MBED
- NCS36510
- WIZWIKI_W7500
- WIZWIKI_W7500ECO
- WIZWIKI_W7500P
 2019-03-26 09:52:17 +02:00
Michael Schwarcz 3ea2161755 Add USTICKER to ARCH_PRO target 2019-03-26 09:52:17 +02:00
Oren Cohen b7b0c254b7 Define program_cycle_s for CY8CKIT_062_WIFI_BT 2019-03-24 19:21:27 +02:00
Oren Cohen 85d4527b61 Define program_cycle_s for NXP LPC55S69 2019-03-24 17:52:10 +02:00
Brian Daniels 2b75dfda0f Only enable ARMC6 for a few targets 
The affected targets are Renesas targets, USI_WM_BN_BM_22 based
targets, and the MTB_MXCHIP_EMW3166.
 2019-03-23 18:24:57 -05:00
Martin Kojtal f76436c955
Merge pull request #10181 from jeromecoutant/PR_STMOD 
DISCO_L496AG: Add PMOD and STMOD+ connector
 2019-03-22 11:17:12 +01:00
Martin Kojtal d6908ce97f
Merge pull request #10178 from OpenNuvoton/nuvoton_fix_stor_cmpt 
Nuvoton: Remove SD component from targets.json
 2019-03-22 06:33:46 +01:00
Oren Cohen 6f7f30fb24 Add missing sector data 2019-03-21 17:47:32 +02:00
Ryan Morse 51a47139f3 Fixed issue with PWM not being freed when the object is destroyed 2019-03-21 07:48:42 -07:00
Oren Cohen d568e8734e Remove device_name from targets.json 2019-03-21 16:01:04 +02:00
Martin Kojtal d850d3bbca
Merge pull request #10156 from juhoeskeli/MTB_STM_L475_uart_clock_fix 
MTB_STM_L475: fix UART clock
 2019-03-21 10:43:35 +01:00
jeromecoutant 9ac9288229 DISCO_L496AG: Add PMOD and STMOD+ connector 2019-03-21 10:35:11 +01:00
ccli8 ab85146b20 [Nuvoton] Remove SD component from targets.json 
Nuvoton targets below don't provide SPI-bus SD on-board, identified by 'SD' in
target component list. Instead, these targets provide SD-bus SD on-board, identified
by unofficial 'NUSD', driver of which is provided outside mbed-os tree. So 'SD' must
be removed to reflect the truth.

- NUMAKER_PFM_NUC472
- NUMAKER_PFM_M487
- NUMAKER_IOT_M487
- NUMAKER_PFM_M2351
 2019-03-21 13:13:41 +08:00
Juho Eskeli a3beb1081e MTB_STM_L475: fix UART clock 2019-03-20 16:52:28 +02:00
Martin Kojtal 7d853b46c3
Merge pull request #10133 from ashok-rao/MTB_STM_F439 
Adding STM32_F439 as a new MTB target
 2019-03-20 13:52:46 +01:00
Martin Kojtal 9f2b23d009
Merge pull request #10149 from jeromecoutant/PR_H7ADCINTERNAL 
STM32H7 ADC internal channels
 2019-03-20 13:25:23 +01:00
Ashok Rao 3661957401 Changing SPI flash's CS ine, Errata on SCH 2019-03-19 09:47:38 +00:00
Ashok Rao fd241ddeaf Pin map changes 
Based on v1.1.0 of S2_LP MCB using STM32F429ZIT6.
 2019-03-19 09:47:38 +00:00
Ashok Rao 496308e4aa Removing all content related to EMAC 2019-03-19 09:47:38 +00:00
Ashok Rao 04270f75ba Adding MTB aliases to PinNames 2019-03-19 09:47:38 +00:00
Ashok Rao 01f2b0426d Adding STM S2_LP as a new target 2019-03-19 09:47:38 +00:00
Malavika Sajikumar 00863c2664 Renaming SDP-K1 to SDP_K1. 2019-03-18 15:50:14 -07:00
jeromecoutant 75a771c583 STM32H7 ADC internal channels 2019-03-18 16:55:37 +01:00
Ashok Rao 339f806c71 Removing redundant code. 
MCO pins are not brought out on MTB / MCB design.
 2019-03-18 12:37:27 +00:00