Since the year dot GCC has been passed the `-fno-builtin` option, which
eliminates all compiler knowledge of the C library, even down to basic
stuff like `memcpy` or `memset`, potentially inhibiting quite a lot of
optimisations.
Remove the option to re-enable the optimisations.
There is no record in the source as to why the option is present - maybe
we'll find out by trying to remove it. If necessary, it could be
selectively turned back on for particular functions.
Since commit 12c6b1bd8, the i.MX RT1050 has effectively had its data
cache disabled, as the SDRAM was marked Shareable; for the Cortex-M7,
shareable memory is not cached.
This was done to make the Ethernet driver work without any cache
maintenance code. This commit adds cache maintenance and memory barriers
to the Ethernet driver, and removes the Shareable attribute from the
SDRAM, so the data cache is used again.
Cache code in the base fsl_enet.c driver has not been activated - the
bulk of it is in higher-level Read and Write calls that we're not using,
and there is one flawed invalidate in its initialisation. Instead
imx_emac.cpp takes full cache responsibility.
This commit also marks the SDRAM as read/write-allocate. As the
Cortex-M7 has its "Dynamic read allocate mode" to automatically switch
back to read-allocate in cases where write allocate is working poorly
(eg large memset), this should result in a performance boost with no
downside.
Activating write-allocate is also an attempt to provoke any flaws in
cache maintenance - the Ethernet transmit buffers for example will be
more likely to have a little data in the cache that needs cleaning.
FastModels are a software simulator for Arm platform/cores.
They mean to be used as a tool for testing or early prototype stage development.
Due to the nature of software simulator can't grantee the timing accuracy like HW.
So time drifting test is skipped for software models.
Make equeue_create_inplace align the passed-in buffer and size to
sizeof(void *).
Really we should be aiming to align more for ARM, as blocks should be
8-byte aligned, but the internal heap mechanisms only work to 4-byte
alignment at the moment. More work would be needed to ensure 8-byte
alignment of allocated blocks.
Projects have only ever made use of one linker script per compiler.
However, the tools would store references to multiple linker scripts in
a project and select one in a non-deterministic way. Now we clear out
any existing linker script when we add a new one to a project. This way,
the last added linker script is always used.
The sct file path generated in the online compiler
is incorrect. Fix that by changing the correct_scatter_shebang
API to accept a FileRef object instead and use the path.
This change should go with change in online compiler that removes
the override for correct_scatter_shebang.
Fixed interrupt vector settings on M0 core. Wrong vector settings prevented
LP_TICKER from working, resulting in deep sleep tests failing on M0
or PSA variant.