Add the OsEventObserver mechanism. A client interested in receiving
notifications on certain OS events can register to receive notifications
with osRegisterForOsEvents. This is useful for clients like the secure
memory allocator, which observes thread switching events in order to
swap in and out different memory allocator objects.
OsEventObserver objects expect a context to be maintained per thread on
their behalf. Add this context to the thread control block and extend
the thread creation functions with the ability to supply a context.
uVisor doesn't set the PSP of the target thread. The RTOS sets the PSP
of the target thread from the target thread's TCB. However, when
interrupts of higher priority than PendSV happen between the call to
uVisor to switch boxes, and the RTOS setting PSP, the uVisor vIRQ
interrupt handler will attempt to use an invalid PSP (the PSP from
before the box and thread switch). This leads to a crash. Make box and
thread switching atomic by disabling interrupts immediately before the
box switching until immediately after the new PSP is set.
CMSIS repo does not support pre-processor defines, hence multiple assembly
files are added for secure/non-secure and floating point tools.
Mbed OS tools support assembly file pre-processing, but the build system
does not support multiple assembly files for each target, hence updating
the assembly files.
mbed OS used older RTX4 version and with osThreadDef accepting only 3
parameters, to preserve compatibility we hardcode the 'instances'
parameter to 1.
(cherry picked from commit 428acae1b2ac15c3ad523e8d40755a9301220822)
Default value for timer/idle thread trustzone identifier is 0, updated
it to 1 to allow threads to access secure functions when timer is secure device.
Systick handler switch to secure/nonsecure issues addressed:
1. Switch to secure/nonsecure context save/restore is based on 6th bit in
LR register, correct the bug (R7 instead of LR was used for decision)
2. Prevent R7 from being corrupted in Sys_ContextSave
3. Branch when non-secure rather than secure
CMSIS repo does not support pre-processor defines, hence multiple assembly
files are added for secure/non-secure and floating point tools.
Mbed OS tools support assembly file pre-processing, but the build system
does not support multiple assembly files for each target, hence updating
the assembly files.
Remove the assert that the tick count of the OS matches the tick
count of the tickless timer as this occurs frequently when
debugging. This is because the function svcRtxKernelResume
only increments the OS's tick count until the next wakeup event
so if the device was halted by a debugger past the next wakeup
event the tick counts will be out of sync.
armcc fopen allocated a mutex using the retargeted system-level
_mutex_initialize function. Interestingly, malloc also uses this
same _mutex_initialization function, which prevents a full solution
relying on malloc. The solution previously implemented involved using
the rtx mutex pool for the first 8 mutexes, then falling back on
malloc.
The previous implementation relied on osMutexNew returning an error
on out-of-memory. An unrelated change causes osMutexNew to instead
assert (except for release mode). This meant if you exceed 8 system-
level mutexes in armcc you will hit an assert. Since the filesystem
code can call fopen an unlimited number of times, this is a problem.
Solution is to keep track of which static mutexes we've allocated, so
we know before calling osMutexNew if we need to call malloc.
Also _mutex_free never deallocated the malloced mutexes, which would
cause fopen to leak memory.
uVisor doesn't set the PSP of the target thread. The RTOS sets the PSP
of the target thread from the target thread's TCB. However, when
interrupts of higher priority than PendSV happen between the call to
uVisor to switch boxes, and the RTOS setting PSP, the uVisor vIRQ
interrupt handler will attempt to use an invalid PSP (the PSP from
before the box and thread switch). This leads to a crash. Make box and
thread switching atomic by disabling interrupts immediately before the
box switching until immediately after the new PSP is set.
OsEventObserver objects expect a context to be maintained per thread on
their behalf. Add this context to the thread control block and extend
the thread creation functions with the ability to supply a context.
Add the OsEventObserver mechanism. A client interested in receiving
notifications on certain OS events can register to receive notifications
with osRegisterForOsEvents. This is useful for clients like the secure
memory allocator, which observes thread switching events in order to
swap in and out different memory allocator objects.
mbed OS used older RTX4 version and with osThreadDef accepting only 3
parameters, to preserve compatibility we hardcode the 'instances'
parameter to 1.
The current mbed-os drivers rely on a tickrate of 1ms for timing.
This means that if OS_TICK_FREQ is set to any value other than 1000
then mbed-os driver will no longer delay for the correct amount of
time. To prevent this from happening this patch triggers a compile
time error if a tickrate other than 1m is used.
The osKernelGetTickCount() is the only function to get kernel tick information,
however it's not allowed to access in ISR.
It's already enabled in API v2.1.1.
Some Cortex-M0 devices, such as the nrf51, don't have the SysTick.
Instead, these targets use a software interrupt to simulate SysTick.
Add the hooks in the tickless code to support these devices. Targets
which do not have SysTick should now define NO_SYSTICK in targets.json
and implement mbed_get_m0_tick_irqn to add os suport.
This patch also removes os tick handling from the existing devices
(nrf51) since this is now handled in common code.
Add support for tickless by replacing RTX's SysTick timer code with
with code which uses an mbed timer along with suspending and
resuming the kernel in the idle loop. Tickless is enabled on a
per-target basis by defining the macro MBED_TICKLESS.
Senthil Ramakrishnan
Bartek Szatkowski
Jaeden Amero
deepikabhavnani
Cruz Monrreal
ccli8
Martin Kojtal
Kevin Bracey
Filip Jagodzinski
Russ Butler
Jimmy Brisson
Cruz Monrreal II
Tamas Kaman
Martin Kojtal
Vladimir Umek
Robert Rostohar
Christopher Haster
Anna Bridge
Maciej Bocianski
Viller Hsiao