Commit Graph

57 Commits (04c0e4fe5c022f45d84f0a1fee64437b103c0477)

Author SHA1 Message Date
Martin Kojtal d2e9136ddb
Merge pull request #9167 from TomoYamanaka/hanlder_without_RTOS
Modify IRQ handler processing when unusing RTOS at Cortex-A
2019-01-04 08:42:11 +00:00
Martin Kojtal e245c1ecda
Merge pull request #9150 from kjbracey-arm/armc6_fpu
Check correct ARMC6 predefine for FP codegen
2018-12-20 10:47:32 +00:00
TomoYamanaka 65b4e72928 Modify IRQ handler processing without RTOS at Cortex-A IAR Compiler
In case of unusing RTOS, there is no processing against IRQ handler and it causes a linker error.
Therefore, I added this processing with WEAK attribute. Also I added cmain.S file at cmsis/TARGET_CORTEX_A folder.
2018-12-20 16:24:07 +09:00
Kevin Bracey 91f0be6ac3 Check correct ARMC6 predefine for FP codegen
For ARMC6, CMSIS headers were checking the `__ARM_PCS_VFP`, which
indicates hardfp ABI in use, when they need to check whether FP
code generation is enabled. Change this to `__ARM_FP`, so it
works for platforms using softfp ABI.

Change already present in CMSIS_5 repo, via commit
969822ae162539d50617d1e5a3634ee2fd3b60f6, but redone with local
search-and-replace.
2018-12-19 13:03:11 +02:00
Kevin Bracey f04904c6e8 CM3: Make ACTLR bit definitions conditional
The ACTLR register itself is conditional on chip revision, but its
bit definitions were always defined.

Make the the bit definitions also conditional, so it is possible to
produce portable code that sets DISDEFWBUF if available:

    #ifdef SCnSCB_ACTLR_DISDEFWBUF_Msk
       SCnSCB->ACTLR |= SCnSCB_ACTLR_DISDEFWBUF_Msk;
    #endif

(cherry-picked from CMSIS b2b04dbeece0a046556bfc320bef6b20bef3f16f)
2018-12-13 16:31:53 +02:00
Naveen Kaje 091010e9a2 mbed_fault_handler: fix build warning
Fixes warning

BUILD\NRF52840_DK\GCC_ARM\mbed-os\cmsis\TARGET_CORTEX_M\mbed_fault_handler.o
.\mbed-os\cmsis\TARGET_CORTEX_M\mbed_fault_handler.c
[Warning] mbed_fault_handler.c@149,5: implicit declaration
of function 'memcpy' [-Wimplicit-function-declaration]
2018-12-11 14:59:36 -06:00
Senthil Ramakrishnan a07a373c9f Change the reboot-max value semantics and code style and other fixes 2018-11-16 14:00:00 -06:00
Senthil Ramakrishnan 6181394e37 Error and fault handling changes for crash reporting 2018-11-16 13:59:59 -06:00
Kevin Bracey 82a90721eb Fault handler: fix printf format specifiers 2018-10-31 14:49:21 +02:00
Senthil Ramakrishnan 230ba03582 Space optimization to fault handlers 2018-10-23 13:05:56 -05:00
Senthil Ramakrishnan 797538c854 Moving fault handlers under cmsis 2018-10-23 13:05:56 -05:00
Russ Butler c13c3e30cd Fix the CMSIS macro ARM_MPU_RASR
The update to CMSIS 5.4.0 broke the macro ARM_MPU_RASR. This patch
pulls in the upstream fix from CMSIS:
2ead2adffb (diff-e4bfba5228373d368ac2543d6e5bd4d0)
2018-09-18 17:50:21 -05:00
Russ Butler 308dfe3a53 Fix CMSIS __RESTRICT define for IAR
Revert the define __RESTRICT from "__restrict" to "restrict". This
fixes compilation for IAR.
2018-08-25 20:41:12 -05:00
Deepika fb354752eb CMSIS/RTX: Patch to conditionally compile
tz_context.c should be compiled only for secure world,
definition of API's in tz_context.h should be part of secure
binary/bootloader when building mbed-os as non-secure

(Cherry picked from d0a43b8af0)
2018-08-25 20:41:10 -05:00
Bartek Szatkowski ace5df9079 CMSIS/RTX: Reintroduce arm_math.h
(cherry picked from commit 6a6e3ac0eb)
2018-08-25 20:41:10 -05:00
Russ Butler 342841aa0f [CMSIS_5]: Updated to 0b521765 2018-08-25 20:41:00 -05:00
Oren Cohen 787317b7eb Remove uVisor from mbed-os 2018-08-22 16:36:59 +03:00
Toyomasa Watarai c37875c690 Add volatile modifier for CP15 accessors
Add volatile modifier to prevent ARM compiler to remove inline function calls for __set_CP and __get_CP.
2018-06-07 16:47:12 +09:00
Cruz Monrreal 1fa333df82
Merge pull request #7032 from TomoYamanaka/feature-rtx_update
Update cmsis/rtx for Cortex-A
2018-06-02 20:52:40 -05:00
ccli8 58608ec589 Fix RTOS-less build failed with cmsis/RTE_Components.h 2018-05-30 15:25:01 +08:00
Vladimir Umek b6c4139328 RTX5: ignoring CPUID field in GIC implementation
updated interrupt handler for GCC and IAR
2018-05-28 13:54:44 +09:00
Bartek Szatkowski 6a6e3ac0eb CMSIS/RTX: Reintroduce arm_math.h 2018-05-14 12:18:21 +01:00
Jaeden Amero cb2b91cac7 CMSIS/RTX: uVisor: Import v0.30.0 2018-05-14 12:18:21 +01:00
Bartek Szatkowski 07aad3c862 CMSIS/RTX: Adapt Mbed OS to CMSIS/RTX device support scheme 2018-05-14 12:18:21 +01:00
Bartek Szatkowski 8afbd66763 [CMSIS_5]: Updated to 49ac527a 2018-05-14 12:18:20 +01:00
ccli8 02730f0d35 Move defines into "cmsis/RTE_Components.h" to make CMSIS files less changed 2018-04-26 11:31:03 +08:00
ccli8 47c3197f13 Support RTOS-less secure image build with Cortex-M23/M33 2018-04-26 09:33:09 +08:00
Deepika d0a43b8af0 CMSIS/RTX: Patch to conditionally compile
tz_context.c should be compiled only for secure world,
definition of API's in tz_context.h should be part of secure
binary/bootloader when building mbed-os as non-secure
2018-04-11 11:41:26 -05:00
Deepika 4043d95396 Trustzone stack requirement for Mbed-OS is 512 bytes
Added config parameter for TZ stack size and update code to add correct header
file.
2018-03-28 11:20:11 -05:00
Deepika ae2e2b942b Add TZ_context function
TZ_context functions are part of secure state binary and are used to handle
secure stack for thread execution.Template implementation from CMSIS is used,
can be enhanced in future.
2018-03-27 10:51:19 -05:00
Jonatan Antoni 063717d90d Core(A): Changed macro __DEPRECATED to CMSIS_DEPRECATED. (Issue #287)
__DEPRECATED conflicts with a predefined macro in GCC C++ mode.
2017-12-21 14:09:25 +09:00
Jonatan Antoni 2f06202a9b Core(A): Refactored L1 Cache maintenance to be compiler agnostic.
- Added L1 Cache test cases to CoreValidation.
- Adopted FVP Cortex-A configs to simulate cache states.
2017-12-21 14:09:25 +09:00
TomoYamanaka 11ec7a2209 CMSIS-Core(A): Add MMU section_normal_nc macro
I added the macro definition for non-cache area.
2017-12-21 14:09:25 +09:00
Daniel Brondani 0c1961a724 CMSIS-Core(A): Fixed enumerated type increment in GIC_DistInit and GIC_CPUInterfaceInit functions 2017-12-21 14:09:25 +09:00
Robert Rostohar 56602562ad Core(A): Updated __FPU_Enable function (VFP register count detection) 2017-12-21 14:09:25 +09:00
Bartek Szatkowski 6e11dc2c4a Modification to arm_math.h
Remove redefinition of __CLZ and __SSAT.
2017-11-10 09:53:42 +00:00
Bartek Szatkowski 106f34e2ed Add arm_math.h 2017-11-10 09:53:42 +00:00
Bartek Szatkowski 20357bc1fa CMSIS/RTX: Reintroduce core_cmSecureAccess.h lost during CMSIS update 2017-11-01 09:25:42 +00:00
Martin Kojtal 02d01f42a6 CSMIS/RTX: cmain IAR: add mbed main
This fixes #4602 issue, mbed_main should be invoked right before the real main
2017-11-01 09:25:42 +00:00
Bartek Szatkowski 5d6abd6572 CMSIS/RTX: Patch RTX includes to match mbed OS scheme 2017-11-01 09:25:42 +00:00
Bartek Szatkowski a03591d6e3 CMSIS/RTX: Update CMSIS and RTX to 22b68c
This includes Cortex A support and directory reshuffle.
2017-11-01 09:25:42 +00:00
Deepika 9422c351e4 Initial RTX and tools support for Cortex M-23/M-33 devices 2017-09-11 11:43:26 -05:00
Martin Kojtal 0eb4cf0da9 Add cortex-a cache file
Fixes #4759

This was removed during cmsis5 update. Here is original file:
https://github.com/ARMmbed/mbed-os/blob/mbed-os-5.4/cmsis/TOOLCHAIN_IAR/TARGET_CORTEX_A/cache.S and
https://github.com/ARMmbed/mbed-os/blob/mbed-os-5.4/cmsis/TOOLCHAIN_GCC/TARGET_CORTEX_A/cache.S
2017-08-09 06:49:58 +01:00
Martin Kojtal 857ec23db8 cmain IAR: add mbed main
This fixes #4602 issue, mbed_main should be invoked right before the real main
2017-06-21 15:29:55 +01:00
Martin Kojtal dad71c4268 cmsis: add core_ca9 for backward compatibility
cmsis 5 does not include it but as mbed 2 requires this, we will bring this file
back. This brings back few other dependencies, that we add only for cortex-a.

Once cortex-a gets cmsis5 and rtx2 support it will be updated.
2017-06-15 13:08:48 +01:00
Bartek Szatkowski 7b022f8785 Modify CMSIS 5 so it is suitable for mbed-os
Make changes to the files taken from RTX5/CMSIS5 so they work
with mbed-os and uvisor.
2017-05-30 18:53:38 +01:00
Bartek Szatkowski a9a29a4529 Pull in CMSIS 5 files
Pull in unmodified CMSIS5 files from the repository
https://github.com/ARM-software/CMSIS_5.git from the commit
c1b4232f4a98275dd79ebc99cf9b5da5053def4d.

The files were copied as shown below with source->dest_dir.
CMSIS_5/CMSIS/Core/Include/core_*.h -> mbed-os/cmsis/
CMSIS_5/CMSIS/Core_A/Include/core_*.h -> mbed-os/cmsis/
CMSIS_5/CMSIS/DSP/Include/arm_math.h -> mbed-os/cmsis/
CMSIS_5/CMSIS/Core/Include/tz_context.h -> mbed-os/cmsis/
CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h -> mbed-os/cmsis/TARGET_CORTEX_M/
CMSIS_5/CMSIS/Core/Include/cmsis_arm*.h -> mbed-os/cmsis/TARGET_CORTEX_M/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/Core/Include/cmsis_gcc*.h -> mbed-os/cmsis/TARGET_CORTEX_M/TOOLCHAIN_GCC/
CMSIS_5/CMSIS/Core_A/Include/cmsis_compiler.h -> mbed-os/cmsis/TARGET_CORTEX_A/
CMSIS_5/CMSIS/Core_A/Include/cmsis_arm*.h -> mbed-os/cmsis/TARGET_CORTEX_A/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/RTOS2/RTX/Library/cmsis_os1.c -> mbed-os/rtos/rtx/
CMSIS_5/CMSIS/RTOS2/Include/cmsis_os2.h -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/
CMSIS_5/CMSIS/RTOS2/RTX/Config/* -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/
CMSIS_5/CMSIS/RTOS2/RTX/Include1/* -> mbed-os/rtos/rtx/
CMSIS_5/CMSIS/RTOS2/RTX/Include/* -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/
CMSIS_5/CMSIS/RTOS2/RTX/Source/rtx_* -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/
CMSIS_5/CMSIS/RTOS2/RTX/Source/core_cm.h -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/
CMSIS_5/CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_GCC/
CMSIS_5/CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_IAR/
CMSIS_5/CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_GCC/
CMSIS_5/CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_IAR/
CMSIS_5/CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_GCC/
CMSIS_5/CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_IAR/
CMSIS_5/CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_RTOS_M4_M7/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_RTOS_M4_M7/TOOLCHAIN_GCC/
CMSIS_5/CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_RTOS_M4_M7/TOOLCHAIN_IAR/
2017-05-30 18:53:37 +01:00
Russ Butler fd233778db Remove RTOS and CMSIS files
Remove the RTOS and CMSIS files in preperation for CMSIS 5. Note that
the RTOS heap ad stack test is left since this is still applicable to
RTX5. This file can be found here:
rtos\rtx\TARGET_CORTEX_M\TESTS\memory\heap_and_stack\main.cpp
2017-05-30 18:53:37 +01:00
AndersLundgren 0167cbde31 Update cmain.S 2017-05-24 13:23:26 +02:00
Martin Kojtal e0dded3b3b Revert partially "Remove Cortex A support from CMSIS/RTOS"
This reverts commit 5f29445103 - but only partially.

cmain.S for IAR is still required to keep mbed SDK boot process as it was. This
startup file for IAR is active for non-rtos projects.

Fixes #4330
2017-05-17 14:14:39 +01:00