Jimmy Brisson
cfcf9a1a18
Reformat part of project.py
2018-07-15 22:53:44 -05:00
Jimmy Brisson
3f0391984f
Move exporter alias handling into CLI
2018-07-15 22:53:44 -05:00
Jens Alfke
b0f31e38b5
Recognize ".cc" and ".hh" source file extensions
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".cc" --> C++ source code
".hh" --> header
This change allows existing source code with this naming
convention (e.g. my company's) to be used in mbed.os projects.
2018-07-15 22:53:44 -05:00
bcostm
0f9a956799
save/restore timer registers before/after deepsleep
2018-07-15 22:53:31 -05:00
bcostm
c6ad478492
Use elapsed time only for 16bit timer
2018-07-15 22:53:31 -05:00
bcostm
f2d824adb4
Re-enable IT CC1 after deepsleep
2018-07-15 22:53:31 -05:00
bcostm
5bfabde855
HAL_GetTick returns elapsed time
2018-07-15 22:53:31 -05:00
bcostm
878ce6f72a
Use us_ticker_read while SDK is not ready
2018-07-15 22:53:31 -05:00
Brendan McDonnell
a65e92ea95
FatFs 0.13b hotfix - fix readdir() never terminates when dir is full.
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http://elm-chan.org/fsw/ff/patches.html
http://elm-chan.org/fsw/ff/ff13b_p1.diff
https://github.com/ARMmbed/mbed-os/issues/5780
2018-07-15 22:53:31 -05:00
Mahesh Mahadevan
fa73e7db49
MXRT1050: Ensure the pins are in input mode for analogin
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Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2018-07-15 22:53:31 -05:00
ccli8
98b0621377
Change PLL clock source to HIRC instead of HXT
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This change is to reduce delay of wake-up from power-down to pass Greentea test.
Because HIRC's accuracy is worse than HXT's, we must switch back to HXT for e.g. USBD application.
This can be done through setting NU_CLOCK_PLL to NU_HXT_PLL.
2018-07-15 22:53:31 -05:00
Mahesh Mahadevan
94a36b5a01
MIMXRT1050_EVK: Move clock enable after check of pin
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Enable clock could return an error if pin is NC
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2018-07-15 22:53:31 -05:00
Mahesh Mahadevan
d8f9c98590
MIMXRT1050_EVK: Fix the GPIO IRQ number assignements
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Use the GPIO_Combined IRQ array
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2018-07-15 22:53:31 -05:00
Kevin Bracey
b110ef4c1c
Improve efficiency and formatting of ITM output
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SerialWireOutput was outputting 1 character per 32-bit write to the
ITM stimulus port. This is inefficient, and causes processing problems
with some viewers due to them receiving 3 NUL bytes between each
desired character.
Rework to allow us to be more efficient, and eliminate those NUL bytes:
* Retain existing mbed_itm_send() and clarify it's a single 32-bit write.
* Add new mbed_itm_send_block() that is appropriate for sending
character data, and modify SerialWireOutput to use it.
* Move "wait for FIFO ready" check to before the write, rather than
after.
One minor correction - FIFOREADY is a single bit of the register read.
Don't interpret reserved bits.
2018-07-15 22:53:31 -05:00
Mika Leppänen
6cc1de13eb
Modified Wiced drivers EMAC instance get
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Removed EMAC get_default_instance() since WLAN drivers are not default EMAC drivers.
Moved EMAC static declaration inside get_instance().
2018-07-15 22:53:31 -05:00
Senthil Ramakrishnan
3a01d3f469
Fix wrong config binding
2018-07-15 22:53:31 -05:00
Marcus Chang
dc297a3d0e
Fix target definition for NRF52 series
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* Removed RTC, NRF52840 doesn't support RTC API.
* Reorganized DEVICE_HAS order for NRF52832.
2018-07-15 22:53:31 -05:00
Marcus Chang
7b7d9ccca6
Fix interrupt initialization for NRF52 series
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In some cases the UARTE interrupt would be enabled with pending
interrupts. This commit ensures that interrupts are only enabled
from a known state.
2018-07-15 22:53:31 -05:00
jeromecoutant
b77da51c2f
DISCO STM32L4 : Add TWO_RAM_REGIONS macro
2018-07-15 22:53:31 -05:00
PHST
9d1b292e8f
Make clock source changeable over mbed_app.json
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By adding the missing include the clock source for EFM32-Targets is changeable over mbed_app.json.
2018-07-15 22:53:31 -05:00
Jimmy Brisson
4dfc20ccd8
Use defaultdict in the other place
2018-07-15 22:53:31 -05:00
Jimmy Brisson
573fd4f739
Summarize memory map when --stats-depth is 0
2018-07-15 22:53:31 -05:00
bcostm
57762fbab8
DISCO_L496AG: update LEDs comments in PeripheralPins.c
2018-07-15 22:53:30 -05:00
bcostm
1c26b2efc2
DISCO_L496AG: change LED1 and LED2 pins
2018-07-15 22:53:30 -05:00
Maciej Bocianski
cef5dbb22e
add kernel ticker test
2018-07-15 22:53:30 -05:00
Mahesh Mahadevan
8cb0baf73b
LPC546XX: Fix UART mux setting in the LPCXpresso board
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Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2018-07-15 22:53:30 -05:00
ccli8
6de4b3532c
Fix memory leakage with MBR on exiting error path
2018-07-15 22:53:30 -05:00
TomoYamanaka
83cd02e501
Improve the process for Cortex-A9 in mbed_application
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I added the powerdown func by GIC in mbed_application because Cortex-A9 use GIC instead of NVIC.
This process prevent unexpected interrupt when updating software by using bootloader.
2018-07-15 22:53:30 -05:00
Jimmy Brisson
5773e80bb5
Add a test for MDK pro version detection
2018-07-15 22:53:30 -05:00
Jimmy Brisson
cff8651863
Use Component section for ARM compiler version
2018-07-15 22:53:30 -05:00
Martin Kojtal
e2ee137cb7
platform: astyle update
2018-07-15 22:53:30 -05:00
Martin Kojtal
5db427a77f
hal: astyle update
2018-07-15 22:53:30 -05:00
Martin Kojtal
fd528ff6a9
AStyle: ignore hal storage abstraction
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Deprecated API thus no changes there
2018-07-15 22:53:30 -05:00
Martin Kojtal
aad7092798
drivers: astyle update
2018-07-15 22:53:19 -05:00
ccli8
e80622b60d
Synchronize lp_ticker code to us_ticker
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This is to make us_ticker/lp_ticker code consistent.
2018-07-15 22:53:19 -05:00
ccli8
70a1e3ab1e
Remove special handling for dummy interrupt in lp_ticker
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It is because dummy interrupt is very rare or pending time caused by it
is very short.
2018-07-15 22:53:19 -05:00
ccli8
afe5c7d4af
Synchronize lp_ticker code to us_ticker
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This is to make us_ticker/lp_ticker code consistent.
2018-07-15 22:53:19 -05:00
ccli8
acef3f6375
Fix trap in lp_ticker ISR with non-blocking "clear interrupt flag"
2018-07-15 22:53:19 -05:00
ccli8
e20d259ddf
Synchronize lp_ticker code to us_ticker
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This is to make us_ticker/lp_ticker code consistent.
2018-07-15 22:53:19 -05:00
ccli8
6e808c7668
Reduce blocking code in lp_ticker
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1. Introduce S/W interrupt enable/disable to reduce calls to TIMER_EnableInt/TIMER_DisableInt.
2. Allow dummy interrupt because clear interrupt flag is not synchronized.
3. Enable LPTICKER_DELAY_TICKS to make lp_ticker_set_interrupt non-blocking.
2018-07-15 22:53:19 -05:00
ccli8
65a15a3dd3
Fix Greentea test code
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Mark mbed-os-tests-mbed_hal-common_tickers/time_cpu_cycles not in-lined.
Otherwise, time_cpu_cycles may be in-lined somewhere and takes different
CPU cycles on invocation.
2018-07-15 22:53:03 -05:00
ccli8
3034630f20
Adjust static/dynamic memory allocation for IAR toolchain to pass Greentea test
2018-07-15 22:53:03 -05:00
ccli8
3bacccb42f
Fix CLK_Idle incorrectly enters into deep sleep mode
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This can happen with CLK_PowerDown() called first and then CLK_Idle() called.
2018-07-15 22:53:03 -05:00
ccli8
95d0e51fce
Meet new lp_ticker HAL spec (Mbed OS 5.9)
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1. Add LPTICKER in device_has option of targets.json file.
2. Disable ticker interrupt in lp_ticker_init
3. Add lp_ticker_free
4. Enable interrupt in lp_ticker_set_interrupt
2018-07-15 22:53:03 -05:00
ccli8
ae68c9a707
Meet new us_ticker HAL spec (Mbed OS 5.9)
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1. Add USTICKER in device_has option of targets.json file.
2. Disable ticker interrupt in us_ticker_init
3. Add us_ticker_free
4. Enable interrupt in us_ticker_set_interrupt
2018-07-15 22:52:48 -05:00
Tero Jääskö
7e68ac09e6
netsocket: dns: make dns-cache-size:0 remove whole DNS cache code
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Setting ""nsapi.dns-cache-size": 0" still left some of the DNS
caching code in. Add crude #if to remove all of it.
This allows one to save 429 bytes of flash and 48 bytes of RAM on
ARMC5 builds.
2018-07-15 22:48:50 -05:00
Amanda Butler
1f155291be
Copy edit LoRaWANBase.h
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Copy edit for precise language and comma use.
2018-07-15 22:48:50 -05:00
Amanda Butler
59097d0611
Copy edit LoRaWANinterface.h
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Copy edit for precise language and comma use.
2018-07-15 22:48:50 -05:00
Hasnain Virk
62165514ee
Correcting doxygen
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Use of MSG_FLAGS was updated in previous PRs but the doc was not updated
accordingly.
2018-07-15 22:48:50 -05:00
Marcus Chang
6166005eaa
Fix typo in NRF52 series README.md
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UART configuration parameters mispelled.
2018-07-15 22:48:50 -05:00