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90 Commits (mbed-os-5.6)

Author SHA1 Message Date
Mahadevan Mahesh 0bf774b925 LPC546XX: Add ENET support 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-12-01 17:01:45 +00:00
gorazd b5795afb72 lpc546xx: remove obsolete line 2017-12-01 17:01:43 +00:00
gorazd c9358fe5c3 lpc546xx: correct register name (DIGIMODE) 2017-12-01 17:01:43 +00:00
gorazd 44d45d4023 lpc546xx: fix adc Resolve #5304 2017-12-01 17:01:43 +00:00
gorazd 9f9666eced add new target L-Tek FF-LPC546XX 2017-11-17 14:55:46 +00:00
Kevin Gilbert 136aac92b4 Replace PACKED attribute on lpc4088 ethernet structs with MBED_PACKED. Placement of packed attribute was causing warnings due to following typedef 2017-11-03 12:59:06 +00:00
Piotr Grygorczuk 78b6f82e9d lpc1769 inherits from lpc1768; reuse lpc1768.ld for LPC1769 target 2017-11-03 12:59:06 +00:00
Piotr Grygorczuk 3724b25626 mbed LPC1768 & Xpresso LPC1769 unified 
Target of LPC1769 links to mbed LPC1768.
The PinNames.h has conditional compile for the pin names.
LWIP lpc17xx emac driver modified to allow LPC1769 target
 2017-11-03 12:59:05 +00:00
Piotr Grygorczuk 33545bbd18 LPCXpresso LPC1769 board ported 
The blinky example compiles and runs.
The board has a different eth phy component than mbed LPC1768. It requires a driver.
 2017-11-03 12:59:05 +00:00
Chris Snow 2b0ff329d6 Simplify CRP placement. 2017-10-20 16:18:26 +01:00
Chris Snow e0c2ea2876 Ensure CRP is set correctly for IAR, GCC and ARM 
CRP value can be set through a macro in mbed_app such as
"macros": [
    "CRP=CRP_NONE"
]
 2017-10-20 16:18:26 +01:00
Chris Snow 224ac4d453 Linker update for bootloader support 2017-10-20 16:18:26 +01:00
Chris Snow 2461d0c506 Move CRP out of startup and into CRP.c so it can be conditionally compiled 2017-10-20 16:18:26 +01:00
Mahadevan Mahesh 95b6acd095 Change LPC54608 to LPC546XX to include support for LPC54608/18/28 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-10-06 14:12:47 +01:00
Mahadevan Mahesh 982eb08e19 RTC HAL: Allow writing 0 to the seconds register 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-10-06 14:12:46 +01:00
Mahadevan Mahesh ee2c0c8811 LPC54608: Swap LED pin connections to match naming on the board 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-10-06 14:12:46 +01:00
Russ Butler 12861a330d Fix LPC54114 vector table size 
Correct the vector table size on the LPC54114. This fixes crashes
seen on boot when building with GCC.
 2017-10-06 14:12:44 +01:00
Martin Kojtal 2efe09db30 LPC1768: flash_hal removal duplication 
IAP typedef duplication removal
 2017-09-25 17:11:37 -05:00
Martin Kojtal de51972ffb LPC1768: flash erase/write require a critical section 
From RM:

32.3.2.6 Interrupts during IAP
The on-chip flash memory is not accessible during erase/write operations. When the user
application code starts executing the interrupt vectors from the user flash area are active.
The user should either disable interrupts, or ensure that user interrupt vectors are active in
RAM and that the interrupt handlers reside in RAM, before making a flash erase/write IAP
call. The IAP code does not use or disable interrupts.
 2017-09-25 17:11:37 -05:00
Martin Kojtal ba019fdda7 LPC1768: RAM end adjust fix 
The topmost 32 bytes used by IAP functions, this was not included in the RAM
end previously.
 2017-09-25 17:11:37 -05:00
Chris 56777ab64a Code tidy 2017-09-24 21:34:29 +01:00
Chris 1e454c4b92 Code tidy. 2017-09-24 21:34:29 +01:00
Chris 0711bb14e6 Tidy if else code aligment. 2017-09-24 21:34:28 +01:00
Chris d3b1f69c2d Resolve warning 2017-09-24 21:34:28 +01:00
Chris 606f205e5b Remove SET_VALID_CODE 2017-09-24 21:34:28 +01:00
Chris 3c9f8ce716 Code tidy. 2017-09-24 21:34:28 +01:00
Chris 6d97b8961b Fix flash_mapping_alignment_test so that invalid addresses are reported correctly. Tidy up 2017-09-24 21:34:28 +01:00
Chris 272b9cc2ca Ensure IAP uses word boundary aligned data. 2017-09-24 21:34:28 +01:00
Chris 1382e61f4f missing CR 2017-09-24 21:34:28 +01:00
Chris e5bc908b46 initial IAP routine 2017-09-24 21:34:28 +01:00
Jimmy Brisson cd4fd86f1f Correct Freescale + NXP compiler detection macros 
Also removes duplication of common files
 2017-09-11 13:20:32 -05:00
Jimmy Brisson 15a9a0382b Enable Compiling with ARMC6 across all targets 
remove duplicate sys.cpp
 2017-09-11 13:20:32 -05:00
Martin Kojtal bb26bd6d2d Revert "Adjusting Stack size Allocation (IAR, LPC176x)" 
This reverts commit fce2ca2122.
 2017-09-06 13:56:27 +01:00
Hasnain Virk fce2ca2122 Adjusting Stack size Allocation (IAR, LPC176x) 
Since mbed-os 5.4.3, something increased foot print of mbed-os and the applications that were barely fitting in started to spill.

IAR toolchain for LPC176x target family is set to use 2 RAM regions (32K each). RAM region
2 is being used for ETH/USB and 1 is being used for vector table, stack/heap/static data.

In this commit we have decreased heap size allocation from 8K to 7K so that the is more room for stack and static data.
 2017-09-04 14:54:42 +03:00
toyowata da7fa0dd2a [HAL LPC43xx] Fix mask bits for SPI clock rate 2017-08-09 16:51:31 +09:00
toyowata 72e8241ee0 [HAL LPC408x] Fix mask bits for SPI clock rate 2017-08-09 16:51:31 +09:00
toyowata cb9b2b0456 [HAL LPC13xx] Fix mask bits for SPI clock rate 2017-08-09 16:51:31 +09:00
toyowata db2da2e932 [HAL LPC11xx_11Cxx] Fix mask bits for SPI clock rate 2017-08-09 16:51:31 +09:00
toyowata aa334b0d3e [HAL LPC11Uxx] Fix mask bits for SPI clock rate 2017-08-09 16:51:31 +09:00
toyowata fdc071d5e8 [HAL LPC11U6x] Fix mask bits for SPI clock rate 2017-08-09 16:51:31 +09:00
toyowata 9ad17b21a2 [HAL LPC176x] Fix mask bits for SPI clock rate 2017-08-09 16:51:31 +09:00
Martin Kojtal c8d43aeb2d LPC MCUXpresso: fix write_fill argument for block write function 
The latest HAL extension was not applied to the LPC MCUXpresso targets.
 2017-07-25 10:26:40 +01:00
Jimmy Brisson 1f94ede86c Merge pull request #4744 from deepikabhavnani/spi_issue_4743 
Allow user to set default transfer byte for block read
 2017-07-24 14:45:30 -05:00
Jimmy Brisson c20154234f Merge pull request #4756 from 0xc0170/fix_4613 
Fix #4613: remove duplicated startup files for MICRONFCBOARD
 2017-07-24 10:56:57 -05:00
Deepika 1b797e9081 Closed review comments 
1. Doxygen and Grammar related
2. Change dummy to spi_fill
3. Remove NXP driver and add default loop in spi block read (same as all
other drivers)
 2017-07-21 09:46:22 -05:00
Mahadevan Mahesh 316b859baf LPC: Move platform specific code out of the analog api file 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-07-20 13:16:06 -05:00
Mahadevan Mahesh 7d8b6d7684 LPC: Move platform specific code out of sleep api file 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-07-20 13:15:59 -05:00
Mahadevan Mahesh dfe2d3ba4c Add support for LPC54608 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-07-20 13:15:51 -05:00
Mahadevan Mahesh aee6f7b227 Add mbed support for LPCXpresso54114 board 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-07-20 13:15:36 -05:00
Martin Kojtal a7f9dc66b8 Fix #4613: remove duplicated startup files for MICRONFCBOARD 
Inherits from LPC11U34_421, that defines startup. They were identical.
 2017-07-13 17:03:29 +01:00