Commit Graph

35 Commits (mbed-os-5.15)

Author SHA1 Message Date
Kevin Bracey fb6aa3ef4f Clean up ARM toolchain heap+stack setup in targets
ARM Compiler 6.13 testing revealed linker errors pointing out
conflicting use of `__user_setup_stackheap` and
`__user_initial_stackheap` in some targets. Remove the unwanted
`__user_initial_stackheap` from the targets - the setup is
centralised in the common platform code.

Looking into this, a number of other issues were highlighted

* Almost all targets had `__initial_sp` hardcoded in assembler,
  rather than getting it from the scatter file. This was behind
  issue #11313. Fix this generally.
* A few targets' `__initial_sp` values did not match the scatter
  file layout, in some cases meaning they were overlapping heap
  space. They now all use the area reserved in the scatter file.
  If any problems are seen, then there is an error in the
  scatter file.
* A number of targets were reserving unneeded space for heap and
  stack in their startup assembler, on top of the space reserved in
  the scatter file, so wasting a few K. A couple were using that
  space for the stack, rather than the space in the scatter file.

To clarify expected behaviour:

* Each scatter file contains empty regions `ARM_LIB_HEAP` and
  `ARM_LIB_STACK` to reserve space. `ARM_LIB_STACK` is sized
  by the macro `MBED_BOOT_STACK_SIZE`, which is set by the tools.
  `ARM_LIB_HEAP` is generally the space left over after static
  RAM and stack.
* The address of the end of `ARM_LIB_STACK` is written into the
  vector table and on reset the CPU sets MSP to that address.
* The common platform code in Mbed OS provides `__user_setup_stackheap`
  for the ARM library. The ARM library calls this during startup, and
  it calls `__mbed_user_setup_stackheap`.
* The default weak definition of `__mbed_user_setup_stackheap` does not
  modify SP, so we remain on the boot stack, and the heap is set to
  the region described by `ARM_LIB_HEAP`. If `ARM_LIB_HEAP` doesn't
  exist, then the heap is the space from the end of the used data in
  `RW_IRAM1` to the start of `ARM_LIB_STACK`.
* Targets can override `__mbed_user_setup_stackheap` if they want.
  Currently only Renesas (ARMv7-A class) devices do.
* If microlib is in use, then it doesn't call `__user_setup_stackheap`.
  Instead it just finds and uses `ARM_LIB_STACK` and `ARM_LIB_HEAP`
  itself.
2019-10-23 14:53:49 +03:00
jeromecoutant 96a773a0e6 STM32L4: update drivers version to CUBE V1.14.0 2019-07-19 13:15:07 +02:00
jeromecoutant d919498745 STM32: common cmsis.h and device.h 2019-05-27 16:27:41 +02:00
deepikabhavnani 0dc5561991 Guard RAM start and size defines 2019-02-28 19:54:38 -06:00
deepikabhavnani b598dc1f46 Target_STM: Add ARM_LIB_STACK and ARM_LIB_HEAP section
Instead of user defined symbols in assembly files or C files,
use linker scripts to add heap and stack - this is inconsistent
with ARM std linker scripts
2019-02-28 19:54:28 -06:00
Deepika e522c4691e Target_STM:_sbrk updated to use limits from linker files no need to set defines
_sbrk uses the exports from linker file __end and __HeapLimit to allocate memory
in heap. Linker scripts were updated accordingly to set the limits.
2019-02-19 15:49:49 -06:00
jeromecoutant 8e0663f8d8 STM32L496xG: increase IAR heap size 2019-01-17 11:15:19 -06:00
Przemyslaw Stekiel 58f6bf7292 [STM] Support boot stack size configuration option 2019-01-08 15:32:06 +01:00
micgur01 6c191c0241 code review for Update linker scripts for bootloader target L496GZ 2018-10-24 11:17:56 +00:00
micgur01 2215a9ab5e code review for Update linker scripts for bootloader target L496GZ 2018-10-24 09:48:05 +00:00
micgur01 534883046d change mode to 664 2018-10-23 12:58:52 +00:00
micgur01 ff4b567537 Update linker scripts for bootloader for L496GZ 2018-10-23 12:57:05 +00:00
Deepika bf1a2c8485 [ST]: Fix alignment of execute region to 8-byte boundary in ARM linker files
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files should strictly align to 8-byte boundary
2018-10-09 14:47:14 -05:00
bcostm bf8587ed50 STM32L496: fix RAM size in ARM scatter file 2018-07-19 14:02:05 +02:00
bcostm 7097e07b62 stm32 ticker: typo corrections 2018-07-11 14:43:36 +02:00
bcostm d8e839a789 stm32 ticker: change license 2018-07-11 14:43:16 +02:00
bcostm 32031cbab3 stm32 ticker: rename hal_tick.h in us_ticker_data.h 2018-07-11 14:42:44 +02:00
bcostm fbd7a97e19 stm32 ticker: rename macro and update ST HAL Tick functions
- rename TIM_MST_16BIT in TIM_MST_BIT_WIDTH in order to use it directly in ticker info structure
- change HAL_InitTick() and HAL_GetTick()
2018-07-11 14:39:42 +02:00
bcostm b087390a1a Remove HAL_TICK_DELAY (no more used) 2018-06-05 16:53:40 +02:00
jeromecoutant 7979f4d255 SMT32L4 : add missing ST HAL LPUART functions
To enable/disable UART Clock in Stop Mode
2018-01-26 16:24:54 +01:00
bcostm 06f097884c Update stm32l4xxxx.h files 2018-01-12 11:11:32 +01:00
bcostm a4f9012a0a Update stm32l4xx.h files 2018-01-12 11:11:31 +01:00
bcostm 84577f9634 L4 ST CUBE V1.11.0
Update to STM32CubeL4 V1.11.0

Conflicts solved:
	targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/stm32l433xx.h
	targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/stm32l4xx.h
	targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/stm32l496xx.h
	targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/stm32l4xx.h
	targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_conf.h
	targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_def.h
	targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_i2c.c
	targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_spi.h
2018-01-12 11:11:31 +01:00
Pierre-Marie Ancele c476a600a2 remove sys.cpp file of the ARM_STD toolchain as done in the MR #4949 2017-10-06 11:37:03 +02:00
adustm 4e83d7fb15 Fix for IAR tests 2017-10-06 11:35:16 +02:00
adustm 554125ef07 Align IAR files with mbed-os implementation (tests are still failing) 2017-10-06 11:35:16 +02:00
adustm fa54e1ecba Make ARM test pass on mbed-os5 tests 2017-10-06 11:35:16 +02:00
adustm 02df64b7d6 replace tab by spaces 2017-10-06 11:35:16 +02:00
Pierre-Marie Ancele 65fec215ab NUCLEO_L496ZG Fix IAR startup script 2017-10-06 11:35:16 +02:00
Pierre-Marie Ancele 4219ffc626 NUCLEO_L496ZG Fix ARM startup script 2017-10-06 11:35:16 +02:00
Pierre-Marie Ancele 7c6c710ee1 NUCLEO_L496ZG Use correct linker script for IAR 2017-10-06 11:35:16 +02:00
Pierre-Marie Ancele eea667567e STM32L496ZG add IAR toolchain 2017-10-06 11:35:16 +02:00
Pierre-Marie Ancele dc2f29c86e STM32L496ZG add ARM_STD toolchain 2017-10-06 11:35:16 +02:00
Pierre-Marie Ancele 53d66bb013 STM32L496ZG add ARM_MICRO toolchain 2017-10-06 11:35:16 +02:00
Pierre-Marie Ancele 6d3e17cb3c add compatibility with STM32L496xG MCUs 2017-10-06 11:35:16 +02:00