On platforms using coretx m33 accessing the secure memory will cause SecureFault instead of Hardfault.
SecureFault is implemented in the secure image and cannot be changed in runtime.
Add calls to `mbedtls_platform_setup()` and
`mbedtls_platform_terminate()` to the trng greentea test, to
initialize the hardware acceleration engines, in some platforms.
Test checks stack sizes:
- ISR stack: exactly 1KB (with exception for NORDIC - 2KB and RENESAS - Cortex A targets not supported for this test)
- Main thread stack: exactly 4KB (with some exceptions - 3KB)
- Thread stack: exactly 4KB
Frequency setting just after erase operation was causing some data
inconsistencies during write/read operations on some targets (frdm-k82f).
To fix this, frequency setting was moved before flash memory init.
The DEVICE_FOO macros are always defined (either 0 or 1).
This patch replaces any instances of a define check on a DEVICE_FOO
macro with value test instead.
Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
For enhanced security ARMv8-M firmware doesn't allow the hardfault
handler to be hooked by non-secure code. Because of this there is no
way to recover from the MPU fault tests. This PR disables those tests
until hardfault recovery is supported by secure firmware.
Ensure that code written to ram is flushed and that caches are cleared
before attempting to executing from ram. This fixes CI failures on the
MPU test when it is built for Cotex-M7 devices such as the
NUCLEO-F746ZG.
Make the following changes:
-Allow a vector specific ARM MPU driver by defining MBED_MPU_CUSTOM
-Allow ROM address to be configured for ARMv7-M devices by
setting the define MBED_MPU_ROM_END
-Add ROM write protection
-Add new functions and lock
-enable at boot
-disable during flash programming
Create a dedicated MPU directory for standard Arm MPU implementations
in preparation for the Arm v8m MPU. Replace MBED_MPU_ENABLED with
DEVICE_MPU to align with the porting layer of other HAL APIs.
When programming flash using the FlashIAP API allow execution from
ram. Many devices require flashing to be done from RAM.
Also allow execution from ram when running the low level flash tests.
Test that the MPU correctly stops execution of memory in the stack
region, heap region, data region and bss region. Also check that the
MPU can be enabled, disabled and freed.
When DEVICE_LPTICKER is defined set_time() only works correctly on
the first call. This test calls set_time() twice and ensures the
time set by both calls is correct. This test only runs if
DEVICE_RTC or DEVICE_LPTICKER is defined.
1. Add flash config files.
2. Flash used is MX25U3235F, include information for this
device in the flash config file
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Static Thread methods and signal methods have been deprecated. Remove
all references in the main code, and most of the tests. Some tests of
the deprecated APIs themselves remain.
This is fix for issue 8368.
Test is causing some problems on `REALTEK_RTL8195AM` and `ARM` compiler. There is some kind of memory issue. Probably there is not enough memory space for global data provided by the test. Data definitions have been moved into test function body so, they will land on stack. With this fix the test works on `REALTEK_RTL8195AM/ARM`.
Increase delta to 500 us. This value is still short enough to detect
incorrect behavior of the sleep_manager_can_deep_sleep_test_check() fun,
but allows the targets with low LP timer accuracy to pass, i.e.
NUCLEO_F429ZI.
There is no problem with this test during the morph, but some issue has been noticed while testing new Jenkins CI in Oulu on NRF52_DK.
I was able to reproduce the issue locally. The difference between morph and local run is that CPU statistics are enabled on morph. This makes the difference and test passes.
The sleep test case perform sleep for 100 us, 200 us, ... ,1000 us in loop (us ticker wakes the board) and verifies if sleep time matches the assumption.
I got the following results:
sleep wake-up after
100 us ~100 us ok
200 us ~200 us ok
300 us ~300 us ok
400 us ~400 us ok
500 us ~14 us (??)
When requested sleep time is equal to 500 us some unexpected interrupt occurs which wakeup the board and force the test to fail.
Register state just after exit from sleep:
Control and State Register: 0x00400000 (ISRPENDING - Interrupt pending flag is set).
NVIC Interrupt Set-pending Register[0]: 0x00000004 (UARTE0_UART0_IRQn) or 0x00000200 (TIMER1_IRQn - timer used by us ticker).
UART interrupt is generated because of green-tea transmission. We know that it is performed while test is executed since we need to wait before going into deep-sleep since otherwise the transmission will be broken. So to take care of UART interrupt we need to wait before sleep test in the same way like it is done in deep-sleep test.
Add a test to ensure that devices have at least 2K free ram
and 2K free heap. This test should be the first test that fails
due to running out of ram or heap.
- code refactoring and preparation for enabling DPI/QPI tests
- reduced multiple test count to 4
- use common flash config header for all MX25RXX35F chips
- fix sector erase max time on N25Q128A
Kevin Bracey
Ryan Morse
Cruz Monrreal II
Oren Cohen
Ron Eldor
Russ Butler
Martin Kojtal
Przemyslaw Stekiel
jeromecoutant
Maciej Bocianski
Alexander Zilberkant
Alastair D'Silva
Mahesh Mahadevan
RFulchiero
Vincent Coubard
Anna Bridge
Filip Jagodzinski
Amir Cohen
ccli8
Yossi Levy
David Saada
Steven
Qinghao Shi
Ben Cooke