1. Based on alpha version BSP (85564a2716548e7b6d6a79a490c6d94a24cf9bcf)
2. Continuing above, tweak BSP:
(1) Add EPWM_ConfigOutputChannel2() to enable below 1Hz and below 1% duty cycle for PWM output (m460_epwm.h/c).
(2) Add dummy RTC_WaitAccessEnable() for consistency with previous ports (m460_rtc.h).
3. Target NuMaker-M467HJ V0.1 board temporarily
4. Support Arduino UNO form factor for NUMAKER_IOT_M467 target
5. Enable export to Keil/IAR project
- tools/arm_pack_manager/index.json
- tools/export/iar/iar_definitions.json
Targets that use TF-M for their PSA implementation are not compatible
with exporters at this time. Explicitly block use of exporters with TF-M
using targets, for better error messages.
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Adding a new target of HW development kit using [Samsung Exynos i S111](https://www.samsung.com/semiconductor/minisite/exynos/products/iot/exynos-i-s111/) module to Mbed-OS.
This will widen the HW choices of Mbed-OS enabled NB-IoT, GNSS and Security (eFuse, AES, SHA-2, PKA, Secure Storage, Security Sub-System, [PUF](https://en.wikipedia.org/wiki/Physical_unclonable_function)) modules.
Target Name: S5JS100
Co-authored-by: Ivan Galkin <ivan.galkin@samsung.com>
Co-authored-by: Seokwon Lee <swon.lee@samsung.com>
Co-authored-by: Zhizhe Zhu <zhizhe.zhu@samsung.com>
Co-authored-by: Xinyi Zhao <xinyi.zhao@samsung.com>
Add 2 targets for DISCO_H747I dualcore:
* DISCO_H747I -> for CM7 core
* DISCO_H747I_CM4 -> for CM4 core
Current restrictions:
* TICKLESS deactivated
* DeepSleep not supported (DeepSleep wrapped to sleep)
Warning: use of the same IP (example I2C1) by both core at the same time is not prevented,
but is strongly not recommended.
Some Hardware Semaphore are use for common IP, to manage concurrent access by both cores: Flash, GPIO, RCC.
Warning: Drag and drop of binary to DISCO_H747I will flash CM7.
In order to flash CM4, one can use STM32 CubeProgrammer tool.
The exported project uses project file to set optimization, we can provide this
via misc options. It was recently changed to Ol and this was not handled in our
scripts.
1. Override IlinkOverrideProgramEntryLabel and IlinkProgramEntryLabel to specify
entry point for debuger.
2. Refer to doc at the link below for post-export steps. Usually, 'export' is nearly
out of the box and just install 'Nu-Link Driver (IAR)' to update Nuvoton device
database in IAR.
https://github.com/OpenNuvoton/NuMaker-mbed-docs/blob/master/IAR/DEBUG_IAR.md
Reference template file is used from IAR8.32 installation available at path
"Embedded Workbench 8.2\arm\config\template\ConvertToIAR\template_project.ewp"
Also added trustzone configs in iar_definitions.json
1. In drivers/Timer.cpp make sure that hardware timer is initialized outside of critical section.
This is because on PSoC 6 hardware resources are shared between both cores
and we have to make sure that the other core is not already using a particular resource.
This mechanism is based on interprocessor communication taht cannot be handled iside of
critical section.
2. Added support for post-binary hook function for PSoC 6 targets, so the hex image for M0+ CPU core
can be merged with M4 core image for the final image.
3. Added possibility to use hook function from exportes, so the M0+ hex image could be included
in the generated project.
4. Included hex images in the build dependency list, so the update of image is catched by the
build process.
Chun-Chieh Li
Marcelo Salazar
Devaraj Ranganna
jeromecoutant
Volodymyr Medvid
PARKJIHOON
Alexandre Bourdiol
panyz0725@thundersoft.com
Martin Kojtal
Olli-Pekka Puolitaival
Lin Gao
itziar
Mahesh Mahadevan
Deepika
Yoshihiro TSUBOI
Leszek Rusinowicz
maclobdell
bcostm
Martin Kojtal
Cruz Monrreal
Jimmy Brisson
Ganesh Ramachandran