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Remove nRF51 targets 

The following public nRF51 targets are being removed:

- NRF51822
- NRF51_DK
- NRF51_MICROBIT
pull/12961/head
Marcelo Salazar 2020-05-12 23:03:07 +01:00
parent 296961de02
commit ccd95f1e14
139 changed files with 8 additions and 50136 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
TESTS/mbed_hal/critical_section/main.cpp
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@ -29,18 +29,12 @@ using utest::v1::Case;
bool test_are_interrupts_enabled(void)
{
// NRF51 targets don't disable interrupts when in critical section, instead they mask application interrupts.
// This is due to SoftDevice BLE stack (BLE to be operational requires some interrupts to be always enabled)
#if defined(TARGET_NRF51)
// check if APP interrupts are masked for other NRF51 boards
return ((NVIC->ISER[0] & __NRF_NVIC_APP_IRQS_0) != 0);
#else
#if defined(__CORTEX_A9)
return ((__get_CPSR() & 0x80) == 0);
#else
return ((__get_PRIMASK() & 0x1) == 0);
#endif
#endif
}

6
components/storage/blockdevice/COMPONENT_SD/mbed_lib.json
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@ -89,12 +89,6 @@
"SPI_CLK": "PD_14",
"SPI_CS": "PD_13"
},
"nRF51822": {
"SPI_MOSI": "p12",
"SPI_MISO": "p13",
"SPI_CLK": "p15",
"SPI_CS": "p14"
},
"RZ_A1H": {
"SPI_MOSI": "P8_5",
"SPI_MISO": "P8_6",

2
features/frameworks/mbed-trace/Jenkinsfile vendored
View File

@ -13,7 +13,6 @@ properties ([
def morpheusTargets = [
//"LPC1768",
//"NUCLEO_F401RE",
//"NRF51DK",
"K64F"
]
// Map morpheus toolchains to compiler labels on Jenkins
@ -26,7 +25,6 @@ def toolchains = [
def yottaTargets = [
"frdm-k64f-gcc": "gcc",
"frdm-k64f-armcc": "armcc",
"nrf51dk-gcc": "gcc",
"stm32f429i-disco-gcc": "gcc",
"x86-linux-native": "linux && astyle"
]

2
platform/source/mbed_board.c
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@ -25,7 +25,7 @@
WEAK MBED_NORETURN void mbed_die(void)
{
#if !defined (NRF51_H) && !defined(TARGET_EFM32)
#if !defined(TARGET_EFM32)
core_util_critical_section_enter();
#endif
gpio_t led_err;

51
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/nordic_sdk/components/libraries/crc16/crc16.h
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@ -1,51 +0,0 @@
/* Copyright (c) 2013 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
/** @file
*
* @defgroup crc_compute CRC compute
* @{
* @ingroup hci_transport
*
* @brief This module implements the CRC-16 calculation in the blocks.
*/
#ifndef CRC16_H__
#define CRC16_H__
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/**@brief Function for calculating CRC-16 in blocks.
*
* Feed each consecutive data block into this function, along with the current value of p_crc as
* returned by the previous call of this function. The first call of this function should pass NULL
* as the initial value of the crc in p_crc.
*
* @param[in] p_data The input data block for computation.
* @param[in] size The size of the input data block in bytes.
* @param[in] p_crc The previous calculated CRC-16 value or NULL if first call.
*
* @return The updated CRC-16 value, based on the input supplied.
*/
uint16_t crc16_compute(const uint8_t * p_data, uint32_t size, const uint16_t * p_crc);
#ifdef __cplusplus
}
#endif
#endif // CRC16_H__
/** @} */

152
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/nordic_sdk/components/libraries/scheduler/app_scheduler.h
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@ -1,152 +0,0 @@
/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
/** @file
*
* @defgroup app_scheduler Scheduler
* @{
* @ingroup app_common
*
* @brief The scheduler is used for transferring execution from the interrupt context to the main
* context.
*
* @details See @ref seq_diagrams_sched for sequence diagrams illustrating the flow of events
* when using the Scheduler.
*
* @section app_scheduler_req Requirements:
*
* @subsection main_context_logic Logic in main context:
*
* - Define an event handler for each type of event expected.
* - Initialize the scheduler by calling the APP_SCHED_INIT() macro before entering the
* application main loop.
* - Call app_sched_execute() from the main loop each time the application wakes up because of an
* event (typically when sd_app_evt_wait() returns).
*
* @subsection int_context_logic Logic in interrupt context:
*
* - In the interrupt handler, call app_sched_event_put()
* with the appropriate data and event handler. This will insert an event into the
* scheduler's queue. The app_sched_execute() function will pull this event and call its
* handler in the main context.
*
* @if (SD_S110 && !SD_S310)
* For an example usage of the scheduler, see the implementations of
* @ref ble_sdk_app_hids_mouse and @ref ble_sdk_app_hids_keyboard.
* @endif
*
* @image html scheduler_working.jpg The high level design of the scheduler
*/
#ifndef APP_SCHEDULER_H__
#define APP_SCHEDULER_H__
#include <stdint.h>
#include "app_error.h"
#define APP_SCHED_EVENT_HEADER_SIZE 8 /**< Size of app_scheduler.event_header_t (only for use inside APP_SCHED_BUF_SIZE()). */
/**@brief Compute number of bytes required to hold the scheduler buffer.
*
* @param[in] EVENT_SIZE Maximum size of events to be passed through the scheduler.
* @param[in] QUEUE_SIZE Number of entries in scheduler queue (i.e. the maximum number of events
* that can be scheduled for execution).
*
* @return Required scheduler buffer size (in bytes).
*/
#define APP_SCHED_BUF_SIZE(EVENT_SIZE, QUEUE_SIZE) \
(((EVENT_SIZE) + APP_SCHED_EVENT_HEADER_SIZE) * ((QUEUE_SIZE) + 1))
/**@brief Scheduler event handler type. */
typedef void (*app_sched_event_handler_t)(void * p_event_data, uint16_t event_size);
/**@brief Macro for initializing the event scheduler.
*
* @details It will also handle dimensioning and allocation of the memory buffer required by the
* scheduler, making sure the buffer is correctly aligned.
*
* @param[in] EVENT_SIZE Maximum size of events to be passed through the scheduler.
* @param[in] QUEUE_SIZE Number of entries in scheduler queue (i.e. the maximum number of events
* that can be scheduled for execution).
*
* @note Since this macro allocates a buffer, it must only be called once (it is OK to call it
* several times as long as it is from the same location, e.g. to do a reinitialization).
*/
#define APP_SCHED_INIT(EVENT_SIZE, QUEUE_SIZE) \
do \
{ \
static uint32_t APP_SCHED_BUF[CEIL_DIV(APP_SCHED_BUF_SIZE((EVENT_SIZE), (QUEUE_SIZE)), \
sizeof(uint32_t))]; \
uint32_t ERR_CODE = app_sched_init((EVENT_SIZE), (QUEUE_SIZE), APP_SCHED_BUF); \
APP_ERROR_CHECK(ERR_CODE); \
} while (0)
/**@brief Function for initializing the Scheduler.
*
* @details It must be called before entering the main loop.
*
* @param[in] max_event_size Maximum size of events to be passed through the scheduler.
* @param[in] queue_size Number of entries in scheduler queue (i.e. the maximum number of
* events that can be scheduled for execution).
* @param[in] p_evt_buffer Pointer to memory buffer for holding the scheduler queue. It must
* be dimensioned using the APP_SCHED_BUFFER_SIZE() macro. The buffer
* must be aligned to a 4 byte boundary.
*
* @note Normally initialization should be done using the APP_SCHED_INIT() macro, as that will both
* allocate the scheduler buffer, and also align the buffer correctly.
*
* @retval NRF_SUCCESS Successful initialization.
* @retval NRF_ERROR_INVALID_PARAM Invalid parameter (buffer not aligned to a 4 byte
* boundary).
*/
uint32_t app_sched_init(uint16_t max_event_size, uint16_t queue_size, void * p_evt_buffer);
/**@brief Function for executing all scheduled events.
*
* @details This function must be called from within the main loop. It will execute all events
* scheduled since the last time it was called.
*/
void app_sched_execute(void);
/**@brief Function for scheduling an event.
*
* @details Puts an event into the event queue.
*
* @param[in] p_event_data Pointer to event data to be scheduled.
* @param[in] event_size Size of event data to be scheduled.
* @param[in] handler Event handler to receive the event.
*
* @return NRF_SUCCESS on success, otherwise an error code.
*/
uint32_t app_sched_event_put(void * p_event_data,
uint16_t event_size,
app_sched_event_handler_t handler);
#ifdef APP_SCHEDULER_WITH_PAUSE
/**@brief A function to pause the scheduler.
*
* @details When the scheduler is paused events are not pulled from the scheduler queue for
* processing. The function can be called multiple times. To unblock the scheduler the
* function @ref app_sched_resume has to be called the same number of times.
*/
void app_sched_pause(void);
/**@brief A function to resume a scheduler.
*
* @details To unblock the scheduler this function has to be called the same number of times as
* @ref app_sched_pause function.
*/
void app_sched_resume(void);
#endif
#endif // APP_SCHEDULER_H__
/** @} */

92
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/nordic_sdk/components/libraries/util/app_error.h
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@ -1,92 +0,0 @@
/* Copyright (c) 2013 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
/** @file
*
* @defgroup app_error Common application error handler
* @{
* @ingroup app_common
*
* @brief Common application error handler and macros for utilizing a common error handler.
*/
#ifndef APP_ERROR_H__
#define APP_ERROR_H__
#include <stdint.h>
#include <stdbool.h>
#include "nrf_error.h"
#ifdef __cplusplus
extern "C" {
#endif
/**@brief Function for error handling, which is called when an error has occurred.
*
* @param[in] error_code Error code supplied to the handler.
* @param[in] line_num Line number where the handler is called.
* @param[in] p_file_name Pointer to the file name.
*/
void app_error_handler(uint32_t error_code, uint32_t line_num, const uint8_t * p_file_name);
#ifdef __cplusplus
}
#endif
/**@brief Macro for calling error handler function.
*
* @param[in] ERR_CODE Error code supplied to the error handler.
*/
#ifdef DEBUG
#define APP_ERROR_HANDLER(ERR_CODE) \
do \
{ \
app_error_handler((ERR_CODE), __LINE__, (uint8_t*) __FILE__); \
} while (0)
#else
#define APP_ERROR_HANDLER(ERR_CODE) \
do \
{ \
app_error_handler((ERR_CODE), 0, 0); \
} while (0)
#endif
/**@brief Macro for calling error handler function if supplied error code any other than NRF_SUCCESS.
*
* @param[in] ERR_CODE Error code supplied to the error handler.
*/
#define APP_ERROR_CHECK(ERR_CODE) \
do \
{ \
const uint32_t LOCAL_ERR_CODE = (ERR_CODE); \
if (LOCAL_ERR_CODE != NRF_SUCCESS) \
{ \
APP_ERROR_HANDLER(LOCAL_ERR_CODE); \
} \
} while (0)
/**@brief Macro for calling error handler function if supplied boolean value is false.
*
* @param[in] BOOLEAN_VALUE Boolean value to be evaluated.
*/
#define APP_ERROR_CHECK_BOOL(BOOLEAN_VALUE) \
do \
{ \
const uint32_t LOCAL_BOOLEAN_VALUE = (BOOLEAN_VALUE); \
if (!LOCAL_BOOLEAN_VALUE) \
{ \
APP_ERROR_HANDLER(0); \
} \
} while (0)
#endif // APP_ERROR_H__
/** @} */

234
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/nordic_sdk/components/libraries/util/app_util.h
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@ -1,234 +0,0 @@
/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
/** @file
*
* @defgroup app_util Utility Functions and Definitions
* @{
* @ingroup app_common
*
* @brief Various types and definitions available to all applications.
*/
#ifndef APP_UTIL_H__
#define APP_UTIL_H__
#include <stdint.h>
#include <stdbool.h>
#include "compiler_abstraction.h"
enum
{
UNIT_0_625_MS = 625, /**< Number of microseconds in 0.625 milliseconds. */
UNIT_1_25_MS = 1250, /**< Number of microseconds in 1.25 milliseconds. */
UNIT_10_MS = 10000 /**< Number of microseconds in 10 milliseconds. */
};
/**@brief Macro for doing static (i.e. compile time) assertion.
*
* @note If the assertion fails when compiling using Keil, the compiler will report error message
* "error: #94: the size of an array must be greater than zero" (while gcc will list the
* symbol static_assert_failed, making the error message more readable).
* If the supplied expression can not be evaluated at compile time, Keil will report
* "error: #28: expression must have a constant value".
*
* @note The macro is intentionally implemented not using do while(0), allowing it to be used
* outside function blocks (e.g. close to global type- and variable declarations).
* If used in a code block, it must be used before any executable code in this block.
*
* @param[in] EXPR Constant expression to be verified.
*/
#if defined(__GNUC__)
#define STATIC_ASSERT(EXPR) typedef char __attribute__((unused)) static_assert_failed[(EXPR) ? 1 : -1]
#elif defined(__ICCARM__)
#define STATIC_ASSERT(EXPR) extern char static_assert_failed[(EXPR) ? 1 : -1]
#else
#define STATIC_ASSERT(EXPR) typedef char static_assert_failed[(EXPR) ? 1 : -1]
#endif
/**@brief type for holding an encoded (i.e. little endian) 16 bit unsigned integer. */
typedef uint8_t uint16_le_t[2];
/**@brief type for holding an encoded (i.e. little endian) 32 bit unsigned integer. */
typedef uint8_t uint32_le_t[4];
/**@brief Byte array type. */
typedef struct
{
uint16_t size; /**< Number of array entries. */
uint8_t * p_data; /**< Pointer to array entries. */
} uint8_array_t;
/**@brief Perform rounded integer division (as opposed to truncating the result).
*
* @param[in] A Numerator.
* @param[in] B Denominator.
*
* @return Rounded (integer) result of dividing A by B.
*/
#define ROUNDED_DIV(A, B) (((A) + ((B) / 2)) / (B))
/**@brief Check if the integer provided is a power of two.
*
* @param[in] A Number to be tested.
*
* @return true if value is power of two.
* @return false if value not power of two.
*/
#define IS_POWER_OF_TWO(A) ( ((A) != 0) && ((((A) - 1) & (A)) == 0) )
/**@brief To convert milliseconds to ticks.
* @param[in] TIME Number of milliseconds to convert.
* @param[in] RESOLUTION Unit to be converted to in [us/ticks].
*/
#define MSEC_TO_UNITS(TIME, RESOLUTION) (((TIME) * 1000) / (RESOLUTION))
/**@brief Perform integer division, making sure the result is rounded up.
*
* @details One typical use for this is to compute the number of objects with size B is needed to
* hold A number of bytes.
*
* @param[in] A Numerator.
* @param[in] B Denominator.
*
* @return Integer result of dividing A by B, rounded up.
*/
#define CEIL_DIV(A, B) \
/*lint -save -e573 */ \
((((A) - 1) / (B)) + 1) \
/*lint -restore */
/**@brief Function for encoding a uint16 value.
*
* @param[in] value Value to be encoded.
* @param[out] p_encoded_data Buffer where the encoded data is to be written.
*
* @return Number of bytes written.
*/
static __INLINE uint8_t uint16_encode(uint16_t value, uint8_t * p_encoded_data)
{
p_encoded_data[0] = (uint8_t) ((value & 0x00FF) >> 0);
p_encoded_data[1] = (uint8_t) ((value & 0xFF00) >> 8);
return sizeof(uint16_t);
}
/**@brief Function for encoding a uint32 value.
*
* @param[in] value Value to be encoded.
* @param[out] p_encoded_data Buffer where the encoded data is to be written.
*
* @return Number of bytes written.
*/
static __INLINE uint8_t uint32_encode(uint32_t value, uint8_t * p_encoded_data)
{
p_encoded_data[0] = (uint8_t) ((value & 0x000000FF) >> 0);
p_encoded_data[1] = (uint8_t) ((value & 0x0000FF00) >> 8);
p_encoded_data[2] = (uint8_t) ((value & 0x00FF0000) >> 16);
p_encoded_data[3] = (uint8_t) ((value & 0xFF000000) >> 24);
return sizeof(uint32_t);
}
/**@brief Function for decoding a uint16 value.
*
* @param[in] p_encoded_data Buffer where the encoded data is stored.
*
* @return Decoded value.
*/
static __INLINE uint16_t uint16_decode(const uint8_t * p_encoded_data)
{
return ( (((uint16_t)((uint8_t *)p_encoded_data)[0])) |
(((uint16_t)((uint8_t *)p_encoded_data)[1]) << 8 ));
}
/**@brief Function for decoding a uint32 value.
*
* @param[in] p_encoded_data Buffer where the encoded data is stored.
*
* @return Decoded value.
*/
static __INLINE uint32_t uint32_decode(const uint8_t * p_encoded_data)
{
return ( (((uint32_t)((uint8_t *)p_encoded_data)[0]) << 0) |
(((uint32_t)((uint8_t *)p_encoded_data)[1]) << 8) |
(((uint32_t)((uint8_t *)p_encoded_data)[2]) << 16) |
(((uint32_t)((uint8_t *)p_encoded_data)[3]) << 24 ));
}
/** @brief Function for converting the input voltage (in milli volts) into percentage of 3.0 Volts.
*
* @details The calculation is based on a linearized version of the battery's discharge
* curve. 3.0V returns 100% battery level. The limit for power failure is 2.1V and
* is considered to be the lower boundary.
*
* The discharge curve for CR2032 is non-linear. In this model it is split into
* 4 linear sections:
* - Section 1: 3.0V - 2.9V = 100% - 42% (58% drop on 100 mV)
* - Section 2: 2.9V - 2.74V = 42% - 18% (24% drop on 160 mV)
* - Section 3: 2.74V - 2.44V = 18% - 6% (12% drop on 300 mV)
* - Section 4: 2.44V - 2.1V = 6% - 0% (6% drop on 340 mV)
*
* These numbers are by no means accurate. Temperature and
* load in the actual application is not accounted for!
*
* @param[in] mvolts The voltage in mV
*
* @return Battery level in percent.
*/
static __INLINE uint8_t battery_level_in_percent(const uint16_t mvolts)
{
uint8_t battery_level;
if (mvolts >= 3000)
{
battery_level = 100;
}
else if (mvolts > 2900)
{
battery_level = 100 - ((3000 - mvolts) * 58) / 100;
}
else if (mvolts > 2740)
{
battery_level = 42 - ((2900 - mvolts) * 24) / 160;
}
else if (mvolts > 2440)
{
battery_level = 18 - ((2740 - mvolts) * 12) / 300;
}
else if (mvolts > 2100)
{
battery_level = 6 - ((2440 - mvolts) * 6) / 340;
}
else
{
battery_level = 0;
}
return battery_level;
}
/**@brief Function for checking if a pointer value is aligned to a 4 byte boundary.
*
* @param[in] p Pointer value to be checked.
*
* @return TRUE if pointer is aligned to a 4 byte boundary, FALSE otherwise.
*/
static __INLINE bool is_word_aligned(void * p)
{
return (((uintptr_t)p & 0x03) == 0);
}
#endif // APP_UTIL_H__
/** @} */

90
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_8_0_0/s110_nrf51822_8.0.0_licence_agreement.txt
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@ -1,90 +0,0 @@
S110/S120/S130 license agreement
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downloading, installing and/or using any software or content in the SoftDevice provided herewith.
YOU ACCEPT THIS LICENSE AGREEMENT BY (A) CLICKING ACCEPT OR AGREE TO THIS LICENSE AGREEMENT, WHERE THIS
OPTION IS MADE AVAILABLE TO YOU; OR (B) BY ACTUALLY USING THE SOFTDEVICE, IN THIS CASE YOU AGREE THAT THE USE OF
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IF YOU DO NOT AGREE TO BE BOUND BY THE TERMS OF THIS AGREEMENT, THEN DO NOT DOWNLOAD, INSTALL/COMPLETE
INSTALLATION OF, OR IN ANY OTHER WAY MAKE USE OF THE SOFTDEVICE.
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special, direct, indirect, incidental, economic, punitive, special or consequential damages, however caused and whether arising under contract,
tort, negligence, or other theory of liability arising out of the use of or inability to use the SoftDevice, even if Nordic or its employees or suppliers,
licensors or affiliates are advised of the possibility of such damages. Because some countries/states/jurisdictions do not allow the exclusion or
limitation of liability, but may allow liability to be limited, in such cases, Nordic, its employees or licensors or affiliates’ liability shall be limited to
USD 50.
10. Breach of Contract
Upon a breach of contract by the Licensee, Nordic and its licensor are entitled to damages in respect of any direct loss which can be reasonably
attributed to the breach by the Licensee. If the Licensee has acted with gross negligence or willful misconduct, the Licensee shall cover both
direct and indirect costs for Nordic and its licensors.
11. Indemnity
Licensee undertakes to indemnify, hold harmless and defend Nordic and its directors, officers, affiliates, shareholders, licensors, employees and
agents from and against any claims or lawsuits, including attorney's fees, that arise or result of the Licensee’s execution of the License and which
is not due to causes for which Nordic is responsible.
12. Governing Law
This Agreement shall be construed according to the laws of Norway, and hereby submits to the exclusive jurisdiction of the Oslo tingrett.
13. Assignment
Licensee shall not assign this Agreement or any rights or obligations hereunder without the prior written consent of Nordic.
14. Termination
Without prejudice to any other rights, Nordic may cancel this Agreement if Licensee does not abide by the terms and conditions of this
Agreement. Upon termination Licensee must promptly cease the use of the License and destroy all copies of the Licensed Technology and any
other material provided by Nordic or its affiliate, or produced by the Licensee in connection with the Agreement or the Licensed Technology.
15. Third party beneficiaries
Nordic’s licensors are intended third party beneficiaries under this Agreement.

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targets/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_8_0_0/s110_nrf51822_8.0.0_softdevice.hex
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targets/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s130_nrf51822_1_0_0/s130_nrf51_1.0.0_licence_agreement.txt
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S110/S120/S130 license agreement
NORDIC SEMICONDUCTOR ASA SOFTDEVICE LICENSE AGREEMENT
License Agreement for the Nordic Semiconductor ASA ("Nordic") S110, S120 and S130 Bluetooth SoftDevice software packages ("SoftDevice").
You ("You" "Licensee") must carefully and thoroughly read this License Agreement ("Agreement"), and accept to adhere to this Agreement before
downloading, installing and/or using any software or content in the SoftDevice provided herewith.
YOU ACCEPT THIS LICENSE AGREEMENT BY (A) CLICKING ACCEPT OR AGREE TO THIS LICENSE AGREEMENT, WHERE THIS
OPTION IS MADE AVAILABLE TO YOU; OR (B) BY ACTUALLY USING THE SOFTDEVICE, IN THIS CASE YOU AGREE THAT THE USE OF
THE SOFTDEVICE CONSTITUTES ACCEPTANCE OF THE LICENSING AGREEMENT FROM THAT POINT ONWARDS.
IF YOU DO NOT AGREE TO BE BOUND BY THE TERMS OF THIS AGREEMENT, THEN DO NOT DOWNLOAD, INSTALL/COMPLETE
INSTALLATION OF, OR IN ANY OTHER WAY MAKE USE OF THE SOFTDEVICE.
1. Grant of License
Subject to the terms in this Agreement Nordic grants Licensee a limited, non-exclusive, non-transferable, non-sub licensable, revocable license
("License"): (a) to use the SoftDevice solely in connection with a Nordic integrated circuit, and (b) to distribute the SoftDevice solely as integrated
in Licensee Product. Licensee shall not use the SoftDevice for any purpose other than specifically authorized herein. It is a material breach of this
agreement to use or modify the SoftDevice for use on any wireless connectivity integrated circuit other than a Nordic integrated circuit.
2. Title
Nordic retains full rights, title, and ownership to the SoftDevice and any and all patents, copyrights, trade secrets, trade names, trademarks, and
other intellectual property rights in and to the SoftDevice.
3. No Modifications or Reverse Engineering
Licensee shall not, modify, reverse engineer, disassemble, decompile or otherwise attempt to discover the source code of any non-source code
parts of the SoftDevice including, but not limited to pre-compiled hex files, binaries and object code.
4. Distribution Restrictions
Except as set forward in Section 1 above, the Licensee may not disclose or distribute any or all parts of the SoftDevice to any third party.
Licensee agrees to provide reasonable security precautions to prevent unauthorized access to or use of the SoftDevice as proscribed herein.
Licensee also agrees that use of and access to the SoftDevice will be strictly limited to the employees and subcontractors of the Licensee
necessary for the performance of development, verification and production tasks under this Agreement. The Licensee is responsible for making
such employees and subcontractors comply with the obligations concerning use and non-disclosure of the SoftDevice.
5. No Other Rights
Licensee shall use the SoftDevice only in compliance with this Agreement and shall refrain from using the SoftDevice in any way that may be
contrary to this Agreement.
6. Fees
Nordic grants the License to the Licensee free of charge provided that the Licensee undertakes the obligations in the Agreement and warrants to
comply with the Agreement.
7. DISCLAIMER OF WARRANTY
THE SOFTDEVICE IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND EXPRESS OR IMPLIED AND NEITHER NORDIC, ITS
LICENSORS OR AFFILIATES NOR THE COPYRIGHT HOLDERS MAKE ANY REPRESENTATIONS OR WARRANTIES, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR
THAT THE SOFTDEVICE WILL NOT INFRINGE ANY THIRD PARTY PATENTS, COPYRIGHTS, TRADEMARKS OR OTHER RIGHTS. THERE
IS NO WARRANTY BY NORDIC OR BY ANY OTHER PARTY THAT THE FUNCTIONS CONTAINED IN THE SOFTDEVICE WILL MEET THE
REQUIREMENTS OF LICENSEE OR THAT THE OPERATION OF THE SOFTDEVICE WILL BE UNINTERRUPTED OR ERROR-FREE.
LICENSEE ASSUMES ALL RESPONSIBILITY AND RISK FOR THE SELECTION OF THE SOFTDEVICE TO ACHIEVE LICENSEE’S
INTENDED RESULTS AND FOR THE INSTALLATION, USE AND RESULTS OBTAINED FROM IT.
8. No Support
Nordic is not obligated to furnish or make available to Licensee any further information, software, technical information, know-how, show-how,
bug-fixes or support. Nordic reserves the right to make changes to the SoftDevice without further notice.
9. Limitation of Liability
In no event shall Nordic, its employees or suppliers, licensors or affiliates be liable for any lost profits, revenue, sales, data or costs of
procurement of substitute goods or services, property damage, personal injury, interruption of business, loss of business information or for any
special, direct, indirect, incidental, economic, punitive, special or consequential damages, however caused and whether arising under contract,
tort, negligence, or other theory of liability arising out of the use of or inability to use the SoftDevice, even if Nordic or its employees or suppliers,
licensors or affiliates are advised of the possibility of such damages. Because some countries/states/jurisdictions do not allow the exclusion or
limitation of liability, but may allow liability to be limited, in such cases, Nordic, its employees or licensors or affiliates’ liability shall be limited to
USD 50.
10. Breach of Contract
Upon a breach of contract by the Licensee, Nordic and its licensor are entitled to damages in respect of any direct loss which can be reasonably
attributed to the breach by the Licensee. If the Licensee has acted with gross negligence or willful misconduct, the Licensee shall cover both
direct and indirect costs for Nordic and its licensors.
11. Indemnity
Licensee undertakes to indemnify, hold harmless and defend Nordic and its directors, officers, affiliates, shareholders, licensors, employees and
agents from and against any claims or lawsuits, including attorney's fees, that arise or result of the Licensee’s execution of the License and which
is not due to causes for which Nordic is responsible.
12. Governing Law
This Agreement shall be construed according to the laws of Norway, and hereby submits to the exclusive jurisdiction of the Oslo tingrett.
13. Assignment
Licensee shall not assign this Agreement or any rights or obligations hereunder without the prior written consent of Nordic.
14. Termination
Without prejudice to any other rights, Nordic may cancel this Agreement if Licensee does not abide by the terms and conditions of this
Agreement. Upon termination Licensee must promptly cease the use of the License and destroy all copies of the Licensed Technology and any
other material provided by Nordic or its affiliate, or produced by the Licensee in connection with the Agreement or the Licensed Technology.
15. Third party beneficiaries
Nordic’s licensors are intended third party beneficiaries under this Agreement.

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targets/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s130_nrf51822_1_0_0/s130_nrf51_1.0.0_softdevice.hex
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58
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/PeripheralNames.h
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/* mbed Microcontroller Library
* Copyright (c) 2013 Nordic Semiconductor
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PERIPHERALNAMES_H
#define MBED_PERIPHERALNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
#define STDIO_UART_TX TX_PIN_NUMBER
#define STDIO_UART_RX RX_PIN_NUMBER
#define STDIO_UART UART_0
typedef enum {
UART_0 = (int)NRF_UART0_BASE
} UARTName;
typedef enum {
SPI_0 = (int)NRF_SPI0_BASE,
SPI_1 = (int)NRF_SPI1_BASE,
SPIS = (int)NRF_SPIS1_BASE
} SPIName;
typedef enum {
PWM_1 = 0,
PWM_2
} PWMName;
typedef enum {
I2C_0 = (int)NRF_TWI0_BASE,
I2C_1 = (int)NRF_TWI1_BASE
} I2CName;
typedef enum {
ADC0_0 = (int)NRF_ADC_BASE
} ADCName;
#ifdef __cplusplus
}
#endif
#endif

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targets/TARGET_NORDIC/TARGET_MCU_NRF51822/PortNames.h
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/* mbed Microcontroller Library
* Copyright (c) 2013 Nordic Semiconductor
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PORTNAMES_H
#define MBED_PORTNAMES_H
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
Port0 = 0 //GPIO pins 0-31
} PortName;
#ifdef __cplusplus
}
#endif
#endif

153
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_NRF51822_MKIT/PinNames.h
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/* mbed Microcontroller Library
* Copyright (c) 2013 Nordic Semiconductor
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
PIN_INPUT,
PIN_OUTPUT
} PinDirection;
#define PORT_SHIFT 3
typedef enum {
p0 = 0,
p1 = 1,
p2 = 2,
p3 = 3,
p4 = 4,
p5 = 5,
p6 = 6,
p7 = 7,
p8 = 8,
p9 = 9,
p10 = 10,
p11 = 11,
p12 = 12,
p13 = 13,
p14 = 14,
p15 = 15,
p16 = 16,
p17 = 17,
p18 = 18,
p19 = 19,
p20 = 20,
p21 = 21,
p22 = 22,
p23 = 23,
p24 = 24,
p25 = 25,
p26 = 26,
p27 = 27,
p28 = 28,
p29 = 29,
p30 = 30,
// p31=31,
P0_0 = p0,
P0_1 = p1,
P0_2 = p2,
P0_3 = p3,
P0_4 = p4,
P0_5 = p5,
P0_6 = p6,
P0_7 = p7,
P0_8 = p8,
P0_9 = p9,
P0_10 = p10,
P0_11 = p11,
P0_12 = p12,
P0_13 = p13,
P0_14 = p14,
P0_15 = p15,
P0_16 = p16,
P0_17 = p17,
P0_18 = p18,
P0_19 = p19,
P0_20 = p20,
P0_21 = p21,
P0_22 = p22,
P0_23 = p23,
P0_24 = p24,
P0_25 = p25,
P0_26 = p26,
P0_27 = p27,
P0_28 = p28,
P0_29 = p29,
P0_30 = p30,
LED1 = p18,
LED2 = p19,
LED3 = p18,
LED4 = p19,
BUTTON1 = p16,
BUTTON2 = p17,
RX_PIN_NUMBER = p11,
TX_PIN_NUMBER = p9,
CTS_PIN_NUMBER = p10,
RTS_PIN_NUMBER = p8,
// mBed interface Pins
USBTX = TX_PIN_NUMBER,
USBRX = RX_PIN_NUMBER,
SPI_PSELMOSI0 = p20,
SPI_PSELMISO0 = p22,
SPI_PSELSS0 = p24,
SPI_PSELSCK0 = p25,
SPI_PSELMOSI1 = p12,
SPI_PSELMISO1 = p13,
SPI_PSELSS1 = p14,
SPI_PSELSCK1 = p15,
SPIS_PSELMOSI = p12,
SPIS_PSELMISO = p13,
SPIS_PSELSS = p14,
SPIS_PSELSCK = p15,
I2C_SDA0 = p22,
I2C_SCL0 = p20,
I2C_SDA1 = p13,
I2C_SCL1 = p15,
// Not connected
NC = (int)0xFFFFFFFF
} PinName;
typedef enum {
PullNone = 0,
PullDown = 1,
PullUp = 3,
PullDefault = PullUp
} PinMode;
#ifdef __cplusplus
}
#endif
#endif

38
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_NRF51822_MKIT/device.h
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// The 'provides' section in 'target.json' is now used to create the device's hardware preprocessor switches.
// Check the 'provides' section of the target description in 'targets.json' for more details.
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_DEVICE_H
#define MBED_DEVICE_H
#include "objects.h"
#endif

106
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_NRF51822_SBKIT/PinNames.h
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/* mbed Microcontroller Library
* Copyright (c) 2013 Nordic Semiconductor
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
PIN_INPUT,
PIN_OUTPUT
} PinDirection;
#define PORT_SHIFT 3
typedef enum {
p0 = 0,
p1 = 1,
p2 = 2,
p3 = 3,
p5 = 5,
p8 = 8,
p9 = 9,
p11 = 11,
p12 = 12,
p15 = 15,
p16 = 16,
p18 = 18,
p20 = 20,
p21 = 21,
p24 = 24,
P0_0 = p0,
P0_1 = p1,
P0_2 = p2,
P0_3 = p3,
P0_5 = p5,
P0_8 = p8,
P0_9 = p9,
P0_11 = p11,
P0_12 = p12,
P0_15 = p15,
P0_16 = p16,
P0_18 = p18,
P0_20 = p20,
P0_21 = p21,
P0_24 = p24,
LED1 = p16,
LED2 = p12,
LED3 = p15,
LEDR = LED1,
LEDG = LED2,
LEDB = LED3,
BUTTON1 = p8,
BUTTON2 = p18,
RX_PIN_NUMBER = p21,
TX_PIN_NUMBER = p24,
CTS_PIN_NUMBER = p0,
RTS_PIN_NUMBER = p20,
SPI_PSELMOSI0 = p2,
SPI_PSELMISO0 = p5,
SPI_PSELSS0 = p1,
SPI_PSELSCK0 = p3,
I2C_SDA0 = p9,
I2C_SCL0 = p11,
// Not connected
NC = (int)0xFFFFFFFF
} PinName;
typedef enum {
PullNone = 0,
PullDown = 1,
PullUp = 3,
PullDefault = PullUp
} PinMode;
#ifdef __cplusplus
}
#endif
#endif

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targets/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_NRF51822_SBKIT/device.h
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@ -1,57 +0,0 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_DEVICE_H
#define MBED_DEVICE_H
#define DEVICE_PORTIN 1
#define DEVICE_PORTOUT 1
#define DEVICE_PORTINOUT 1
#define DEVICE_INTERRUPTIN 1
#define DEVICE_ANALOGIN 1
#define DEVICE_ANALOGOUT 0
#define DEVICE_SERIAL 1
#define DEVICE_I2C 1
#define DEVICE_I2CSLAVE 0
#define DEVICE_SPI 1
#define DEVICE_SPISLAVE 1
#define DEVICE_CAN 0
#define DEVICE_RTC 0
#define DEVICE_ETHERNET 0
#define DEVICE_PWMOUT 1
#define DEVICE_SEMIHOST 0
#define DEVICE_LOCALFILESYSTEM 0
#define DEVICE_SLEEP 1
#define DEVICE_DEBUG_AWARENESS 0
#define DEVICE_STDIO_MESSAGES 0
#define DEVICE_ERROR_PATTERN 1
#include "objects.h"
#endif

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targets/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_NRF51_DK/PinNames.h
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/* mbed Microcontroller Library
* Copyright (c) 2013 Nordic Semiconductor
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
PIN_INPUT,
PIN_OUTPUT
} PinDirection;
#define PORT_SHIFT 3
typedef enum {
p0 = 0,
p1 = 1,
p2 = 2,
p3 = 3,
p4 = 4,
p5 = 5,
p6 = 6,
p7 = 7,
p8 = 8,
p9 = 9,
p10 = 10,
p11 = 11,
p12 = 12,
p13 = 13,
p14 = 14,
p15 = 15,
p16 = 16,
p17 = 17,
p18 = 18,
p19 = 19,
p20 = 20,
p21 = 21,
p22 = 22,
p23 = 23,
p24 = 24,
p25 = 25,
p26 = 26,
p27 = 27,
p28 = 28,
p29 = 29,
p30 = 30,
P0_0 = p0,
P0_1 = p1,
P0_2 = p2,
P0_3 = p3,
P0_4 = p4,
P0_5 = p5,
P0_6 = p6,
P0_7 = p7,
P0_8 = p8,
P0_9 = p9,
P0_10 = p10,
P0_11 = p11,
P0_12 = p12,
P0_13 = p13,
P0_14 = p14,
P0_15 = p15,
P0_16 = p16,
P0_17 = p17,
P0_18 = p18,
P0_19 = p19,
P0_20 = p20,
P0_21 = p21,
P0_22 = p22,
P0_23 = p23,
P0_24 = p24,
P0_25 = p25,
P0_26 = p26,
P0_27 = p27,
P0_28 = p28,
P0_29 = p29,
P0_30 = p30,
LED1 = p21,
LED2 = p22,
LED3 = p23,
LED4 = p24,
BUTTON1 = p17,
BUTTON2 = p18,
BUTTON3 = p19,
BUTTON4 = p20,
RX_PIN_NUMBER = p11,
TX_PIN_NUMBER = p9,
CTS_PIN_NUMBER = p10,
RTS_PIN_NUMBER = p8,
// mBed interface Pins
USBTX = TX_PIN_NUMBER,
USBRX = RX_PIN_NUMBER,
SPI_PSELMOSI0 = p25,
SPI_PSELMISO0 = p28,
SPI_PSELSS0 = p24,
SPI_PSELSCK0 = p29,
SPI_PSELMOSI1 = p13,
SPI_PSELMISO1 = p14,
SPI_PSELSS1 = p12,
SPI_PSELSCK1 = p15,
SPIS_PSELMOSI = p13,
SPIS_PSELMISO = p14,
SPIS_PSELSS = p12,
SPIS_PSELSCK = p15,
I2C_SDA0 = p30,
I2C_SCL0 = p7,
D0 = p12,
D1 = p13,
D2 = p14,
D3 = p15,
D4 = p16,
D5 = p17,
D6 = p18,
D7 = p19,
D8 = p20,
D9 = p23,
D10 = p24,
D11 = p25,
D12 = p28,
D13 = p29,
D14 = p30,
D15 = p7,
A0 = p1,
A1 = p2,
A2 = p3,
A3 = p4,
A4 = p5,
A5 = p6,
// Not connected
NC = (int)0xFFFFFFFF
} PinName;
typedef enum {
PullNone = 0,
PullDown = 1,
PullUp = 3,
PullDefault = PullUp
} PinMode;
#ifdef __cplusplus
}
#endif
#endif

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targets/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_NRF51_DK/device.h
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// The 'features' section in 'target.json' is now used to create the device's hardware preprocessor switches.
// Check the 'features' section of the target description in 'targets.json' for more details.
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_DEVICE_H
#define MBED_DEVICE_H
#include "objects.h"
#endif

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targets/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_NRF51_MICROBIT/PinNames.h
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/* mbed Microcontroller Library
* Copyright (c) 2013 Nordic Semiconductor
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
PIN_INPUT,
PIN_OUTPUT
} PinDirection;
#define PORT_SHIFT 3
typedef enum {
//MCU PINS
P0_0 = 0,
P0_1 = 1,
P0_2 = 2,
P0_3 = 3,
P0_4 = 4,
P0_5 = 5,
P0_6 = 6,
P0_7 = 7,
P0_8 = 8,
P0_9 = 9,
P0_10 = 10,
P0_11 = 11,
P0_12 = 12,
P0_13 = 13,
P0_14 = 14,
P0_15 = 15,
P0_16 = 16,
P0_17 = 17,
P0_18 = 18,
P0_19 = 19,
P0_20 = 20,
P0_21 = 21,
P0_22 = 22,
P0_23 = 23,
P0_24 = 24,
P0_25 = 25,
P0_26 = 26,
P0_27 = 27,
P0_28 = 28,
P0_29 = 29,
P0_30 = 30,
//MICROBIT EDGE CONNECTOR PINS
P0 = P0_3,
P1 = P0_2,
P2 = P0_1,
P3 = P0_4,
P4 = P0_5,
P5 = P0_17,
P6 = P0_12,
P7 = P0_11,
P8 = P0_18,
P9 = P0_10,
P10 = P0_6,
P11 = P0_26,
P12 = P0_20,
P13 = P0_23,
P14 = P0_22,
P15 = P0_21,
P16 = P0_16,
P19 = P0_0,
P20 = P0_30,
//PADS
PAD3 = P0_1,
PAD2 = P0_2,
PAD1 = P0_3,
//LED MATRIX COLS
COL1 = P0_4,
COL2 = P0_5,
COL3 = P0_6,
COL4 = P0_7,
COL5 = P0_8,
COL6 = P0_9,
COL7 = P0_10,
COL8 = P0_11,
COL9 = P0_12,
//LED MATRIX ROWS
ROW1 = P0_13,
ROW2 = P0_14,
ROW3 = P0_15,
//NORMAL PIN (NO SPECIFIED FUNCTIONALITY)
//PIN_16
// BUTTON A
BUTTON_A = P0_17,
//NORMAL PIN (NO SPECIFIED FUNCTIONALITY)
//PIN_18
//TARGET RESET
TGT_NRESET = P0_19,
//NORMAL PIN (NO SPECIFIED FUNCTIONALITY)
//PIN_20
//MASTER OUT SLAVE IN
MOSI = P0_21,
//MASTER IN SLAVE OUT
MISO = P0_22,
//SERIAL CLOCK
SCK = P0_23,
// RX AND TX PINS
TGT_TX = P0_24,
TGT_RX = P0_25,
//BUTTON B
BUTTON_B = P0_26,
//ACCEL INTERRUPT PINS (MMA8653FC)
ACCEL_INT2 = P0_27,
ACCEL_INT1 = P0_28,
//MAGENETOMETER INTERRUPT PIN (MAG3110)
MAG_INT1 = P0_29,
// Not connected
NC = (int)0xFFFFFFFF,
RX_PIN_NUMBER = TGT_RX,
TX_PIN_NUMBER = TGT_TX,
CTS_PIN_NUMBER = 31, //unused ** REQUIRES A PROPER FIX **
RTS_PIN_NUMBER = 31, //unused
// mBed interface Pins
USBTX = TX_PIN_NUMBER,
USBRX = RX_PIN_NUMBER,
LED1 = PAD1,
LED2 = PAD2,
LED3 = PAD3,
LED4 = P0_16,
//SDA (SERIAL DATA LINE)
I2C_SDA0 = P0_30,
//SCL (SERIAL CLOCK LINE)
I2C_SCL0 = P0_0
} PinName;
typedef enum {
PullNone = 0,
PullDown = 1,
PullUp = 3,
PullDefault = PullUp
} PinMode;
#ifdef __cplusplus
}
#endif
#endif

38
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_NRF51_MICROBIT/device.h
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@ -1,38 +0,0 @@
// The 'features' section in 'target.json' is now used to create the device's hardware preprocessor switches.
// Check the 'features' section of the target description in 'targets.json' for more details.
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_DEVICE_H
#define MBED_DEVICE_H
#include "objects.h"
#endif

84
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/analogin_api.c
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@ -1,84 +0,0 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "mbed_assert.h"
#include "analogin_api.h"
#include "cmsis.h"
#include "pinmap.h"
#define ANALOGIN_MEDIAN_FILTER 1
#define ADC_10BIT_RANGE 0x3FF
#define ADC_RANGE ADC_10BIT_RANGE
static const PinMap PinMap_ADC[] = {
{P0_1, ADC0_0, 4},
{P0_2, ADC0_0, 8},
{P0_3, ADC0_0, 16},
{P0_4, ADC0_0, 32},
{P0_5, ADC0_0, 64},
{P0_6, ADC0_0, 128},
{P0_26, ADC0_0, 1},
{P0_27, ADC0_0, 2},
{NC, NC, 0}
};
void analogin_init(analogin_t *obj, PinName pin)
{
int analogInputPin = 0;
const PinMap *map = PinMap_ADC;
obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC); //(NRF_ADC_Type *)
MBED_ASSERT(obj->adc != (ADCName)NC);
while (map->pin != NC) {
if (map->pin == pin) {
analogInputPin = map->function;
break;
}
map++;
}
obj->adc_pin = (uint8_t)analogInputPin;
NRF_ADC->ENABLE = ADC_ENABLE_ENABLE_Enabled;
NRF_ADC->CONFIG = (ADC_CONFIG_RES_10bit << ADC_CONFIG_RES_Pos) |
(ADC_CONFIG_INPSEL_AnalogInputOneThirdPrescaling << ADC_CONFIG_INPSEL_Pos) |
(ADC_CONFIG_REFSEL_SupplyOneThirdPrescaling << ADC_CONFIG_REFSEL_Pos) |
(analogInputPin << ADC_CONFIG_PSEL_Pos) |
(ADC_CONFIG_EXTREFSEL_None << ADC_CONFIG_EXTREFSEL_Pos);
}
uint16_t analogin_read_u16(analogin_t *obj)
{
NRF_ADC->CONFIG &= ~ADC_CONFIG_PSEL_Msk;
NRF_ADC->CONFIG |= obj->adc_pin << ADC_CONFIG_PSEL_Pos;
NRF_ADC->EVENTS_END = 0;
NRF_ADC->TASKS_START = 1;
while (!NRF_ADC->EVENTS_END) {
}
return (uint16_t)NRF_ADC->RESULT; // 10 bit
}
float analogin_read(analogin_t *obj)
{
uint16_t value = analogin_read_u16(obj);
return (float)value * (1.0f / (float)ADC_RANGE);
}
const PinMap *analogin_pinmap()
{
return PinMap_ADC;
}

186
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_16K/startup_nRF51822.S
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@ -1,186 +0,0 @@
; mbed Microcontroller Library
; Copyright (c) 2013 Nordic Semiconductor.
;Licensed under the Apache License, Version 2.0 (the "License");
;you may not use this file except in compliance with the License.
;You may obtain a copy of the License at
;http://www.apache.org/licenses/LICENSE-2.0
;Unless required by applicable law or agreed to in writing, software
;distributed under the License is distributed on an "AS IS" BASIS,
;WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
;See the License for the specific language governing permissions and
;limitations under the License.
; Description message
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD POWER_CLOCK_IRQHandler ;POWER_CLOCK
DCD RADIO_IRQHandler ;RADIO
DCD UART0_IRQHandler ;UART0
DCD SPI0_TWI0_IRQHandler ;SPI0_TWI0
DCD SPI1_TWI1_IRQHandler ;SPI1_TWI1
DCD 0 ;Reserved
DCD GPIOTE_IRQHandler ;GPIOTE
DCD ADC_IRQHandler ;ADC
DCD TIMER0_IRQHandler ;TIMER0
DCD TIMER1_IRQHandler ;TIMER1
DCD TIMER2_IRQHandler ;TIMER2
DCD RTC0_IRQHandler ;RTC0
DCD TEMP_IRQHandler ;TEMP
DCD RNG_IRQHandler ;RNG
DCD ECB_IRQHandler ;ECB
DCD CCM_AAR_IRQHandler ;CCM_AAR
DCD WDT_IRQHandler ;WDT
DCD RTC1_IRQHandler ;RTC1
DCD QDEC_IRQHandler ;QDEC
DCD LPCOMP_COMP_IRQHandler ;LPCOMP_COMP
DCD SWI0_IRQHandler ;SWI0
DCD SWI1_IRQHandler ;SWI1
DCD SWI2_IRQHandler ;SWI2
DCD SWI3_IRQHandler ;SWI3
DCD SWI4_IRQHandler ;SWI4
DCD SWI5_IRQHandler ;SWI5
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset Handler
NRF_POWER_RAMON_ADDRESS EQU 0x40000524 ; NRF_POWER->RAMON address
NRF_POWER_RAMON_RAMxON_ONMODE_Msk EQU 0xF ; All RAM blocks on in onmode bit mask
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =NRF_POWER_RAMON_ADDRESS
LDR R2, [R0]
MOVS R1, #NRF_POWER_RAMON_RAMxON_ONMODE_Msk
ORRS R2, R2, R1
STR R2, [R0]
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT POWER_CLOCK_IRQHandler [WEAK]
EXPORT RADIO_IRQHandler [WEAK]
EXPORT UART0_IRQHandler [WEAK]
EXPORT SPI0_TWI0_IRQHandler [WEAK]
EXPORT SPI1_TWI1_IRQHandler [WEAK]
EXPORT GPIOTE_IRQHandler [WEAK]
EXPORT ADC_IRQHandler [WEAK]
EXPORT TIMER0_IRQHandler [WEAK]
EXPORT TIMER1_IRQHandler [WEAK]
EXPORT TIMER2_IRQHandler [WEAK]
EXPORT RTC0_IRQHandler [WEAK]
EXPORT TEMP_IRQHandler [WEAK]
EXPORT RNG_IRQHandler [WEAK]
EXPORT ECB_IRQHandler [WEAK]
EXPORT CCM_AAR_IRQHandler [WEAK]
EXPORT WDT_IRQHandler [WEAK]
EXPORT RTC1_IRQHandler [WEAK]
EXPORT QDEC_IRQHandler [WEAK]
EXPORT LPCOMP_COMP_IRQHandler [WEAK]
EXPORT SWI0_IRQHandler [WEAK]
EXPORT SWI1_IRQHandler [WEAK]
EXPORT SWI2_IRQHandler [WEAK]
EXPORT SWI3_IRQHandler [WEAK]
EXPORT SWI4_IRQHandler [WEAK]
EXPORT SWI5_IRQHandler [WEAK]
POWER_CLOCK_IRQHandler
RADIO_IRQHandler
UART0_IRQHandler
SPI0_TWI0_IRQHandler
SPI1_TWI1_IRQHandler
GPIOTE_IRQHandler
ADC_IRQHandler
TIMER0_IRQHandler
TIMER1_IRQHandler
TIMER2_IRQHandler
RTC0_IRQHandler
TEMP_IRQHandler
RNG_IRQHandler
ECB_IRQHandler
CCM_AAR_IRQHandler
WDT_IRQHandler
RTC1_IRQHandler
QDEC_IRQHandler
LPCOMP_COMP_IRQHandler
SWI0_IRQHandler
SWI1_IRQHandler
SWI2_IRQHandler
SWI3_IRQHandler
SWI4_IRQHandler
SWI5_IRQHandler
B .
ENDP
ALIGN
END

30
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_32K/nRF51822.sct
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@ -1,30 +0,0 @@
#! armcc -E
;WITHOUT SOFTDEVICE:
;LR_IROM1 0x00000000 0x00040000 {
; ER_IROM1 0x00000000 0x00040000 {
; *.o (RESET, +First)
; *(InRoot$$Sections)
; .ANY (+RO)
; }
; RW_IRAM1 0x20000000 0x00008000 {
; .ANY (+RW +ZI)
; }
;}
;
;WITH SOFTDEVICE:
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x1C000 0x0024000 {
ER_IROM1 0x1C000 0x0024000 {
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM1 0x20002800 0x00005800 {
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x20002800+0x00005800 EMPTY -Stack_Size { ; Stack region growing down
}
}

195
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_32K/startup_nRF51822.S
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@ -1,195 +0,0 @@
; mbed Microcontroller Library
; Copyright (c) 2013 Nordic Semiconductor.
;Licensed under the Apache License, Version 2.0 (the "License");
;you may not use this file except in compliance with the License.
;You may obtain a copy of the License at
;http://www.apache.org/licenses/LICENSE-2.0
;Unless required by applicable law or agreed to in writing, software
;distributed under the License is distributed on an "AS IS" BASIS,
;WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
;See the License for the specific language governing permissions and
;limitations under the License.
; Description message
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD POWER_CLOCK_IRQHandler ;POWER_CLOCK
DCD RADIO_IRQHandler ;RADIO
DCD UART0_IRQHandler ;UART0
DCD SPI0_TWI0_IRQHandler ;SPI0_TWI0
DCD SPI1_TWI1_IRQHandler ;SPI1_TWI1
DCD 0 ;Reserved
DCD GPIOTE_IRQHandler ;GPIOTE
DCD ADC_IRQHandler ;ADC
DCD TIMER0_IRQHandler ;TIMER0
DCD TIMER1_IRQHandler ;TIMER1
DCD TIMER2_IRQHandler ;TIMER2
DCD RTC0_IRQHandler ;RTC0
DCD TEMP_IRQHandler ;TEMP
DCD RNG_IRQHandler ;RNG
DCD ECB_IRQHandler ;ECB
DCD CCM_AAR_IRQHandler ;CCM_AAR
DCD WDT_IRQHandler ;WDT
DCD RTC1_IRQHandler ;RTC1
DCD QDEC_IRQHandler ;QDEC
DCD LPCOMP_IRQHandler ;LPCOMP
DCD SWI0_IRQHandler ;SWI0
DCD SWI1_IRQHandler ;SWI1
DCD SWI2_IRQHandler ;SWI2
DCD SWI3_IRQHandler ;SWI3
DCD SWI4_IRQHandler ;SWI4
DCD SWI5_IRQHandler ;SWI5
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset Handler
NRF_POWER_RAMON_ADDRESS EQU 0x40000524 ; NRF_POWER->RAMON address
NRF_POWER_RAMONB_ADDRESS EQU 0x40000554 ; NRF_POWER->RAMONB address
NRF_POWER_RAMONx_RAMxON_ONMODE_Msk EQU 0x3 ; All RAM blocks on in onmode bit mask
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
LDR R0, =NRF_POWER_RAMON_ADDRESS
LDR R2, [R0]
ORRS R2, R2, R1
STR R2, [R0]
LDR R0, =NRF_POWER_RAMONB_ADDRESS
LDR R2, [R0]
ORRS R2, R2, R1
STR R2, [R0]
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT POWER_CLOCK_IRQHandler [WEAK]
EXPORT RADIO_IRQHandler [WEAK]
EXPORT UART0_IRQHandler [WEAK]
EXPORT SPI0_TWI0_IRQHandler [WEAK]
EXPORT SPI1_TWI1_IRQHandler [WEAK]
EXPORT GPIOTE_IRQHandler [WEAK]
EXPORT ADC_IRQHandler [WEAK]
EXPORT TIMER0_IRQHandler [WEAK]
EXPORT TIMER1_IRQHandler [WEAK]
EXPORT TIMER2_IRQHandler [WEAK]
EXPORT RTC0_IRQHandler [WEAK]
EXPORT TEMP_IRQHandler [WEAK]
EXPORT RNG_IRQHandler [WEAK]
EXPORT ECB_IRQHandler [WEAK]
EXPORT CCM_AAR_IRQHandler [WEAK]
EXPORT WDT_IRQHandler [WEAK]
EXPORT RTC1_IRQHandler [WEAK]
EXPORT QDEC_IRQHandler [WEAK]
EXPORT LPCOMP_IRQHandler [WEAK]
EXPORT SWI0_IRQHandler [WEAK]
EXPORT SWI1_IRQHandler [WEAK]
EXPORT SWI2_IRQHandler [WEAK]
EXPORT SWI3_IRQHandler [WEAK]
EXPORT SWI4_IRQHandler [WEAK]
EXPORT SWI5_IRQHandler [WEAK]
POWER_CLOCK_IRQHandler
RADIO_IRQHandler
UART0_IRQHandler
SPI0_TWI0_IRQHandler
SPI1_TWI1_IRQHandler
GPIOTE_IRQHandler
ADC_IRQHandler
TIMER0_IRQHandler
TIMER1_IRQHandler
TIMER2_IRQHandler
RTC0_IRQHandler
TEMP_IRQHandler
RNG_IRQHandler
ECB_IRQHandler
CCM_AAR_IRQHandler
WDT_IRQHandler
RTC1_IRQHandler
QDEC_IRQHandler
LPCOMP_IRQHandler
SWI0_IRQHandler
SWI1_IRQHandler
SWI2_IRQHandler
SWI3_IRQHandler
SWI4_IRQHandler
SWI5_IRQHandler
B .
ENDP
ALIGN
END

30
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S110/nRF51822.sct
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@ -1,30 +0,0 @@
#! armcc -E
;WITHOUT SOFTDEVICE:
;LR_IROM1 0x00000000 0x00040000 {
; ER_IROM1 0x00000000 0x00040000 {
; *.o (RESET, +First)
; *(InRoot$$Sections)
; .ANY (+RO)
; }
; RW_IRAM1 0x20000000 0x00004000 {
; .ANY (+RW +ZI)
; }
;}
;
;WITH SOFTDEVICE:
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x18000 0x0028000 {
ER_IROM1 0x18000 0x0028000 {
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM1 0x20002000 0x00002000 {
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x20002000+0x00002000 EMPTY -Stack_Size { ; Stack region growing down
}
}

30
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S130/nRF51822.sct
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@ -1,30 +0,0 @@
#! armcc -E
;WITHOUT SOFTDEVICE:
;LR_IROM1 0x00000000 0x00040000 {
; ER_IROM1 0x00000000 0x00040000 {
; *.o (RESET, +First)
; *(InRoot$$Sections)
; .ANY (+RO)
; }
; RW_IRAM1 0x20000000 0x00004000 {
; .ANY (+RW +ZI)
; }
;}
;
;WITH SOFTDEVICE:
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x1C000 0x0024000 {
ER_IROM1 0x1C000 0x0024000 {
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM1 0x20002800 0x00001800 {
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x20002800+0x00001800 EMPTY -Stack_Size { ; Stack region growing down
}
}

157
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_32K/NRF51822.ld
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@ -1,157 +0,0 @@
/* Linker script to configure memory regions. */
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x800
#endif
MEMORY
{
FLASH (rx) : ORIGIN = 0x0001C000, LENGTH = 0x24000
RAM (rwx) : ORIGIN = 0x20002800, LENGTH = 0x5800
}
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
*
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
* __etext
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __end__
* end
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
*/
ENTRY(Reset_Handler)
SECTIONS
{
.text :
{
KEEP(*(.Vectors))
*(.text*)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
*(.rodata*)
KEEP(*(.eh_frame*))
} > FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
__exidx_end = .;
__etext = .;
.data : AT (__etext)
{
__data_start__ = .;
*(vtable)
*(.data*)
. = ALIGN(8);
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(8);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(8);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
*(.jcr)
. = ALIGN(8);
/* All data end */
__data_end__ = .;
} > RAM
.bss :
{
. = ALIGN(8);
__bss_start__ = .;
*(.bss*)
*(COMMON)
. = ALIGN(8);
__bss_end__ = .;
} > RAM
.heap (NOLOAD):
{
__end__ = .;
end = __end__;
__HeapBase = .;
*(.heap*)
. = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
__HeapLimit = .;
} > RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy (NOLOAD):
{
*(.stack*)
} > RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
}

157
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S110/NRF51822.ld
View File

@ -1,157 +0,0 @@
/* Linker script to configure memory regions. */
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x800
#endif
MEMORY
{
FLASH (rx) : ORIGIN = 0x00018000, LENGTH = 0x28000
RAM (rwx) : ORIGIN = 0x20002000, LENGTH = 0x2000
}
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
*
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
* __etext
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __end__
* end
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
*/
ENTRY(Reset_Handler)
SECTIONS
{
.text :
{
KEEP(*(.Vectors))
*(.text*)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
*(.rodata*)
KEEP(*(.eh_frame*))
} > FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
__exidx_end = .;
__etext = .;
.data : AT (__etext)
{
__data_start__ = .;
*(vtable)
*(.data*)
. = ALIGN(8);
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(8);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(8);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
*(.jcr)
. = ALIGN(8);
/* All data end */
__data_end__ = .;
} > RAM
.bss :
{
. = ALIGN(8);
__bss_start__ = .;
*(.bss*)
*(COMMON)
. = ALIGN(8);
__bss_end__ = .;
} > RAM
.heap (NOLOAD):
{
__end__ = .;
end = __end__;
__HeapBase = .;
*(.heap*)
. = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
__HeapLimit = .;
} > RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy (NOLOAD):
{
*(.stack*)
} > RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
}

157
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S130/NRF51822.ld
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@ -1,157 +0,0 @@
/* Linker script to configure memory regions. */
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x800
#endif
MEMORY
{
FLASH (rx) : ORIGIN = 0x0001C000, LENGTH = 0x24000
RAM (rwx) : ORIGIN = 0x20002800, LENGTH = 0x1800
}
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
*
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
* __etext
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __end__
* end
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
*/
ENTRY(Reset_Handler)
SECTIONS
{
.text :
{
KEEP(*(.Vectors))
*(.text*)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
*(.rodata*)
KEEP(*(.eh_frame*))
} > FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
__exidx_end = .;
__etext = .;
.data : AT (__etext)
{
__data_start__ = .;
*(vtable)
*(.data*)
. = ALIGN(8);
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(8);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(8);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
*(.jcr)
. = ALIGN(8);
/* All data end */
__data_end__ = .;
} > RAM
.bss :
{
. = ALIGN(8);
__bss_start__ = .;
*(.bss*)
*(COMMON)
. = ALIGN(8);
__bss_end__ = .;
} > RAM
.heap (NOLOAD):
{
__end__ = .;
end = __end__;
__HeapBase = .;
*(.heap*)
. = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
__HeapLimit = .;
} > RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy (NOLOAD):
{
*(.stack*)
} > RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
}

243
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/startup_NRF51822.S
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@ -1,243 +0,0 @@
/*
Copyright (c) 2013, Nordic Semiconductor ASA
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
* Neither the name of Nordic Semiconductor ASA nor the names of its
contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
NOTE: Template files (including this one) are application specific and therefore
expected to be copied into the application project folder prior to its use!
*/
.syntax unified
.arch armv6-m
.section .stack
.align 3
.globl __StackTop
.globl __StackLimit
__StackLimit:
.size __StackLimit, . - __StackLimit
__StackTop:
.size __StackTop, . - __StackTop
.section .heap
.align 3
.globl __HeapBase
.globl __HeapLimit
.section .Vectors
.align 2
.globl __Vectors
__Vectors:
.long __StackTop /* Top of Stack */
.long Reset_Handler /* Reset Handler */
.long NMI_Handler /* NMI Handler */
.long HardFault_Handler /* Hard Fault Handler */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long SVC_Handler /* SVCall Handler */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long PendSV_Handler /* PendSV Handler */
.long SysTick_Handler /* SysTick Handler */
/* External Interrupts */
.long POWER_CLOCK_IRQHandler /*POWER_CLOCK */
.long RADIO_IRQHandler /*RADIO */
.long UART0_IRQHandler /*UART0 */
.long SPI0_TWI0_IRQHandler /*SPI0_TWI0 */
.long SPI1_TWI1_IRQHandler /*SPI1_TWI1 */
.long 0 /*Reserved */
.long GPIOTE_IRQHandler /*GPIOTE */
.long ADC_IRQHandler /*ADC */
.long TIMER0_IRQHandler /*TIMER0 */
.long TIMER1_IRQHandler /*TIMER1 */
.long TIMER2_IRQHandler /*TIMER2 */
.long RTC0_IRQHandler /*RTC0 */
.long TEMP_IRQHandler /*TEMP */
.long RNG_IRQHandler /*RNG */
.long ECB_IRQHandler /*ECB */
.long CCM_AAR_IRQHandler /*CCM_AAR */
.long WDT_IRQHandler /*WDT */
.long RTC1_IRQHandler /*RTC1 */
.long QDEC_IRQHandler /*QDEC */
.long LPCOMP_IRQHandler /*LPCOMP */
.long SWI0_IRQHandler /*SWI0 */
.long SWI1_IRQHandler /*SWI1 */
.long SWI2_IRQHandler /*SWI2 */
.long SWI3_IRQHandler /*SWI3 */
.long SWI4_IRQHandler /*SWI4 */
.long SWI5_IRQHandler /*SWI5 */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.size __Vectors, . - __Vectors
/* Reset Handler */
.equ NRF_POWER_RAMON_ADDRESS, 0x40000524
.equ NRF_POWER_RAMON_RAMxON_ONMODE_Msk, 0x3
.text
.thumb
.thumb_func
.align 1
.globl Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
.fnstart
/* Make sure ALL RAM banks are powered on */
LDR R0, =NRF_POWER_RAMON_ADDRESS
LDR R2, [R0]
MOVS R1, #NRF_POWER_RAMON_RAMxON_ONMODE_Msk
ORRS R2, R1
STR R2, [R0]
/* Loop to copy data from read only memory to RAM. The ranges
* of copy from/to are specified by following symbols evaluated in
* linker script.
* __etext: End of code section, i.e., begin of data sections to copy from.
* __data_start__/__data_end__: RAM address range that data should be
* copied to. Both must be aligned to 4 bytes boundary. */
ldr r1, =__etext
ldr r2, =__data_start__
ldr r3, =__data_end__
subs r3, r2
ble .LC0
.LC1:
subs r3, 4
ldr r0, [r1,r3]
str r0, [r2,r3]
bgt .LC1
.LC0:
LDR R0, =SystemInit
BLX R0
LDR R0, =_start
BX R0
.pool
.cantunwind
.fnend
.size Reset_Handler,.-Reset_Handler
.section ".text"
/* Dummy Exception Handlers (infinite loops which can be modified) */
.weak NMI_Handler
.type NMI_Handler, %function
NMI_Handler:
B .
.size NMI_Handler, . - NMI_Handler
.weak HardFault_Handler
.type HardFault_Handler, %function
HardFault_Handler:
B .
.size HardFault_Handler, . - HardFault_Handler
.weak SVC_Handler
.type SVC_Handler, %function
SVC_Handler:
B .
.size SVC_Handler, . - SVC_Handler
.weak PendSV_Handler
.type PendSV_Handler, %function
PendSV_Handler:
B .
.size PendSV_Handler, . - PendSV_Handler
.weak SysTick_Handler
.type SysTick_Handler, %function
SysTick_Handler:
B .
.size SysTick_Handler, . - SysTick_Handler
/* IRQ Handlers */
.globl Default_Handler
.type Default_Handler, %function
Default_Handler:
B .
.size Default_Handler, . - Default_Handler
.macro IRQ handler
.weak \handler
.set \handler, Default_Handler
.endm
IRQ POWER_CLOCK_IRQHandler
IRQ RADIO_IRQHandler
IRQ UART0_IRQHandler
IRQ SPI0_TWI0_IRQHandler
IRQ SPI1_TWI1_IRQHandler
IRQ GPIOTE_IRQHandler
IRQ ADC_IRQHandler
IRQ TIMER0_IRQHandler
IRQ TIMER1_IRQHandler
IRQ TIMER2_IRQHandler
IRQ RTC0_IRQHandler
IRQ TEMP_IRQHandler
IRQ RNG_IRQHandler
IRQ ECB_IRQHandler
IRQ CCM_AAR_IRQHandler
IRQ WDT_IRQHandler
IRQ RTC1_IRQHandler
IRQ QDEC_IRQHandler
IRQ LPCOMP_IRQHandler
IRQ SWI0_IRQHandler
IRQ SWI1_IRQHandler
IRQ SWI2_IRQHandler
IRQ SWI3_IRQHandler
IRQ SWI4_IRQHandler
IRQ SWI5_IRQHandler
.end

46
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_16K/nRF51822_QFAA.icf
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@ -1,46 +0,0 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00016000;
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x000160c0;
define symbol __ICFEDIT_region_ROM_end__ = 0x0003FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20002000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0x900;
/**** End of ICF editor section. ###ICF###*/
define symbol __code_start_soft_device__ = 0x0;
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
keep { section .intvec };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite,
block CSTACK,
block HEAP };
/*This is used for mbed applications build inside the Embedded workbench
Applications build with the python scritps use a hex merge so need to merge it
inside the linker. The linker can only use binary files so the hex merge is not possible
through the linker. That is why a binary is used instead of a hex image for the embedded project.
*/
if(isdefinedsymbol(SOFT_DEVICE_BIN))
{
place at address mem:__code_start_soft_device__ { section .noinit_softdevice };
}

237
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_16K/startup_NRF51822_IAR.S
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@ -1,237 +0,0 @@
;; Copyright (c) 2009 Nordic Semiconductor. All Rights Reserved.
;; The information contained herein is confidential property of Nordic
;; Semiconductor ASA.Terms and conditions of usage are described in detail
;; in NORDIC SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
;; Licensees are granted free, non-transferable use of the information. NO
;; WARRANTY of ANY KIND is provided. This heading must NOT be removed from
;; the file.
;; Description message
MODULE ?cstartup
;; Stack size default : 1024
;; Heap size default : 2048
;; Forward declaration of sections.
SECTION CSTACK:DATA:NOROOT(3)
SECTION .intvec:CODE:NOROOT(2)
EXTERN __iar_program_start
EXTERN SystemInit
PUBLIC __vector_table
PUBLIC __Vectors
PUBLIC __Vectors_End
PUBLIC __Vectors_Size
DATA
__vector_table
DCD sfe(CSTACK)
DCD Reset_Handler
DCD NMI_Handler
DCD HardFault_Handler
DCD 0
DCD 0
DCD 0
;__vector_table_0x1c
DCD 0
DCD 0
DCD 0
DCD 0
DCD SVC_Handler
DCD 0
DCD 0
DCD PendSV_Handler
DCD SysTick_Handler
; External Interrupts
DCD POWER_CLOCK_IRQHandler ;POWER_CLOCK
DCD RADIO_IRQHandler ;RADIO
DCD UART0_IRQHandler ;UART0
DCD SPI0_TWI0_IRQHandler ;SPI0_TWI0
DCD SPI1_TWI1_IRQHandler ;SPI1_TWI1
DCD 0 ;Reserved
DCD GPIOTE_IRQHandler ;GPIOTE
DCD ADC_IRQHandler ;ADC
DCD TIMER0_IRQHandler ;TIMER0
DCD TIMER1_IRQHandler ;TIMER1
DCD TIMER2_IRQHandler ;TIMER2
DCD RTC0_IRQHandler ;RTC0
DCD TEMP_IRQHandler ;TEMP
DCD RNG_IRQHandler ;RNG
DCD ECB_IRQHandler ;ECB
DCD CCM_AAR_IRQHandler ;CCM_AAR
DCD WDT_IRQHandler ;WDT
DCD RTC1_IRQHandler ;RTC1
DCD QDEC_IRQHandler ;QDEC
DCD LPCOMP_COMP_IRQHandler ;LPCOMP_COMP
DCD SWI0_IRQHandler ;SWI0
DCD SWI1_IRQHandler ;SWI1
DCD SWI2_IRQHandler ;SWI2
DCD SWI3_IRQHandler ;SWI3
DCD SWI4_IRQHandler ;SWI4
DCD SWI5_IRQHandler ;SWI5
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
__Vectors_End
__Vectors EQU __vector_table
__Vectors_Size EQU __Vectors_End - __Vectors
NRF_POWER_RAMON_ADDRESS EQU 0x40000524 ; NRF_POWER->RAMON address
NRF_POWER_RAMON_RAMxON_ONMODE_Msk EQU 0xF ; All RAM blocks on in onmode bit mask
; Default handlers.
THUMB
PUBWEAK Reset_Handler
SECTION .text:CODE:REORDER:NOROOT(2)
Reset_Handler
LDR R0, =NRF_POWER_RAMON_ADDRESS
LDR R2, [R0]
MOVS R1, #NRF_POWER_RAMON_RAMxON_ONMODE_Msk
ORRS R2, R2, R1
STR R2, [R0]
LDR R0, =SystemInit
BLX R0
LDR R0, =__iar_program_start
BX R0
; Dummy exception handlers
PUBWEAK NMI_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
NMI_Handler
B .
PUBWEAK HardFault_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
HardFault_Handler
B .
PUBWEAK SVC_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
SVC_Handler
B .
PUBWEAK PendSV_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
PendSV_Handler
B .
PUBWEAK SysTick_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
SysTick_Handler
B .
; Dummy interrupt handlers
PUBWEAK POWER_CLOCK_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
POWER_CLOCK_IRQHandler
B .
PUBWEAK RADIO_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
RADIO_IRQHandler
B .
PUBWEAK UART0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
UART0_IRQHandler
B .
PUBWEAK SPI0_TWI0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SPI0_TWI0_IRQHandler
B .
PUBWEAK SPI1_TWI1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SPI1_TWI1_IRQHandler
B .
PUBWEAK GPIOTE_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
GPIOTE_IRQHandler
B .
PUBWEAK ADC_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
ADC_IRQHandler
B .
PUBWEAK TIMER0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TIMER0_IRQHandler
B .
PUBWEAK TIMER1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TIMER1_IRQHandler
B .
PUBWEAK TIMER2_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TIMER2_IRQHandler
B .
PUBWEAK RTC0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
RTC0_IRQHandler
B .
PUBWEAK TEMP_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TEMP_IRQHandler
B .
PUBWEAK RNG_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
RNG_IRQHandler
B .
PUBWEAK ECB_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
ECB_IRQHandler
B .
PUBWEAK CCM_AAR_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
CCM_AAR_IRQHandler
B .
PUBWEAK WDT_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
WDT_IRQHandler
B .
PUBWEAK RTC1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
RTC1_IRQHandler
B .
PUBWEAK QDEC_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
QDEC_IRQHandler
B .
PUBWEAK LPCOMP_COMP_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
LPCOMP_COMP_IRQHandler
B .
PUBWEAK SWI0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI0_IRQHandler
B .
PUBWEAK SWI1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI1_IRQHandler
B .
PUBWEAK SWI2_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI2_IRQHandler
B .
PUBWEAK SWI3_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI3_IRQHandler
B .
PUBWEAK SWI4_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI4_IRQHandler
B .
PUBWEAK SWI5_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI5_IRQHandler
B .
END

46
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf
View File

@ -1,46 +0,0 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00016000;
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x000160c0;
define symbol __ICFEDIT_region_ROM_end__ = 0x0003FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20002000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0x1800;
/**** End of ICF editor section. ###ICF###*/
define symbol __code_start_soft_device__ = 0x0;
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
keep { section .intvec };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite,
block CSTACK,
block HEAP };
/*This is used for mbed applications build inside the Embedded workbench
Applications build with the python scritps use a hex merge so need to merge it
inside the linker. The linker can only use binary files so the hex merge is not possible
through the linker. That is why a binary is used instead of a hex image for the embedded project.
*/
if(isdefinedsymbol(SOFT_DEVICE_BIN))
{
place at address mem:__code_start_soft_device__ { section .noinit_softdevice };
}

237
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/startup_NRF51822_IAR.S
View File

@ -1,237 +0,0 @@
;; Copyright (c) 2009 Nordic Semiconductor. All Rights Reserved.
;; The information contained herein is confidential property of Nordic
;; Semiconductor ASA.Terms and conditions of usage are described in detail
;; in NORDIC SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
;; Licensees are granted free, non-transferable use of the information. NO
;; WARRANTY of ANY KIND is provided. This heading must NOT be removed from
;; the file.
;; Description message
MODULE ?cstartup
;; Stack size default : 1024
;; Heap size default : 2048
;; Forward declaration of sections.
SECTION CSTACK:DATA:NOROOT(3)
SECTION .intvec:CODE:NOROOT(2)
EXTERN __iar_program_start
EXTERN SystemInit
PUBLIC __vector_table
PUBLIC __Vectors
PUBLIC __Vectors_End
PUBLIC __Vectors_Size
DATA
__vector_table
DCD sfe(CSTACK)
DCD Reset_Handler
DCD NMI_Handler
DCD HardFault_Handler
DCD 0
DCD 0
DCD 0
;__vector_table_0x1c
DCD 0
DCD 0
DCD 0
DCD 0
DCD SVC_Handler
DCD 0
DCD 0
DCD PendSV_Handler
DCD SysTick_Handler
; External Interrupts
DCD POWER_CLOCK_IRQHandler ;POWER_CLOCK
DCD RADIO_IRQHandler ;RADIO
DCD UART0_IRQHandler ;UART0
DCD SPI0_TWI0_IRQHandler ;SPI0_TWI0
DCD SPI1_TWI1_IRQHandler ;SPI1_TWI1
DCD 0 ;Reserved
DCD GPIOTE_IRQHandler ;GPIOTE
DCD ADC_IRQHandler ;ADC
DCD TIMER0_IRQHandler ;TIMER0
DCD TIMER1_IRQHandler ;TIMER1
DCD TIMER2_IRQHandler ;TIMER2
DCD RTC0_IRQHandler ;RTC0
DCD TEMP_IRQHandler ;TEMP
DCD RNG_IRQHandler ;RNG
DCD ECB_IRQHandler ;ECB
DCD CCM_AAR_IRQHandler ;CCM_AAR
DCD WDT_IRQHandler ;WDT
DCD RTC1_IRQHandler ;RTC1
DCD QDEC_IRQHandler ;QDEC
DCD LPCOMP_COMP_IRQHandler ;LPCOMP_COMP
DCD SWI0_IRQHandler ;SWI0
DCD SWI1_IRQHandler ;SWI1
DCD SWI2_IRQHandler ;SWI2
DCD SWI3_IRQHandler ;SWI3
DCD SWI4_IRQHandler ;SWI4
DCD SWI5_IRQHandler ;SWI5
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
__Vectors_End
__Vectors EQU __vector_table
__Vectors_Size EQU __Vectors_End - __Vectors
NRF_POWER_RAMON_ADDRESS EQU 0x40000524 ; NRF_POWER->RAMON address
NRF_POWER_RAMON_RAMxON_ONMODE_Msk EQU 0xF ; All RAM blocks on in onmode bit mask
; Default handlers.
THUMB
PUBWEAK Reset_Handler
SECTION .text:CODE:REORDER:NOROOT(2)
Reset_Handler
LDR R0, =NRF_POWER_RAMON_ADDRESS
LDR R2, [R0]
MOVS R1, #NRF_POWER_RAMON_RAMxON_ONMODE_Msk
ORRS R2, R2, R1
STR R2, [R0]
LDR R0, =SystemInit
BLX R0
LDR R0, =__iar_program_start
BX R0
; Dummy exception handlers
PUBWEAK NMI_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
NMI_Handler
B .
PUBWEAK HardFault_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
HardFault_Handler
B .
PUBWEAK SVC_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
SVC_Handler
B .
PUBWEAK PendSV_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
PendSV_Handler
B .
PUBWEAK SysTick_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
SysTick_Handler
B .
; Dummy interrupt handlers
PUBWEAK POWER_CLOCK_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
POWER_CLOCK_IRQHandler
B .
PUBWEAK RADIO_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
RADIO_IRQHandler
B .
PUBWEAK UART0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
UART0_IRQHandler
B .
PUBWEAK SPI0_TWI0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SPI0_TWI0_IRQHandler
B .
PUBWEAK SPI1_TWI1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SPI1_TWI1_IRQHandler
B .
PUBWEAK GPIOTE_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
GPIOTE_IRQHandler
B .
PUBWEAK ADC_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
ADC_IRQHandler
B .
PUBWEAK TIMER0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TIMER0_IRQHandler
B .
PUBWEAK TIMER1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TIMER1_IRQHandler
B .
PUBWEAK TIMER2_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TIMER2_IRQHandler
B .
PUBWEAK RTC0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
RTC0_IRQHandler
B .
PUBWEAK TEMP_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TEMP_IRQHandler
B .
PUBWEAK RNG_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
RNG_IRQHandler
B .
PUBWEAK ECB_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
ECB_IRQHandler
B .
PUBWEAK CCM_AAR_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
CCM_AAR_IRQHandler
B .
PUBWEAK WDT_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
WDT_IRQHandler
B .
PUBWEAK RTC1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
RTC1_IRQHandler
B .
PUBWEAK QDEC_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
QDEC_IRQHandler
B .
PUBWEAK LPCOMP_COMP_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
LPCOMP_COMP_IRQHandler
B .
PUBWEAK SWI0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI0_IRQHandler
B .
PUBWEAK SWI1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI1_IRQHandler
B .
PUBWEAK SWI2_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI2_IRQHandler
B .
PUBWEAK SWI3_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI3_IRQHandler
B .
PUBWEAK SWI4_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI4_IRQHandler
B .
PUBWEAK SWI5_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI5_IRQHandler
B .
END

BIN
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/s110_nrf51822_7.1.0_softdevice.bin
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Binary file not shown.

13
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/cmsis.h
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@ -1,13 +0,0 @@
/* mbed Microcontroller Library - CMSIS
* Copyright (C) 2009-2011 ARM Limited. All rights reserved.
*
* A generic CMSIS include header, pulling in LPC407x_8x specifics
*/
#ifndef MBED_CMSIS_H
#define MBED_CMSIS_H
#include "nrf.h"
#include "cmsis_nvic.h"
#endif

103
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/cmsis_nvic.c
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@ -1,103 +0,0 @@
/* mbed Microcontroller Library
* CMSIS-style functionality to support dynamic vectors
*******************************************************************************
* Copyright (c) 2011 ARM Limited. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of ARM Limited nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#include "cmsis_nvic.h"
/* In the M0, there is no VTOR. In the LPC range such as the LPC11U,
* whilst the vector table may only be something like 48 entries (192 bytes, 0xC0),
* the SYSMEMREMAP register actually remaps the memory from 0x10000000-0x100001FF
* to adress 0x0-0x1FF. In this case, RAM can be addressed at both 0x10000000 and 0x0
*
* If we just copy the vectors to RAM and switch the SYSMEMMAP, any accesses to FLASH
* above the vector table before 0x200 will actually go to RAM. So we need to provide
* a solution where the compiler gets the right results based on the memory map
*
* Option 1 - We allocate and copy 0x200 of RAM rather than just the table
* - const data and instructions before 0x200 will be copied to and fetched/exec from RAM
* - RAM overhead: 0x200 - 0xC0 = 320 bytes, FLASH overhead: 0
*
* Option 2 - We pad the flash to 0x200 to ensure the compiler doesn't allocate anything there
* - No flash accesses will go to ram, as there will be nothing there
* - RAM only needs to be allocated for the vectors, as all other ram addresses are normal
* - RAM overhead: 0, FLASH overhead: 320 bytes
*
* Option 2 is the one to go for, as RAM is the most valuable resource
*/
#define NVIC_RAM_VECTOR_ADDRESS (0x10000000) // Location of vectors in RAM
#define NVIC_FLASH_VECTOR_ADDRESS (0x0) // Initial vector position in flash
/*
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
uint32_t *vectors = (uint32_t*)SCB->VTOR;
uint32_t i;
// Copy and switch to dynamic vectors if the first time called
if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) {
uint32_t *old_vectors = vectors;
vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
for (i=0; i<NVIC_NUM_VECTORS; i++) {
vectors[i] = old_vectors[i];
}
SCB->VTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS;
}
vectors[IRQn + 16] = vector;
}
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
uint32_t *vectors = (uint32_t*)SCB->VTOR;
return vectors[IRQn + 16];
}*/
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
// int i;
// Space for dynamic vectors, initialised to allocate in R/W
static volatile uint32_t* vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
/*
// Copy and switch to dynamic vectors if first time called
if((LPC_SYSCON->SYSMEMREMAP & 0x3) != 0x1) {
uint32_t *old_vectors = (uint32_t *)0; // FLASH vectors are at 0x0
for(i = 0; i < NVIC_NUM_VECTORS; i++) {
vectors[i] = old_vectors[i];
}
LPC_SYSCON->SYSMEMREMAP = 0x1; // Remaps 0x0-0x1FF FLASH block to RAM block
}*/
// Set the vector
vectors[IRQn + 16] = vector;
}
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
// We can always read vectors at 0x0, as the addresses are remapped
uint32_t *vectors = (uint32_t*)0;
// Return the vector
return vectors[IRQn + 16];
}

53
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/cmsis_nvic.h
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@ -1,53 +0,0 @@
/* mbed Microcontroller Library
* CMSIS-style functionality to support dynamic vectors
*******************************************************************************
* Copyright (c) 2011 ARM Limited. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of ARM Limited nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
#define NVIC_NUM_VECTORS (16 + 32) // CORE + MCU Peripherals
#define NVIC_USER_IRQ_OFFSET 16
#include "nrf51.h"
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
uint32_t NVIC_GetVector(IRQn_Type IRQn);
#ifdef __cplusplus
}
#endif
#endif

109
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/compiler_abstraction.h
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@ -1,109 +0,0 @@
/* Copyright (c) 2013, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* * Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef _COMPILER_ABSTRACTION_H
#define _COMPILER_ABSTRACTION_H
/*lint ++flb "Enter library region" */
#if defined ( __CC_ARM )
#ifndef __ASM
#define __ASM __asm /*!< asm keyword for ARM Compiler */
#endif
#ifndef __INLINE
#define __INLINE __inline /*!< inline keyword for ARM Compiler */
#endif
#ifndef __WEAK
#define __WEAK __weak /*!< weak keyword for ARM Compiler */
#endif
#define GET_SP() __current_sp() /*!> read current SP function for ARM Compiler */
#elif defined ( __ICCARM__ )
#ifndef __ASM
#define __ASM __asm /*!< asm keyword for IAR Compiler */
#endif
#ifndef __INLINE
#define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
#endif
#ifndef __WEAK
#define __WEAK __weak /*!> define weak function for IAR Compiler */
#endif
#define GET_SP() __get_SP() /*!> read current SP function for IAR Compiler */
#elif defined ( __GNUC__ )
#ifndef __ASM
#define __ASM __asm /*!< asm keyword for GNU Compiler */
#endif
#ifndef __INLINE
#define __INLINE inline /*!< inline keyword for GNU Compiler */
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak)) /*!< weak keyword for GNU Compiler */
#endif
#define GET_SP() gcc_current_sp() /*!> read current SP function for GNU Compiler */
static inline unsigned int gcc_current_sp(void)
{
register unsigned sp asm("sp");
return sp;
}
#elif defined ( __TASKING__ )
#ifndef __ASM
#define __ASM __asm /*!< asm keyword for TASKING Compiler */
#endif
#ifndef __INLINE
#define __INLINE inline /*!< inline keyword for TASKING Compiler */
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak)) /*!< weak keyword for TASKING Compiler */
#endif
#define GET_SP() __get_MSP() /*!> read current SP function for TASKING Compiler */
#endif
/*lint --flb "Leave library region" */
#endif

61
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/nrf.h
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@ -1,61 +0,0 @@
/*
* Copyright (c) Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of other
* contributors to this software may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef NRF_H
#define NRF_H
#if defined(_WIN32)
/* Do not include nrf51 specific files when building for PC host */
#elif defined(__unix)
/* Do not include nrf51 specific files when building for PC host */
#elif defined(__APPLE__)
/* Do not include nrf51 specific files when building for PC host */
#else
/* Family selection for family includes. */
#if defined (NRF51)
#include "nrf51.h"
#include "nrf51_bitfields.h"
#include "nrf51_deprecated.h"
#elif defined (NRF52)
#include "nrf52.h"
#include "nrf52_bitfields.h"
#include "nrf51_to_nrf52.h"
#else
#error "Device family must be defined. See nrf.h."
#endif /* NRF51, NRF52 */
#include "compiler_abstraction.h"
#endif /* _WIN32 || __unix || __APPLE__ */
#endif /* NRF_H */

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targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/nrf51.h
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targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/nrf51_bitfields.h
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440
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/nrf51_deprecated.h
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@ -1,440 +0,0 @@
/*
* Copyright (c) Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of other
* contributors to this software may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef NRF51_DEPRECATED_H
#define NRF51_DEPRECATED_H
/*lint ++flb "Enter library region */
/* This file is given to prevent your SW from not compiling with the updates made to nrf51.h and
* nrf51_bitfields.h. The macros defined in this file were available previously. Do not use these
* macros on purpose. Use the ones defined in nrf51.h and nrf51_bitfields.h instead.
*/
/* NVMC */
/* The register ERASEPROTECTEDPAGE is called ERASEPCR0 in the documentation. */
#define ERASEPROTECTEDPAGE ERASEPCR0
/* LPCOMP */
/* The interrupt ISR was renamed. Adding old name to the macros. */
#define LPCOMP_COMP_IRQHandler LPCOMP_IRQHandler
#define LPCOMP_COMP_IRQn LPCOMP_IRQn
/* MPU */
/* The field MPU.PERR0.LPCOMP_COMP was renamed. Added into deprecated in case somebody was using the macros defined for it. */
#define MPU_PERR0_LPCOMP_COMP_Pos MPU_PERR0_LPCOMP_Pos
#define MPU_PERR0_LPCOMP_COMP_Msk MPU_PERR0_LPCOMP_Msk
#define MPU_PERR0_LPCOMP_COMP_InRegion1 MPU_PERR0_LPCOMP_InRegion1
#define MPU_PERR0_LPCOMP_COMP_InRegion0 MPU_PERR0_LPCOMP_InRegion0
/* POWER */
/* The field POWER.RAMON.OFFRAM3 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */
#define POWER_RAMON_OFFRAM3_Pos (19UL)
#define POWER_RAMON_OFFRAM3_Msk (0x1UL << POWER_RAMON_OFFRAM3_Pos)
#define POWER_RAMON_OFFRAM3_RAM3Off (0UL)
#define POWER_RAMON_OFFRAM3_RAM3On (1UL)
/* The field POWER.RAMON.OFFRAM2 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */
#define POWER_RAMON_OFFRAM2_Pos (18UL)
#define POWER_RAMON_OFFRAM2_Msk (0x1UL << POWER_RAMON_OFFRAM2_Pos)
#define POWER_RAMON_OFFRAM2_RAM2Off (0UL)
#define POWER_RAMON_OFFRAM2_RAM2On (1UL)
/* The field POWER.RAMON.ONRAM3 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */
#define POWER_RAMON_ONRAM3_Pos (3UL)
#define POWER_RAMON_ONRAM3_Msk (0x1UL << POWER_RAMON_ONRAM3_Pos)
#define POWER_RAMON_ONRAM3_RAM3Off (0UL)
#define POWER_RAMON_ONRAM3_RAM3On (1UL)
/* The field POWER.RAMON.ONRAM2 was eliminated. Added into deprecated in case somebody was using the macros defined for it. */
#define POWER_RAMON_ONRAM2_Pos (2UL)
#define POWER_RAMON_ONRAM2_Msk (0x1UL << POWER_RAMON_ONRAM2_Pos)
#define POWER_RAMON_ONRAM2_RAM2Off (0UL)
#define POWER_RAMON_ONRAM2_RAM2On (1UL)
/* RADIO */
/* The enumerated value RADIO.TXPOWER.TXPOWER.Neg40dBm was renamed. Added into deprecated with the new macro name. */
#define RADIO_TXPOWER_TXPOWER_Neg40dBm RADIO_TXPOWER_TXPOWER_Neg30dBm
/* The name of the field SKIPADDR was corrected. Old macros added for compatibility. */
#define RADIO_CRCCNF_SKIP_ADDR_Pos RADIO_CRCCNF_SKIPADDR_Pos
#define RADIO_CRCCNF_SKIP_ADDR_Msk RADIO_CRCCNF_SKIPADDR_Msk
#define RADIO_CRCCNF_SKIP_ADDR_Include RADIO_CRCCNF_SKIPADDR_Include
#define RADIO_CRCCNF_SKIP_ADDR_Skip RADIO_CRCCNF_SKIPADDR_Skip
/* The name of the field PLLLOCK was corrected. Old macros added for compatibility. */
#define RADIO_TEST_PLL_LOCK_Pos RADIO_TEST_PLLLOCK_Pos
#define RADIO_TEST_PLL_LOCK_Msk RADIO_TEST_PLLLOCK_Msk
#define RADIO_TEST_PLL_LOCK_Disabled RADIO_TEST_PLLLOCK_Disabled
#define RADIO_TEST_PLL_LOCK_Enabled RADIO_TEST_PLLLOCK_Enabled
/* The name of the field CONSTCARRIER was corrected. Old macros added for compatibility. */
#define RADIO_TEST_CONST_CARRIER_Pos RADIO_TEST_CONSTCARRIER_Pos
#define RADIO_TEST_CONST_CARRIER_Msk RADIO_TEST_CONSTCARRIER_Msk
#define RADIO_TEST_CONST_CARRIER_Disabled RADIO_TEST_CONSTCARRIER_Disabled
#define RADIO_TEST_CONST_CARRIER_Enabled RADIO_TEST_CONSTCARRIER_Enabled
/* FICR */
/* The registers FICR.SIZERAMBLOCK0, FICR.SIZERAMBLOCK1, FICR.SIZERAMBLOCK2 and FICR.SIZERAMBLOCK3 were renamed into an array. */
#define SIZERAMBLOCK0 SIZERAMBLOCKS
#define SIZERAMBLOCK1 SIZERAMBLOCKS
#define SIZERAMBLOCK2 SIZERAMBLOCK[2] /*!< Note that this macro will disapear when SIZERAMBLOCK array is eliminated. SIZERAMBLOCK is a deprecated array. */
#define SIZERAMBLOCK3 SIZERAMBLOCK[3] /*!< Note that this macro will disapear when SIZERAMBLOCK array is eliminated. SIZERAMBLOCK is a deprecated array. */
/* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */
#define DEVICEID0 DEVICEID[0]
#define DEVICEID1 DEVICEID[1]
/* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */
#define ER0 ER[0]
#define ER1 ER[1]
#define ER2 ER[2]
#define ER3 ER[3]
/* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */
#define IR0 IR[0]
#define IR1 IR[1]
#define IR2 IR[2]
#define IR3 IR[3]
/* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */
#define DEVICEADDR0 DEVICEADDR[0]
#define DEVICEADDR1 DEVICEADDR[1]
/* PPI */
/* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */
#define TASKS_CHG0EN TASKS_CHG[0].EN
#define TASKS_CHG0DIS TASKS_CHG[0].DIS
#define TASKS_CHG1EN TASKS_CHG[1].EN
#define TASKS_CHG1DIS TASKS_CHG[1].DIS
#define TASKS_CHG2EN TASKS_CHG[2].EN
#define TASKS_CHG2DIS TASKS_CHG[2].DIS
#define TASKS_CHG3EN TASKS_CHG[3].EN
#define TASKS_CHG3DIS TASKS_CHG[3].DIS
/* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */
#define CH0_EEP CH[0].EEP
#define CH0_TEP CH[0].TEP
#define CH1_EEP CH[1].EEP
#define CH1_TEP CH[1].TEP
#define CH2_EEP CH[2].EEP
#define CH2_TEP CH[2].TEP
#define CH3_EEP CH[3].EEP
#define CH3_TEP CH[3].TEP
#define CH4_EEP CH[4].EEP
#define CH4_TEP CH[4].TEP
#define CH5_EEP CH[5].EEP
#define CH5_TEP CH[5].TEP
#define CH6_EEP CH[6].EEP
#define CH6_TEP CH[6].TEP
#define CH7_EEP CH[7].EEP
#define CH7_TEP CH[7].TEP
#define CH8_EEP CH[8].EEP
#define CH8_TEP CH[8].TEP
#define CH9_EEP CH[9].EEP
#define CH9_TEP CH[9].TEP
#define CH10_EEP CH[10].EEP
#define CH10_TEP CH[10].TEP
#define CH11_EEP CH[11].EEP
#define CH11_TEP CH[11].TEP
#define CH12_EEP CH[12].EEP
#define CH12_TEP CH[12].TEP
#define CH13_EEP CH[13].EEP
#define CH13_TEP CH[13].TEP
#define CH14_EEP CH[14].EEP
#define CH14_TEP CH[14].TEP
#define CH15_EEP CH[15].EEP
#define CH15_TEP CH[15].TEP
/* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */
#define CHG0 CHG[0]
#define CHG1 CHG[1]
#define CHG2 CHG[2]
#define CHG3 CHG[3]
/* All bitfield macros for the CHGx registers therefore changed name. */
#define PPI_CHG0_CH15_Pos PPI_CHG_CH15_Pos
#define PPI_CHG0_CH15_Msk PPI_CHG_CH15_Msk
#define PPI_CHG0_CH15_Excluded PPI_CHG_CH15_Excluded
#define PPI_CHG0_CH15_Included PPI_CHG_CH15_Included
#define PPI_CHG0_CH14_Pos PPI_CHG_CH14_Pos
#define PPI_CHG0_CH14_Msk PPI_CHG_CH14_Msk
#define PPI_CHG0_CH14_Excluded PPI_CHG_CH14_Excluded
#define PPI_CHG0_CH14_Included PPI_CHG_CH14_Included
#define PPI_CHG0_CH13_Pos PPI_CHG_CH13_Pos
#define PPI_CHG0_CH13_Msk PPI_CHG_CH13_Msk
#define PPI_CHG0_CH13_Excluded PPI_CHG_CH13_Excluded
#define PPI_CHG0_CH13_Included PPI_CHG_CH13_Included
#define PPI_CHG0_CH12_Pos PPI_CHG_CH12_Pos
#define PPI_CHG0_CH12_Msk PPI_CHG_CH12_Msk
#define PPI_CHG0_CH12_Excluded PPI_CHG_CH12_Excluded
#define PPI_CHG0_CH12_Included PPI_CHG_CH12_Included
#define PPI_CHG0_CH11_Pos PPI_CHG_CH11_Pos
#define PPI_CHG0_CH11_Msk PPI_CHG_CH11_Msk
#define PPI_CHG0_CH11_Excluded PPI_CHG_CH11_Excluded
#define PPI_CHG0_CH11_Included PPI_CHG_CH11_Included
#define PPI_CHG0_CH10_Pos PPI_CHG_CH10_Pos
#define PPI_CHG0_CH10_Msk PPI_CHG_CH10_Msk
#define PPI_CHG0_CH10_Excluded PPI_CHG_CH10_Excluded
#define PPI_CHG0_CH10_Included PPI_CHG_CH10_Included
#define PPI_CHG0_CH9_Pos PPI_CHG_CH9_Pos
#define PPI_CHG0_CH9_Msk PPI_CHG_CH9_Msk
#define PPI_CHG0_CH9_Excluded PPI_CHG_CH9_Excluded
#define PPI_CHG0_CH9_Included PPI_CHG_CH9_Included
#define PPI_CHG0_CH8_Pos PPI_CHG_CH8_Pos
#define PPI_CHG0_CH8_Msk PPI_CHG_CH8_Msk
#define PPI_CHG0_CH8_Excluded PPI_CHG_CH8_Excluded
#define PPI_CHG0_CH8_Included PPI_CHG_CH8_Included
#define PPI_CHG0_CH7_Pos PPI_CHG_CH7_Pos
#define PPI_CHG0_CH7_Msk PPI_CHG_CH7_Msk
#define PPI_CHG0_CH7_Excluded PPI_CHG_CH7_Excluded
#define PPI_CHG0_CH7_Included PPI_CHG_CH7_Included
#define PPI_CHG0_CH6_Pos PPI_CHG_CH6_Pos
#define PPI_CHG0_CH6_Msk PPI_CHG_CH6_Msk
#define PPI_CHG0_CH6_Excluded PPI_CHG_CH6_Excluded
#define PPI_CHG0_CH6_Included PPI_CHG_CH6_Included
#define PPI_CHG0_CH5_Pos PPI_CHG_CH5_Pos
#define PPI_CHG0_CH5_Msk PPI_CHG_CH5_Msk
#define PPI_CHG0_CH5_Excluded PPI_CHG_CH5_Excluded
#define PPI_CHG0_CH5_Included PPI_CHG_CH5_Included
#define PPI_CHG0_CH4_Pos PPI_CHG_CH4_Pos
#define PPI_CHG0_CH4_Msk PPI_CHG_CH4_Msk
#define PPI_CHG0_CH4_Excluded PPI_CHG_CH4_Excluded
#define PPI_CHG0_CH4_Included PPI_CHG_CH4_Included
#define PPI_CHG0_CH3_Pos PPI_CHG_CH3_Pos
#define PPI_CHG0_CH3_Msk PPI_CHG_CH3_Msk
#define PPI_CHG0_CH3_Excluded PPI_CHG_CH3_Excluded
#define PPI_CHG0_CH3_Included PPI_CHG_CH3_Included
#define PPI_CHG0_CH2_Pos PPI_CHG_CH2_Pos
#define PPI_CHG0_CH2_Msk PPI_CHG_CH2_Msk
#define PPI_CHG0_CH2_Excluded PPI_CHG_CH2_Excluded
#define PPI_CHG0_CH2_Included PPI_CHG_CH2_Included
#define PPI_CHG0_CH1_Pos PPI_CHG_CH1_Pos
#define PPI_CHG0_CH1_Msk PPI_CHG_CH1_Msk
#define PPI_CHG0_CH1_Excluded PPI_CHG_CH1_Excluded
#define PPI_CHG0_CH1_Included PPI_CHG_CH1_Included
#define PPI_CHG0_CH0_Pos PPI_CHG_CH0_Pos
#define PPI_CHG0_CH0_Msk PPI_CHG_CH0_Msk
#define PPI_CHG0_CH0_Excluded PPI_CHG_CH0_Excluded
#define PPI_CHG0_CH0_Included PPI_CHG_CH0_Included
#define PPI_CHG1_CH15_Pos PPI_CHG_CH15_Pos
#define PPI_CHG1_CH15_Msk PPI_CHG_CH15_Msk
#define PPI_CHG1_CH15_Excluded PPI_CHG_CH15_Excluded
#define PPI_CHG1_CH15_Included PPI_CHG_CH15_Included
#define PPI_CHG1_CH14_Pos PPI_CHG_CH14_Pos
#define PPI_CHG1_CH14_Msk PPI_CHG_CH14_Msk
#define PPI_CHG1_CH14_Excluded PPI_CHG_CH14_Excluded
#define PPI_CHG1_CH14_Included PPI_CHG_CH14_Included
#define PPI_CHG1_CH13_Pos PPI_CHG_CH13_Pos
#define PPI_CHG1_CH13_Msk PPI_CHG_CH13_Msk
#define PPI_CHG1_CH13_Excluded PPI_CHG_CH13_Excluded
#define PPI_CHG1_CH13_Included PPI_CHG_CH13_Included
#define PPI_CHG1_CH12_Pos PPI_CHG_CH12_Pos
#define PPI_CHG1_CH12_Msk PPI_CHG_CH12_Msk
#define PPI_CHG1_CH12_Excluded PPI_CHG_CH12_Excluded
#define PPI_CHG1_CH12_Included PPI_CHG_CH12_Included
#define PPI_CHG1_CH11_Pos PPI_CHG_CH11_Pos
#define PPI_CHG1_CH11_Msk PPI_CHG_CH11_Msk
#define PPI_CHG1_CH11_Excluded PPI_CHG_CH11_Excluded
#define PPI_CHG1_CH11_Included PPI_CHG_CH11_Included
#define PPI_CHG1_CH10_Pos PPI_CHG_CH10_Pos
#define PPI_CHG1_CH10_Msk PPI_CHG_CH10_Msk
#define PPI_CHG1_CH10_Excluded PPI_CHG_CH10_Excluded
#define PPI_CHG1_CH10_Included PPI_CHG_CH10_Included
#define PPI_CHG1_CH9_Pos PPI_CHG_CH9_Pos
#define PPI_CHG1_CH9_Msk PPI_CHG_CH9_Msk
#define PPI_CHG1_CH9_Excluded PPI_CHG_CH9_Excluded
#define PPI_CHG1_CH9_Included PPI_CHG_CH9_Included
#define PPI_CHG1_CH8_Pos PPI_CHG_CH8_Pos
#define PPI_CHG1_CH8_Msk PPI_CHG_CH8_Msk
#define PPI_CHG1_CH8_Excluded PPI_CHG_CH8_Excluded
#define PPI_CHG1_CH8_Included PPI_CHG_CH8_Included
#define PPI_CHG1_CH7_Pos PPI_CHG_CH7_Pos
#define PPI_CHG1_CH7_Msk PPI_CHG_CH7_Msk
#define PPI_CHG1_CH7_Excluded PPI_CHG_CH7_Excluded
#define PPI_CHG1_CH7_Included PPI_CHG_CH7_Included
#define PPI_CHG1_CH6_Pos PPI_CHG_CH6_Pos
#define PPI_CHG1_CH6_Msk PPI_CHG_CH6_Msk
#define PPI_CHG1_CH6_Excluded PPI_CHG_CH6_Excluded
#define PPI_CHG1_CH6_Included PPI_CHG_CH6_Included
#define PPI_CHG1_CH5_Pos PPI_CHG_CH5_Pos
#define PPI_CHG1_CH5_Msk PPI_CHG_CH5_Msk
#define PPI_CHG1_CH5_Excluded PPI_CHG_CH5_Excluded
#define PPI_CHG1_CH5_Included PPI_CHG_CH5_Included
#define PPI_CHG1_CH4_Pos PPI_CHG_CH4_Pos
#define PPI_CHG1_CH4_Msk PPI_CHG_CH4_Msk
#define PPI_CHG1_CH4_Excluded PPI_CHG_CH4_Excluded
#define PPI_CHG1_CH4_Included PPI_CHG_CH4_Included
#define PPI_CHG1_CH3_Pos PPI_CHG_CH3_Pos
#define PPI_CHG1_CH3_Msk PPI_CHG_CH3_Msk
#define PPI_CHG1_CH3_Excluded PPI_CHG_CH3_Excluded
#define PPI_CHG1_CH3_Included PPI_CHG_CH3_Included
#define PPI_CHG1_CH2_Pos PPI_CHG_CH2_Pos
#define PPI_CHG1_CH2_Msk PPI_CHG_CH2_Msk
#define PPI_CHG1_CH2_Excluded PPI_CHG_CH2_Excluded
#define PPI_CHG1_CH2_Included PPI_CHG_CH2_Included
#define PPI_CHG1_CH1_Pos PPI_CHG_CH1_Pos
#define PPI_CHG1_CH1_Msk PPI_CHG_CH1_Msk
#define PPI_CHG1_CH1_Excluded PPI_CHG_CH1_Excluded
#define PPI_CHG1_CH1_Included PPI_CHG_CH1_Included
#define PPI_CHG1_CH0_Pos PPI_CHG_CH0_Pos
#define PPI_CHG1_CH0_Msk PPI_CHG_CH0_Msk
#define PPI_CHG1_CH0_Excluded PPI_CHG_CH0_Excluded
#define PPI_CHG1_CH0_Included PPI_CHG_CH0_Included
#define PPI_CHG2_CH15_Pos PPI_CHG_CH15_Pos
#define PPI_CHG2_CH15_Msk PPI_CHG_CH15_Msk
#define PPI_CHG2_CH15_Excluded PPI_CHG_CH15_Excluded
#define PPI_CHG2_CH15_Included PPI_CHG_CH15_Included
#define PPI_CHG2_CH14_Pos PPI_CHG_CH14_Pos
#define PPI_CHG2_CH14_Msk PPI_CHG_CH14_Msk
#define PPI_CHG2_CH14_Excluded PPI_CHG_CH14_Excluded
#define PPI_CHG2_CH14_Included PPI_CHG_CH14_Included
#define PPI_CHG2_CH13_Pos PPI_CHG_CH13_Pos
#define PPI_CHG2_CH13_Msk PPI_CHG_CH13_Msk
#define PPI_CHG2_CH13_Excluded PPI_CHG_CH13_Excluded
#define PPI_CHG2_CH13_Included PPI_CHG_CH13_Included
#define PPI_CHG2_CH12_Pos PPI_CHG_CH12_Pos
#define PPI_CHG2_CH12_Msk PPI_CHG_CH12_Msk
#define PPI_CHG2_CH12_Excluded PPI_CHG_CH12_Excluded
#define PPI_CHG2_CH12_Included PPI_CHG_CH12_Included
#define PPI_CHG2_CH11_Pos PPI_CHG_CH11_Pos
#define PPI_CHG2_CH11_Msk PPI_CHG_CH11_Msk
#define PPI_CHG2_CH11_Excluded PPI_CHG_CH11_Excluded
#define PPI_CHG2_CH11_Included PPI_CHG_CH11_Included
#define PPI_CHG2_CH10_Pos PPI_CHG_CH10_Pos
#define PPI_CHG2_CH10_Msk PPI_CHG_CH10_Msk
#define PPI_CHG2_CH10_Excluded PPI_CHG_CH10_Excluded
#define PPI_CHG2_CH10_Included PPI_CHG_CH10_Included
#define PPI_CHG2_CH9_Pos PPI_CHG_CH9_Pos
#define PPI_CHG2_CH9_Msk PPI_CHG_CH9_Msk
#define PPI_CHG2_CH9_Excluded PPI_CHG_CH9_Excluded
#define PPI_CHG2_CH9_Included PPI_CHG_CH9_Included
#define PPI_CHG2_CH8_Pos PPI_CHG_CH8_Pos
#define PPI_CHG2_CH8_Msk PPI_CHG_CH8_Msk
#define PPI_CHG2_CH8_Excluded PPI_CHG_CH8_Excluded
#define PPI_CHG2_CH8_Included PPI_CHG_CH8_Included
#define PPI_CHG2_CH7_Pos PPI_CHG_CH7_Pos
#define PPI_CHG2_CH7_Msk PPI_CHG_CH7_Msk
#define PPI_CHG2_CH7_Excluded PPI_CHG_CH7_Excluded
#define PPI_CHG2_CH7_Included PPI_CHG_CH7_Included
#define PPI_CHG2_CH6_Pos PPI_CHG_CH6_Pos
#define PPI_CHG2_CH6_Msk PPI_CHG_CH6_Msk
#define PPI_CHG2_CH6_Excluded PPI_CHG_CH6_Excluded
#define PPI_CHG2_CH6_Included PPI_CHG_CH6_Included
#define PPI_CHG2_CH5_Pos PPI_CHG_CH5_Pos
#define PPI_CHG2_CH5_Msk PPI_CHG_CH5_Msk
#define PPI_CHG2_CH5_Excluded PPI_CHG_CH5_Excluded
#define PPI_CHG2_CH5_Included PPI_CHG_CH5_Included
#define PPI_CHG2_CH4_Pos PPI_CHG_CH4_Pos
#define PPI_CHG2_CH4_Msk PPI_CHG_CH4_Msk
#define PPI_CHG2_CH4_Excluded PPI_CHG_CH4_Excluded
#define PPI_CHG2_CH4_Included PPI_CHG_CH4_Included
#define PPI_CHG2_CH3_Pos PPI_CHG_CH3_Pos
#define PPI_CHG2_CH3_Msk PPI_CHG_CH3_Msk
#define PPI_CHG2_CH3_Excluded PPI_CHG_CH3_Excluded
#define PPI_CHG2_CH3_Included PPI_CHG_CH3_Included
#define PPI_CHG2_CH2_Pos PPI_CHG_CH2_Pos
#define PPI_CHG2_CH2_Msk PPI_CHG_CH2_Msk
#define PPI_CHG2_CH2_Excluded PPI_CHG_CH2_Excluded
#define PPI_CHG2_CH2_Included PPI_CHG_CH2_Included
#define PPI_CHG2_CH1_Pos PPI_CHG_CH1_Pos
#define PPI_CHG2_CH1_Msk PPI_CHG_CH1_Msk
#define PPI_CHG2_CH1_Excluded PPI_CHG_CH1_Excluded
#define PPI_CHG2_CH1_Included PPI_CHG_CH1_Included
#define PPI_CHG2_CH0_Pos PPI_CHG_CH0_Pos
#define PPI_CHG2_CH0_Msk PPI_CHG_CH0_Msk
#define PPI_CHG2_CH0_Excluded PPI_CHG_CH0_Excluded
#define PPI_CHG2_CH0_Included PPI_CHG_CH0_Included
#define PPI_CHG3_CH15_Pos PPI_CHG_CH15_Pos
#define PPI_CHG3_CH15_Msk PPI_CHG_CH15_Msk
#define PPI_CHG3_CH15_Excluded PPI_CHG_CH15_Excluded
#define PPI_CHG3_CH15_Included PPI_CHG_CH15_Included
#define PPI_CHG3_CH14_Pos PPI_CHG_CH14_Pos
#define PPI_CHG3_CH14_Msk PPI_CHG_CH14_Msk
#define PPI_CHG3_CH14_Excluded PPI_CHG_CH14_Excluded
#define PPI_CHG3_CH14_Included PPI_CHG_CH14_Included
#define PPI_CHG3_CH13_Pos PPI_CHG_CH13_Pos
#define PPI_CHG3_CH13_Msk PPI_CHG_CH13_Msk
#define PPI_CHG3_CH13_Excluded PPI_CHG_CH13_Excluded
#define PPI_CHG3_CH13_Included PPI_CHG_CH13_Included
#define PPI_CHG3_CH12_Pos PPI_CHG_CH12_Pos
#define PPI_CHG3_CH12_Msk PPI_CHG_CH12_Msk
#define PPI_CHG3_CH12_Excluded PPI_CHG_CH12_Excluded
#define PPI_CHG3_CH12_Included PPI_CHG_CH12_Included
#define PPI_CHG3_CH11_Pos PPI_CHG_CH11_Pos
#define PPI_CHG3_CH11_Msk PPI_CHG_CH11_Msk
#define PPI_CHG3_CH11_Excluded PPI_CHG_CH11_Excluded
#define PPI_CHG3_CH11_Included PPI_CHG_CH11_Included
#define PPI_CHG3_CH10_Pos PPI_CHG_CH10_Pos
#define PPI_CHG3_CH10_Msk PPI_CHG_CH10_Msk
#define PPI_CHG3_CH10_Excluded PPI_CHG_CH10_Excluded
#define PPI_CHG3_CH10_Included PPI_CHG_CH10_Included
#define PPI_CHG3_CH9_Pos PPI_CHG_CH9_Pos
#define PPI_CHG3_CH9_Msk PPI_CHG_CH9_Msk
#define PPI_CHG3_CH9_Excluded PPI_CHG_CH9_Excluded
#define PPI_CHG3_CH9_Included PPI_CHG_CH9_Included
#define PPI_CHG3_CH8_Pos PPI_CHG_CH8_Pos
#define PPI_CHG3_CH8_Msk PPI_CHG_CH8_Msk
#define PPI_CHG3_CH8_Excluded PPI_CHG_CH8_Excluded
#define PPI_CHG3_CH8_Included PPI_CHG_CH8_Included
#define PPI_CHG3_CH7_Pos PPI_CHG_CH7_Pos
#define PPI_CHG3_CH7_Msk PPI_CHG_CH7_Msk
#define PPI_CHG3_CH7_Excluded PPI_CHG_CH7_Excluded
#define PPI_CHG3_CH7_Included PPI_CHG_CH7_Included
#define PPI_CHG3_CH6_Pos PPI_CHG_CH6_Pos
#define PPI_CHG3_CH6_Msk PPI_CHG_CH6_Msk
#define PPI_CHG3_CH6_Excluded PPI_CHG_CH6_Excluded
#define PPI_CHG3_CH6_Included PPI_CHG_CH6_Included
#define PPI_CHG3_CH5_Pos PPI_CHG_CH5_Pos
#define PPI_CHG3_CH5_Msk PPI_CHG_CH5_Msk
#define PPI_CHG3_CH5_Excluded PPI_CHG_CH5_Excluded
#define PPI_CHG3_CH5_Included PPI_CHG_CH5_Included
#define PPI_CHG3_CH4_Pos PPI_CHG_CH4_Pos
#define PPI_CHG3_CH4_Msk PPI_CHG_CH4_Msk
#define PPI_CHG3_CH4_Excluded PPI_CHG_CH4_Excluded
#define PPI_CHG3_CH4_Included PPI_CHG_CH4_Included
#define PPI_CHG3_CH3_Pos PPI_CHG_CH3_Pos
#define PPI_CHG3_CH3_Msk PPI_CHG_CH3_Msk
#define PPI_CHG3_CH3_Excluded PPI_CHG_CH3_Excluded
#define PPI_CHG3_CH3_Included PPI_CHG_CH3_Included
#define PPI_CHG3_CH2_Pos PPI_CHG_CH2_Pos
#define PPI_CHG3_CH2_Msk PPI_CHG_CH2_Msk
#define PPI_CHG3_CH2_Excluded PPI_CHG_CH2_Excluded
#define PPI_CHG3_CH2_Included PPI_CHG_CH2_Included
#define PPI_CHG3_CH1_Pos PPI_CHG_CH1_Pos
#define PPI_CHG3_CH1_Msk PPI_CHG_CH1_Msk
#define PPI_CHG3_CH1_Excluded PPI_CHG_CH1_Excluded
#define PPI_CHG3_CH1_Included PPI_CHG_CH1_Included
#define PPI_CHG3_CH0_Pos PPI_CHG_CH0_Pos
#define PPI_CHG3_CH0_Msk PPI_CHG_CH0_Msk
#define PPI_CHG3_CH0_Excluded PPI_CHG_CH0_Excluded
#define PPI_CHG3_CH0_Included PPI_CHG_CH0_Included
/*lint --flb "Leave library region" */
#endif /* NRF51_DEPRECATED_H */

74
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/nrf_delay.h
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@ -1,74 +0,0 @@
#ifndef _NRF_DELAY_H
#define _NRF_DELAY_H
// #include "nrf.h"
/*lint --e{438, 522} "Variable not used" "Function lacks side-effects" */
#if defined ( __CC_ARM )
static __ASM void __INLINE nrf_delay_us(uint32_t volatile number_of_us)
{
loop
SUBS R0, R0, #1
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
BNE loop
BX LR
}
#elif defined ( __ICCARM__ )
static void __INLINE nrf_delay_us(uint32_t volatile number_of_us)
{
__ASM (
"loop:\n\t"
" SUBS R0, R0, #1\n\t"
" NOP\n\t"
" NOP\n\t"
" NOP\n\t"
" NOP\n\t"
" NOP\n\t"
" NOP\n\t"
" NOP\n\t"
" NOP\n\t"
" NOP\n\t"
" NOP\n\t"
" NOP\n\t"
" NOP\n\t"
" BNE loop\n\t");
}
#elif defined ( __GNUC__ )
static __INLINE void nrf_delay_us(uint32_t volatile number_of_us)
{
do
{
__ASM volatile (
"NOP\n\t"
"NOP\n\t"
"NOP\n\t"
"NOP\n\t"
"NOP\n\t"
"NOP\n\t"
"NOP\n\t"
"NOP\n\t"
"NOP\n\t"
"NOP\n\t"
"NOP\n\t"
"NOP\n\t"
"NOP\n\t"
"NOP\n\t"
);
} while (--number_of_us);
}
#endif
void nrf_delay_ms(uint32_t volatile number_of_ms);
#endif

187
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/system_nrf51.c
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/* Copyright (c) 2013, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* * Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/* NOTE: Template files (including this one) are application specific and therefore expected to
be copied into the application project folder prior to its use! */
#include <stdint.h>
#include <stdbool.h>
#include "nrf.h"
#include "nrf_delay.h"
#include "system_nrf51.h"
/*lint ++flb "Enter library region" */
#define __SYSTEM_CLOCK (16000000UL) /*!< nRF51 devices use a fixed System Clock Frequency of 16MHz */
static bool is_manual_peripheral_setup_needed(void);
static bool is_disabled_in_debug_needed(void);
static void init_clock(void);
#if defined ( __CC_ARM )
uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;
#elif defined ( __ICCARM__ )
__root uint32_t SystemCoreClock = __SYSTEM_CLOCK;
#elif defined ( __GNUC__ )
uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;
#endif
void SystemCoreClockUpdate(void)
{
SystemCoreClock = __SYSTEM_CLOCK;
}
void SystemInit(void)
{
#if defined(TARGET_NRF_32MHZ_XTAL)
/* For 32MHz HFCLK XTAL such as Taiyo Yuden
Physically, tiny footprint XTAL oscillate higher freq. To make BLE modules smaller, some modules
are using 32MHz XTAL.
This code wriging the value 0xFFFFFF00 to the UICR (User Information Configuration Register)
at address 0x10001008, to make nRF51 works with 32MHz system clock. This register will be overwritten
by SoftDevice to 0xFFFFFFFF, the default value. Each hex files built with mbed classic online compiler
contain SoftDevice, so that, this code run once just after the hex file will be flashed onto nRF51.
After changing the value, nRF51 need to reboot. */
if (*(uint32_t *)0x10001008 == 0xFFFFFFFF)
{
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
*(uint32_t *)0x10001008 = 0xFFFFFF00;
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NVIC_SystemReset();
while (true){}
}
#endif
/* If desired, switch off the unused RAM to lower consumption by the use of RAMON register.
It can also be done in the application main() function. */
/* Prepare the peripherals for use as indicated by the PAN 26 "System: Manual setup is required
to enable the use of peripherals" found at Product Anomaly document for your device found at
https://www.nordicsemi.com/. The side effect of executing these instructions in the devices
that do not need it is that the new peripherals in the second generation devices (LPCOMP for
example) will not be available. */
if (is_manual_peripheral_setup_needed())
{
*(uint32_t volatile *)0x40000504 = 0xC007FFDF;
*(uint32_t volatile *)0x40006C18 = 0x00008000;
}
/* Disable PROTENSET registers under debug, as indicated by PAN 59 "MPU: Reset value of DISABLEINDEBUG
register is incorrect" found at Product Anomaly document four your device found at
https://www.nordicsemi.com/. There is no side effect of using these instruction if not needed. */
if (is_disabled_in_debug_needed())
{
NRF_MPU->DISABLEINDEBUG = MPU_DISABLEINDEBUG_DISABLEINDEBUG_Disabled << MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos;
}
// Start the external 32khz crystal oscillator.
init_clock();
}
void init_clock(void)
{
/* For compatibility purpose, the default behaviour is to first attempt to initialise an
external clock, and after a timeout, use the internal RC one. To avoid this wait, boards that
don't have an external oscillator can set TARGET_NRF_LFCLK_RC directly. */
uint32_t i = 0;
const uint32_t polling_period = 200;
const uint32_t timeout = 1000000;
#if defined(TARGET_NRF_LFCLK_RC)
NRF_CLOCK->LFCLKSRC = (CLOCK_LFCLKSRC_SRC_RC << CLOCK_LFCLKSRC_SRC_Pos);
#else
NRF_CLOCK->LFCLKSRC = (CLOCK_LFCLKSRC_SRC_Xtal << CLOCK_LFCLKSRC_SRC_Pos);
#endif
NRF_CLOCK->EVENTS_LFCLKSTARTED = 0;
NRF_CLOCK->TASKS_LFCLKSTART = 1;
/* Wait for the external oscillator to start up.
nRF51822 product specification (8.1.5) gives a typical value of 300ms for external clock
startup duration, and a maximum value of 1s. When using the internal RC source, typical delay
will be 390µs, so we use a polling period of 200µs.
We can't use us_ticker at this point, so we have to rely on a less precise method for
measuring our timeout. Because of this, the actual timeout will be slightly longer than 1
second, which isn't an issue at all, since this fallback should only be used as a safety net.
*/
for (i = 0; i < (timeout / polling_period); i++) {
if (NRF_CLOCK->EVENTS_LFCLKSTARTED != 0)
return;
nrf_delay_us(polling_period);
}
/* Fallback to internal clock. Belt and braces, since the internal clock is used by default
whilst no external source is running. This is not only a sanity check, but it also allows
code down the road (e.g. ble initialisation) to directly know which clock is used. */
NRF_CLOCK->LFCLKSRC = (CLOCK_LFCLKSRC_SRC_RC << CLOCK_LFCLKSRC_SRC_Pos);
NRF_CLOCK->TASKS_LFCLKSTART = 1;
while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0) {
// Do nothing.
}
}
static bool is_manual_peripheral_setup_needed(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x00) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
{
return true;
}
if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x10) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
{
return true;
}
if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
{
return true;
}
}
return false;
}
static bool is_disabled_in_debug_needed(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
{
return true;
}
}
return false;
}
/*lint --flb "Leave library region" */

68
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/system_nrf51.h
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/* Copyright (c) 2013, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* * Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef SYSTEM_NRF51_H
#define SYSTEM_NRF51_H
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system.
* Initialize the System and update the SystemCoreClock variable.
*/
extern void SystemInit (void);
/**
* Update SystemCoreClock variable
*
* @param none
* @return none
*
* @brief Updates the SystemCoreClock with current core Clock
* retrieved from cpu registers.
*/
extern void SystemCoreClockUpdate (void);
#ifdef __cplusplus
}
#endif
#endif /* SYSTEM_NRF51_H */

58
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/gpio_api.c
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/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "mbed_assert.h"
#include "gpio_api.h"
#include "pinmap.h"
void gpio_init(gpio_t *obj, PinName pin)
{
obj->pin = pin;
if (pin == (PinName)NC) {
return;
}
obj->mask = (1ul << pin);
obj->reg_set = &NRF_GPIO->OUTSET;
obj->reg_clr = &NRF_GPIO->OUTCLR;
obj->reg_in = &NRF_GPIO->IN;
obj->reg_dir = &NRF_GPIO->DIR;
}
void gpio_mode(gpio_t *obj, PinMode mode)
{
pin_mode(obj->pin, mode);
}
void gpio_dir(gpio_t *obj, PinDirection direction)
{
MBED_ASSERT(obj->pin != (PinName)NC);
switch (direction) {
case PIN_INPUT:
NRF_GPIO->PIN_CNF[obj->pin] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
| (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
break;
case PIN_OUTPUT:
NRF_GPIO->PIN_CNF[obj->pin] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
| (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
| (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
break;
}
}

127
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/gpio_irq_api.c
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/* mbed Microcontroller Library
* Copyright (c) 2013 Nordic Semiconductor
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <stddef.h>
#include "cmsis.h"
#include "gpio_irq_api.h"
#include "mbed_error.h"
#define CHANNEL_NUM 31
static uint32_t channel_ids[CHANNEL_NUM] = {0}; //each pin will be given an id, if id is 0 the pin can be ignored.
static uint8_t channel_enabled[CHANNEL_NUM] = {0};
static uint32_t portRISE = 0;
static uint32_t portFALL = 0;
static gpio_irq_handler irq_handler;
#ifdef __cplusplus
extern "C" {
#endif
void GPIOTE_IRQHandler(void)
{
volatile uint32_t newVal = NRF_GPIO->IN;
if ((NRF_GPIOTE->EVENTS_PORT != 0) && ((NRF_GPIOTE->INTENSET & GPIOTE_INTENSET_PORT_Msk) != 0)) {
NRF_GPIOTE->EVENTS_PORT = 0;
for (uint8_t i = 0; i<31; i++) {
if (channel_ids[i]>0) {
if (channel_enabled[i]) {
if( ((newVal>>i)&1) && ( ( (NRF_GPIO->PIN_CNF[i] >>GPIO_PIN_CNF_SENSE_Pos) & GPIO_PIN_CNF_SENSE_Low) != GPIO_PIN_CNF_SENSE_Low) && ( (portRISE>>i)&1) ){
irq_handler(channel_ids[i], IRQ_RISE);
} else if ((((newVal >> i) & 1) == 0) &&
(((NRF_GPIO->PIN_CNF[i] >> GPIO_PIN_CNF_SENSE_Pos) & GPIO_PIN_CNF_SENSE_Low) == GPIO_PIN_CNF_SENSE_Low) &&
((portFALL >> i) & 1)) {
irq_handler(channel_ids[i], IRQ_FALL);
}
}
if (NRF_GPIO->PIN_CNF[i] & GPIO_PIN_CNF_SENSE_Msk) {
NRF_GPIO->PIN_CNF[i] &= ~(GPIO_PIN_CNF_SENSE_Msk);
if (newVal >> i & 1) {
NRF_GPIO->PIN_CNF[i] |= (GPIO_PIN_CNF_SENSE_Low << GPIO_PIN_CNF_SENSE_Pos);
} else {
NRF_GPIO->PIN_CNF[i] |= (GPIO_PIN_CNF_SENSE_High << GPIO_PIN_CNF_SENSE_Pos);
}
}
}
}
}
}
#ifdef __cplusplus
}
#endif
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
{
if (pin == NC) {
return -1;
}
irq_handler = handler;
obj->ch = pin;
NRF_GPIOTE->EVENTS_PORT = 0;
channel_ids[pin] = id;
channel_enabled[pin] = 1;
NRF_GPIOTE->INTENSET = GPIOTE_INTENSET_PORT_Set << GPIOTE_INTENSET_PORT_Pos;
NVIC_SetPriority(GPIOTE_IRQn, 3);
NVIC_EnableIRQ (GPIOTE_IRQn);
return 0;
}
void gpio_irq_free(gpio_irq_t *obj)
{
channel_ids[obj->ch] = 0;
}
void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
{
NRF_GPIO->PIN_CNF[obj->ch] &= ~(GPIO_PIN_CNF_SENSE_Msk);
if (enable) {
if (event == IRQ_RISE) {
portRISE |= (1 << obj->ch);
} else if (event == IRQ_FALL) {
portFALL |= (1 << obj->ch);
}
} else {
if (event == IRQ_RISE) {
portRISE &= ~(1 << obj->ch);
} else if (event == IRQ_FALL) {
portFALL &= ~(1 << obj->ch);
}
}
if (((portRISE >> obj->ch) & 1) || ((portFALL >> obj->ch) & 1)) {
if ((NRF_GPIO->IN >> obj->ch) & 1) {
NRF_GPIO->PIN_CNF[obj->ch] |= (GPIO_PIN_CNF_SENSE_Low << GPIO_PIN_CNF_SENSE_Pos); // | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos);
} else {
NRF_GPIO->PIN_CNF[obj->ch] |= (GPIO_PIN_CNF_SENSE_High << GPIO_PIN_CNF_SENSE_Pos); //| (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos);
}
}
}
void gpio_irq_enable(gpio_irq_t *obj)
{
channel_enabled[obj->ch] = 1;
}
void gpio_irq_disable(gpio_irq_t *obj)
{
channel_enabled[obj->ch] = 0;
}

56
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/gpio_object.h
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/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_GPIO_OBJECT_H
#define MBED_GPIO_OBJECT_H
#include "mbed_assert.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef struct {
PinName pin;
uint32_t mask;
__IO uint32_t *reg_dir;
__IO uint32_t *reg_set;
__IO uint32_t *reg_clr;
__I uint32_t *reg_in;
} gpio_t;
static inline void gpio_write(gpio_t *obj, int value) {
MBED_ASSERT(obj->pin != (PinName)NC);
if (value)
*obj->reg_set = obj->mask;
else
*obj->reg_clr = obj->mask;
}
static inline int gpio_read(gpio_t *obj) {
MBED_ASSERT(obj->pin != (PinName)NC);
return ((*obj->reg_in & obj->mask) ? 1 : 0);
}
static inline int gpio_is_connected(const gpio_t *obj) {
return obj->pin != (PinName)NC;
}
#ifdef __cplusplus
}
#endif
#endif

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targets/TARGET_NORDIC/TARGET_MCU_NRF51822/i2c_api.c
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/* mbed Microcontroller Library
* Copyright (c) 2013 Nordic Semiconductor
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "mbed_assert.h"
#include "i2c_api.h"
#if DEVICE_I2C
#include "cmsis.h"
#include "pinmap.h"
#include "twi_master.h"
#include "mbed_error.h"
// nRF51822's I2C_0 and SPI_0 (I2C_1, SPI_1 and SPIS1) share the same address.
// They can't be used at the same time. So we use two global variable to track the usage.
// See nRF51822 address information at nRF51822_PS v2.0.pdf - Table 15 Peripheral instance reference
volatile i2c_spi_peripheral_t i2c0_spi0_peripheral = {0, 0, 0, 0};
volatile i2c_spi_peripheral_t i2c1_spi1_peripheral = {0, 0, 0, 0};
// Pinmap used for testing only
static const PinMap PinMap_I2C_testing[] = {
{P0_0, 0, 0},
{P0_1, 0, 0},
{P0_2, 0, 0},
{P0_3, 0, 0},
{P0_4, 0, 0},
{P0_5, 0, 0},
{P0_6, 0, 0},
{P0_7, 0, 0},
{P0_8, 0, 0},
{P0_9, 0, 0},
{P0_10, 0, 0},
{P0_11, 0, 0},
{P0_12, 0, 0},
{P0_13, 0, 0},
{P0_14, 0, 0},
{P0_15, 0, 0},
{P0_16, 0, 0},
{P0_17, 0, 0},
{P0_18, 0, 0},
{P0_19, 0, 0},
{P0_20, 0, 0},
{P0_21, 0, 0},
{P0_22, 0, 0},
{P0_23, 0, 0},
{P0_24, 0, 0},
{P0_25, 0, 0},
{P0_28, 0, 0},
{P0_29, 0, 0},
{P0_30, 0, 0},
{NC, NC, 0}
};
void i2c_interface_enable(i2c_t *obj)
{
obj->i2c->ENABLE = (TWI_ENABLE_ENABLE_Enabled << TWI_ENABLE_ENABLE_Pos);
}
void twi_master_init(i2c_t *obj, PinName sda, PinName scl, int frequency)
{
NRF_GPIO->PIN_CNF[scl] = ((GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos) |
(GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
(GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
(GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) |
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos));
NRF_GPIO->PIN_CNF[sda] = ((GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos) |
(GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
(GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
(GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) |
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos));
obj->i2c->PSELSCL = scl;
obj->i2c->PSELSDA = sda;
// set default frequency at 100k
i2c_frequency(obj, frequency);
i2c_interface_enable(obj);
}
void i2c_init(i2c_t *obj, PinName sda, PinName scl)
{
NRF_TWI_Type *i2c = NULL;
if (i2c0_spi0_peripheral.usage == I2C_SPI_PERIPHERAL_FOR_I2C &&
i2c0_spi0_peripheral.sda_mosi == (uint8_t)sda &&
i2c0_spi0_peripheral.scl_miso == (uint8_t)scl) {
// The I2C with the same pins is already initialized
i2c = (NRF_TWI_Type *)I2C_0;
obj->peripheral = 0x1;
} else if (i2c1_spi1_peripheral.usage == I2C_SPI_PERIPHERAL_FOR_I2C &&
i2c1_spi1_peripheral.sda_mosi == (uint8_t)sda &&
i2c1_spi1_peripheral.scl_miso == (uint8_t)scl) {
// The I2C with the same pins is already initialized
i2c = (NRF_TWI_Type *)I2C_1;
obj->peripheral = 0x2;
} else if (i2c0_spi0_peripheral.usage == 0) {
i2c0_spi0_peripheral.usage = I2C_SPI_PERIPHERAL_FOR_I2C;
i2c0_spi0_peripheral.sda_mosi = (uint8_t)sda;
i2c0_spi0_peripheral.scl_miso = (uint8_t)scl;
i2c = (NRF_TWI_Type *)I2C_0;
obj->peripheral = 0x1;
} else if (i2c1_spi1_peripheral.usage == 0) {
i2c1_spi1_peripheral.usage = I2C_SPI_PERIPHERAL_FOR_I2C;
i2c1_spi1_peripheral.sda_mosi = (uint8_t)sda;
i2c1_spi1_peripheral.scl_miso = (uint8_t)scl;
i2c = (NRF_TWI_Type *)I2C_1;
obj->peripheral = 0x2;
} else {
// No available peripheral
error("No available I2C");
}
twi_master_init_and_clear(i2c);
obj->i2c = i2c;
obj->scl = scl;
obj->sda = sda;
obj->i2c->EVENTS_ERROR = 0;
obj->i2c->ENABLE = TWI_ENABLE_ENABLE_Disabled << TWI_ENABLE_ENABLE_Pos;
obj->i2c->POWER = 0;
for (int i = 0; i<100; i++) {
}
obj->i2c->POWER = 1;
twi_master_init(obj, sda, scl, 100000);
}
void i2c_reset(i2c_t *obj)
{
obj->i2c->EVENTS_ERROR = 0;
obj->i2c->ENABLE = TWI_ENABLE_ENABLE_Disabled << TWI_ENABLE_ENABLE_Pos;
obj->i2c->POWER = 0;
for (int i = 0; i<100; i++) {
}
obj->i2c->POWER = 1;
twi_master_init(obj, obj->sda, obj->scl, obj->freq);
}
int i2c_start(i2c_t *obj)
{
int status = 0;
i2c_reset(obj);
obj->address_set = 0;
return status;
}
int i2c_stop(i2c_t *obj)
{
int timeOut = 100000;
obj->i2c->EVENTS_STOPPED = 0;
// write the stop bit
obj->i2c->TASKS_STOP = 1;
while (!obj->i2c->EVENTS_STOPPED) {
timeOut--;
if (timeOut<0) {
return 1;
}
}
obj->address_set = 0;
i2c_reset(obj);
return 0;
}
int i2c_do_write(i2c_t *obj, int value)
{
int timeOut = 100000;
obj->i2c->TXD = value;
while (!obj->i2c->EVENTS_TXDSENT) {
timeOut--;
if (timeOut<0) {
return 1;
}
}
obj->i2c->EVENTS_TXDSENT = 0;
return 0;
}
int i2c_do_read(i2c_t *obj, char *data, int last)
{
int timeOut = 100000;
if (last) {
// To trigger stop task when a byte is received,
// must be set before resume task.
obj->i2c->SHORTS = 2;
}
obj->i2c->TASKS_RESUME = 1;
while (!obj->i2c->EVENTS_RXDREADY) {
timeOut--;
if (timeOut<0) {
return 1;
}
}
obj->i2c->EVENTS_RXDREADY = 0;
*data = obj->i2c->RXD;
return 0;
}
void i2c_frequency(i2c_t *obj, int hz)
{
if (hz<250000) {
obj->freq = 100000;
obj->i2c->FREQUENCY = (TWI_FREQUENCY_FREQUENCY_K100 << TWI_FREQUENCY_FREQUENCY_Pos);
} else if (hz<400000) {
obj->freq = 250000;
obj->i2c->FREQUENCY = (TWI_FREQUENCY_FREQUENCY_K250 << TWI_FREQUENCY_FREQUENCY_Pos);
} else {
obj->freq = 400000;
obj->i2c->FREQUENCY = (TWI_FREQUENCY_FREQUENCY_K400 << TWI_FREQUENCY_FREQUENCY_Pos);
}
}
int checkError(i2c_t *obj)
{
if (obj->i2c->EVENTS_ERROR == 1) {
if (obj->i2c->ERRORSRC & TWI_ERRORSRC_ANACK_Msk) {
obj->i2c->EVENTS_ERROR = 0;
obj->i2c->TASKS_STOP = 1;
return I2C_ERROR_BUS_BUSY;
}
obj->i2c->EVENTS_ERROR = 0;
obj->i2c->TASKS_STOP = 1;
return I2C_ERROR_NO_SLAVE;
}
return 0;
}
int i2c_read(i2c_t *obj, int address, char *data, int length, int stop)
{
int status, count, errorResult;
obj->i2c->ADDRESS = (address >> 1);
obj->i2c->SHORTS = 1; // to trigger suspend task when a byte is received
obj->i2c->EVENTS_RXDREADY = 0;
obj->i2c->TASKS_STARTRX = 1;
// Read in all except last byte
for (count = 0; count < (length - 1); count++) {
status = i2c_do_read(obj, &data[count], 0);
if (status) {
errorResult = checkError(obj);
i2c_reset(obj);
if (errorResult<0) {
return errorResult;
}
return count;
}
}
// read in last byte
status = i2c_do_read(obj, &data[length - 1], 1);
if (status) {
i2c_reset(obj);
return length - 1;
}
// If not repeated start, send stop.
if (stop) {
while (!obj->i2c->EVENTS_STOPPED) {
}
obj->i2c->EVENTS_STOPPED = 0;
}
return length;
}
int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop)
{
int status, errorResult;
obj->i2c->ADDRESS = (address >> 1);
obj->i2c->SHORTS = 0;
obj->i2c->TASKS_STARTTX = 1;
for (int i = 0; i<length; i++) {
status = i2c_do_write(obj, data[i]);
if (status) {
i2c_reset(obj);
errorResult = checkError(obj);
if (errorResult<0) {
return errorResult;
}
return i;
}
}
// If not repeated start, send stop.
if (stop) {
if (i2c_stop(obj)) {
return I2C_ERROR_NO_SLAVE;
}
}
return length;
}
int i2c_byte_read(i2c_t *obj, int last)
{
char data;
int status;
status = i2c_do_read(obj, &data, last);
if (status) {
i2c_reset(obj);
}
return data;
}
int i2c_byte_write(i2c_t *obj, int data)
{
int status = 0;
if (!obj->address_set) {
obj->address_set = 1;
obj->i2c->ADDRESS = (data >> 1);
if (data & 1) {
obj->i2c->EVENTS_RXDREADY = 0;
obj->i2c->SHORTS = 1;
obj->i2c->TASKS_STARTRX = 1;
} else {
obj->i2c->SHORTS = 0;
obj->i2c->TASKS_STARTTX = 1;
}
} else {
status = i2c_do_write(obj, data);
if (status) {
i2c_reset(obj);
}
}
return (1 - status);
}
const PinMap *i2c_master_sda_pinmap()
{
return PinMap_I2C_testing;
}
const PinMap *i2c_master_scl_pinmap()
{
return PinMap_I2C_testing;
}
const PinMap *i2c_slave_sda_pinmap()
{
return PinMap_I2C_testing;
}
const PinMap *i2c_slave_scl_pinmap()
{
return PinMap_I2C_testing;
}
#endif // #if DEVICE_I2C

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targets/TARGET_NORDIC/TARGET_MCU_NRF51822/objects.h
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@ -1,86 +0,0 @@
/* mbed Microcontroller Library
* Copyright (c) 2013 Nordic Semiconductor
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_OBJECTS_H
#define MBED_OBJECTS_H
#include "cmsis.h"
#include "PortNames.h"
#include "PeripheralNames.h"
#include "PinNames.h"
#ifdef __cplusplus
extern "C" {
#endif
#define I2C_SPI_PERIPHERAL_FOR_I2C 1
#define I2C_SPI_PERIPHERAL_FOR_SPI 2
typedef struct {
uint8_t usage; // I2C: 1, SPI: 2
uint8_t sda_mosi;
uint8_t scl_miso;
uint8_t sclk;
} i2c_spi_peripheral_t;
struct serial_s {
NRF_UART_Type *uart;
int index;
};
struct spi_s {
NRF_SPI_Type *spi;
NRF_SPIS_Type *spis;
uint8_t peripheral;
};
struct port_s {
__IO uint32_t *reg_cnf;
__IO uint32_t *reg_out;
__I uint32_t *reg_in;
PortName port;
uint32_t mask;
};
struct pwmout_s {
PWMName pwm;
PinName pin;
};
struct i2c_s {
NRF_TWI_Type *i2c;
PinName sda;
PinName scl;
int freq;
uint8_t address_set;
uint8_t peripheral;
};
struct analogin_s {
ADCName adc;
uint8_t adc_pin;
};
struct gpio_irq_s {
uint32_t ch;
};
#include "gpio_object.h"
#ifdef __cplusplus
}
#endif
#endif

32
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/pinmap.c
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@ -1,32 +0,0 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "mbed_assert.h"
#include "pinmap.h"
#include "mbed_error.h"
void pin_function(PinName pin, int function)
{
}
void pin_mode(PinName pin, PinMode mode)
{
MBED_ASSERT(pin != (PinName)NC);
uint32_t pin_number = (uint32_t)pin;
NRF_GPIO->PIN_CNF[pin_number] &= ~GPIO_PIN_CNF_PULL_Msk;
NRF_GPIO->PIN_CNF[pin_number] |= (mode << GPIO_PIN_CNF_PULL_Pos);
}

84
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/port_api.c
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@ -1,84 +0,0 @@
/* mbed Microcontroller Library
* Copyright (c) 2013 Nordic Semiconductor
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "port_api.h"
#include "pinmap.h"
#include "gpio_api.h"
PinName port_pin(PortName port, int pin_n)
{
return (PinName)(pin_n);
}
void port_init(port_t *obj, PortName port, int mask, PinDirection dir)
{
obj->port = port;
obj->mask = mask;
obj->reg_out = &NRF_GPIO->OUT;
obj->reg_in = &NRF_GPIO->IN;
obj->reg_cnf = NRF_GPIO->PIN_CNF;
port_dir(obj, dir);
}
void port_mode(port_t *obj, PinMode mode)
{
uint32_t i;
// The mode is set per pin: reuse pinmap logic
for (i = 0; i<31; i++) {
if (obj->mask & (1 << i)) {
pin_mode(port_pin(obj->port, i), mode);
}
}
}
void port_dir(port_t *obj, PinDirection dir)
{
int i;
switch (dir) {
case PIN_INPUT:
for (i = 0; i<31; i++) {
if (obj->mask & (1 << i)) {
obj->reg_cnf[i] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
| (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
}
}
break;
case PIN_OUTPUT:
for (i = 0; i<31; i++) {
if (obj->mask & (1 << i)) {
obj->reg_cnf[i] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
| (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
| (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
}
}
break;
}
}
void port_write(port_t *obj, int value)
{
*obj->reg_out = value;
}
int port_read(port_t *obj)
{
return (*obj->reg_in);
}

385
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/pwmout_api.c
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/* mbed Microcontroller Library
* Copyright (c) 2013 Nordic Semiconductor
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "mbed_assert.h"
#include "pwmout_api.h"
#include "cmsis.h"
#include "pinmap.h"
#include "mbed_error.h"
#define NO_PWMS 3
#define TIMER_PRECISION 4 //4us ticks
#define TIMER_PRESCALER 6 //4us ticks = 16Mhz/(2**6)
static const PinMap PinMap_PWM[] = {
{P0_0, PWM_1, 1},
{P0_1, PWM_1, 1},
{P0_2, PWM_1, 1},
{P0_3, PWM_1, 1},
{P0_4, PWM_1, 1},
{P0_5, PWM_1, 1},
{P0_6, PWM_1, 1},
{P0_7, PWM_1, 1},
{P0_8, PWM_1, 1},
{P0_9, PWM_1, 1},
{P0_10, PWM_1, 1},
{P0_11, PWM_1, 1},
{P0_12, PWM_1, 1},
{P0_13, PWM_1, 1},
{P0_14, PWM_1, 1},
{P0_15, PWM_1, 1},
{P0_16, PWM_1, 1},
{P0_17, PWM_1, 1},
{P0_18, PWM_1, 1},
{P0_19, PWM_1, 1},
{P0_20, PWM_1, 1},
{P0_21, PWM_1, 1},
{P0_22, PWM_1, 1},
{P0_23, PWM_1, 1},
{P0_24, PWM_1, 1},
{P0_25, PWM_1, 1},
{P0_28, PWM_1, 1},
{P0_29, PWM_1, 1},
{P0_30, PWM_1, 1},
{NC, NC, 0}
};
static NRF_TIMER_Type *Timers[1] = {
NRF_TIMER2
};
uint16_t PERIOD = 20000 / TIMER_PRECISION; //20ms
uint8_t PWM_taken[NO_PWMS] = {0, 0, 0};
uint16_t PULSE_WIDTH[NO_PWMS] = {1, 1, 1}; //set to 1 instead of 0
uint16_t ACTUAL_PULSE[NO_PWMS] = {0, 0, 0};
/** @brief Function for handling timer 2 peripheral interrupts.
*/
#ifdef __cplusplus
extern "C" {
#endif
void TIMER2_IRQHandler(void)
{
NRF_TIMER2->EVENTS_COMPARE[3] = 0;
NRF_TIMER2->CC[3] = PERIOD;
if (PWM_taken[0]) {
NRF_TIMER2->CC[0] = PULSE_WIDTH[0];
}
if (PWM_taken[1]) {
NRF_TIMER2->CC[1] = PULSE_WIDTH[1];
}
if (PWM_taken[2]) {
NRF_TIMER2->CC[2] = PULSE_WIDTH[2];
}
NRF_TIMER2->TASKS_START = 1;
}
#ifdef __cplusplus
}
#endif
/** @brief Function for initializing the Timer peripherals.
*/
void timer_init(uint8_t pwmChoice)
{
NRF_TIMER_Type *timer = Timers[0];
timer->TASKS_STOP = 0;
if (pwmChoice == 0) {
timer->POWER = 0;
timer->POWER = 1;
timer->MODE = TIMER_MODE_MODE_Timer;
timer->BITMODE = TIMER_BITMODE_BITMODE_16Bit << TIMER_BITMODE_BITMODE_Pos;
timer->PRESCALER = TIMER_PRESCALER;
timer->CC[3] = PERIOD;
}
timer->CC[pwmChoice] = PULSE_WIDTH[pwmChoice];
//high priority application interrupt
NVIC_SetPriority(TIMER2_IRQn, 1);
NVIC_EnableIRQ(TIMER2_IRQn);
timer->TASKS_START = 0x01;
}
static void timer_free()
{
NRF_TIMER_Type *timer = Timers[0];
for(uint8_t i = 1; i < NO_PWMS; i++){
if(PWM_taken[i]){
break;
}
if((i == NO_PWMS - 1) && (!PWM_taken[i]))
timer->TASKS_STOP = 0x01;
}
}
/** @brief Function for initializing the GPIO Tasks/Events peripheral.
*/
void gpiote_init(PinName pin, uint8_t channel_number)
{
// Connect GPIO input buffers and configure PWM_OUTPUT_PIN_NUMBER as an output.
NRF_GPIO->PIN_CNF[pin] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
| (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
| (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
NRF_GPIO->OUTCLR = (1UL << pin);
// Configure GPIOTE channel 0 to toggle the PWM pin state
// @note Only one GPIOTE task can be connected to an output pin.
/* Configure channel to Pin31, not connected to the pin, and configure as a tasks that will set it to proper level */
NRF_GPIOTE->CONFIG[channel_number] = (GPIOTE_CONFIG_MODE_Task << GPIOTE_CONFIG_MODE_Pos) |
(31UL << GPIOTE_CONFIG_PSEL_Pos) |
(GPIOTE_CONFIG_POLARITY_HiToLo << GPIOTE_CONFIG_POLARITY_Pos);
/* Three NOPs are required to make sure configuration is written before setting tasks or getting events */
__NOP();
__NOP();
__NOP();
/* Launch the task to take the GPIOTE channel output to the desired level */
NRF_GPIOTE->TASKS_OUT[channel_number] = 1;
/* Finally configure the channel as the caller expects. If OUTINIT works, the channel is configured properly.
If it does not, the channel output inheritance sets the proper level. */
NRF_GPIOTE->CONFIG[channel_number] = (GPIOTE_CONFIG_MODE_Task << GPIOTE_CONFIG_MODE_Pos) |
((uint32_t)pin << GPIOTE_CONFIG_PSEL_Pos) |
((uint32_t)GPIOTE_CONFIG_POLARITY_Toggle << GPIOTE_CONFIG_POLARITY_Pos) |
((uint32_t)GPIOTE_CONFIG_OUTINIT_Low << GPIOTE_CONFIG_OUTINIT_Pos); // ((uint32_t)GPIOTE_CONFIG_OUTINIT_High <<
// GPIOTE_CONFIG_OUTINIT_Pos);//
/* Three NOPs are required to make sure configuration is written before setting tasks or getting events */
__NOP();
__NOP();
__NOP();
}
static void gpiote_free(PinName pin,uint8_t channel_number)
{
NRF_GPIOTE->TASKS_OUT[channel_number] = 0;
NRF_GPIOTE->CONFIG[channel_number] = 0;
NRF_GPIO->PIN_CNF[pin] = (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos);
}
/** @brief Function for initializing the Programmable Peripheral Interconnect peripheral.
*/
static void ppi_init(uint8_t pwm)
{
//using ppi channels 0-7 (only 0-7 are available)
uint8_t channel_number = 2 * pwm;
NRF_TIMER_Type *timer = Timers[0];
// Configure PPI channel 0 to toggle ADVERTISING_LED_PIN_NO on every TIMER1 COMPARE[0] match
NRF_PPI->CH[channel_number].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pwm];
NRF_PPI->CH[channel_number + 1].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[pwm];
NRF_PPI->CH[channel_number].EEP = (uint32_t)&timer->EVENTS_COMPARE[pwm];
NRF_PPI->CH[channel_number + 1].EEP = (uint32_t)&timer->EVENTS_COMPARE[3];
// Enable PPI channels.
NRF_PPI->CHEN |= (1 << channel_number) |
(1 << (channel_number + 1));
}
static void ppi_free(uint8_t pwm)
{
//using ppi channels 0-7 (only 0-7 are available)
uint8_t channel_number = 2*pwm;
// Disable PPI channels.
NRF_PPI->CHEN &= (~(1 << channel_number))
& (~(1 << (channel_number+1)));
}
void setModulation(pwmout_t *obj, uint8_t toggle, uint8_t high)
{
if (high) {
NRF_GPIOTE->CONFIG[obj->pwm] |= ((uint32_t)GPIOTE_CONFIG_OUTINIT_High << GPIOTE_CONFIG_OUTINIT_Pos);
if (toggle) {
NRF_GPIOTE->CONFIG[obj->pwm] |= (GPIOTE_CONFIG_MODE_Task << GPIOTE_CONFIG_MODE_Pos) |
((uint32_t)GPIOTE_CONFIG_POLARITY_Toggle << GPIOTE_CONFIG_POLARITY_Pos);
} else {
NRF_GPIOTE->CONFIG[obj->pwm] &= ~((uint32_t)GPIOTE_CONFIG_POLARITY_Toggle << GPIOTE_CONFIG_POLARITY_Pos);
NRF_GPIOTE->CONFIG[obj->pwm] |= ((uint32_t)GPIOTE_CONFIG_POLARITY_LoToHi << GPIOTE_CONFIG_POLARITY_Pos);
}
} else {
NRF_GPIOTE->CONFIG[obj->pwm] &= ~((uint32_t)GPIOTE_CONFIG_OUTINIT_High << GPIOTE_CONFIG_OUTINIT_Pos);
if (toggle) {
NRF_GPIOTE->CONFIG[obj->pwm] |= (GPIOTE_CONFIG_MODE_Task << GPIOTE_CONFIG_MODE_Pos) |
((uint32_t)GPIOTE_CONFIG_POLARITY_Toggle << GPIOTE_CONFIG_POLARITY_Pos);
} else {
NRF_GPIOTE->CONFIG[obj->pwm] &= ~((uint32_t)GPIOTE_CONFIG_POLARITY_Toggle << GPIOTE_CONFIG_POLARITY_Pos);
NRF_GPIOTE->CONFIG[obj->pwm] |= ((uint32_t)GPIOTE_CONFIG_POLARITY_HiToLo << GPIOTE_CONFIG_POLARITY_Pos);
}
}
}
void pwmout_init(pwmout_t *obj, PinName pin)
{
// determine the channel
uint8_t pwmOutSuccess = 0;
PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
MBED_ASSERT(pwm != (PWMName)NC);
if (PWM_taken[(uint8_t)pwm]) {
for (uint8_t i = 1; !pwmOutSuccess && (i<NO_PWMS); i++) {
if (!PWM_taken[i]) {
pwm = (PWMName)i;
PWM_taken[i] = 1;
pwmOutSuccess = 1;
}
}
} else {
pwmOutSuccess = 1;
PWM_taken[(uint8_t)pwm] = 1;
}
if (!pwmOutSuccess) {
error("PwmOut pin mapping failed. All available PWM channels are in use.");
}
obj->pwm = pwm;
obj->pin = pin;
gpiote_init(pin, (uint8_t)pwm);
ppi_init((uint8_t)pwm);
if (pwm == 0) {
NRF_POWER->TASKS_CONSTLAT = 1;
}
timer_init((uint8_t)pwm);
//default to 20ms: standard for servos, and fine for e.g. brightness control
pwmout_period_ms(obj, 20);
pwmout_write (obj, 0);
}
void pwmout_free(pwmout_t* obj) {
MBED_ASSERT(obj->pwm != (PWMName)NC);
pwmout_write(obj, 0);
PWM_taken[obj->pwm] = 0;
timer_free();
ppi_free(obj->pwm);
gpiote_free(obj->pin,obj->pwm);
}
void pwmout_write(pwmout_t *obj, float value)
{
uint16_t oldPulseWidth;
NRF_TIMER2->EVENTS_COMPARE[3] = 0;
NRF_TIMER2->TASKS_STOP = 1;
if (value < 0.0f) {
value = 0.0;
} else if (value > 1.0f) {
value = 1.0;
}
oldPulseWidth = ACTUAL_PULSE[obj->pwm];
ACTUAL_PULSE[obj->pwm] = PULSE_WIDTH[obj->pwm] = value * PERIOD;
if (PULSE_WIDTH[obj->pwm] == 0) {
PULSE_WIDTH[obj->pwm] = 1;
setModulation(obj, 0, 0);
} else if (PULSE_WIDTH[obj->pwm] == PERIOD) {
PULSE_WIDTH[obj->pwm] = PERIOD - 1;
setModulation(obj, 0, 1);
} else if ((oldPulseWidth == 0) || (oldPulseWidth == PERIOD)) {
setModulation(obj, 1, oldPulseWidth == PERIOD);
}
NRF_TIMER2->INTENSET = TIMER_INTENSET_COMPARE3_Msk;
NRF_TIMER2->SHORTS = TIMER_SHORTS_COMPARE3_CLEAR_Msk | TIMER_SHORTS_COMPARE3_STOP_Msk;
NRF_TIMER2->TASKS_START = 1;
}
float pwmout_read(pwmout_t *obj)
{
return ((float)PULSE_WIDTH[obj->pwm] / (float)PERIOD);
}
void pwmout_period(pwmout_t *obj, float seconds)
{
pwmout_period_us(obj, seconds * 1000000.0f);
}
void pwmout_period_ms(pwmout_t *obj, int ms)
{
pwmout_period_us(obj, ms * 1000);
}
// Set the PWM period, keeping the duty cycle the same.
void pwmout_period_us(pwmout_t *obj, int us)
{
uint32_t periodInTicks = us / TIMER_PRECISION;
NRF_TIMER2->EVENTS_COMPARE[3] = 0;
NRF_TIMER2->TASKS_STOP = 1;
if (periodInTicks>((1 << 16) - 1)) {
PERIOD = (1 << 16) - 1; //131ms
} else if (periodInTicks<5) {
PERIOD = 5;
} else {
PERIOD = periodInTicks;
}
NRF_TIMER2->INTENSET = TIMER_INTENSET_COMPARE3_Msk;
NRF_TIMER2->SHORTS = TIMER_SHORTS_COMPARE3_CLEAR_Msk | TIMER_SHORTS_COMPARE3_STOP_Msk;
NRF_TIMER2->TASKS_START = 1;
}
void pwmout_pulsewidth(pwmout_t *obj, float seconds)
{
pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
}
void pwmout_pulsewidth_ms(pwmout_t *obj, int ms)
{
pwmout_pulsewidth_us(obj, ms * 1000);
}
void pwmout_pulsewidth_us(pwmout_t *obj, int us)
{
uint32_t pulseInTicks = us / TIMER_PRECISION;
uint16_t oldPulseWidth = ACTUAL_PULSE[obj->pwm];
NRF_TIMER2->EVENTS_COMPARE[3] = 0;
NRF_TIMER2->TASKS_STOP = 1;
ACTUAL_PULSE[obj->pwm] = PULSE_WIDTH[obj->pwm] = pulseInTicks;
if (PULSE_WIDTH[obj->pwm] == 0) {
PULSE_WIDTH[obj->pwm] = 1;
setModulation(obj, 0, 0);
} else if (PULSE_WIDTH[obj->pwm] == PERIOD) {
PULSE_WIDTH[obj->pwm] = PERIOD - 1;
setModulation(obj, 0, 1);
} else if ((oldPulseWidth == 0) || (oldPulseWidth == PERIOD)) {
setModulation(obj, 1, oldPulseWidth == PERIOD);
}
NRF_TIMER2->INTENSET = TIMER_INTENSET_COMPARE3_Msk;
NRF_TIMER2->SHORTS = TIMER_SHORTS_COMPARE3_CLEAR_Msk | TIMER_SHORTS_COMPARE3_STOP_Msk;
NRF_TIMER2->TASKS_START = 1;
}
const PinMap *pwmout_pinmap()
{
return PinMap_PWM;
}

359
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/serial_api.c
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@ -1,359 +0,0 @@
/* mbed Microcontroller Library
* Copyright (c) 2013 Nordic Semiconductor
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
// math.h required for floating point operations for baud rate calculation
//#include <math.h>
#include <string.h>
#include "mbed_assert.h"
#include "serial_api.h"
#include "cmsis.h"
#include "pinmap.h"
/******************************************************************************
* INITIALIZATION
******************************************************************************/
#define UART_NUM 1
static uint32_t serial_irq_ids[UART_NUM] = {0};
static uart_irq_handler irq_handler;
static const int acceptedSpeeds[18][2] = {
{1200, UART_BAUDRATE_BAUDRATE_Baud1200},
{2400, UART_BAUDRATE_BAUDRATE_Baud2400},
{4800, UART_BAUDRATE_BAUDRATE_Baud4800},
{9600, UART_BAUDRATE_BAUDRATE_Baud9600},
{14400, UART_BAUDRATE_BAUDRATE_Baud14400},
{19200, UART_BAUDRATE_BAUDRATE_Baud19200},
{28800, UART_BAUDRATE_BAUDRATE_Baud28800},
{31250, (0x00800000UL) /* 31250 baud */},
{38400, UART_BAUDRATE_BAUDRATE_Baud38400},
{56000, (0x00E51000UL) /* 56000 baud */},
{57600, UART_BAUDRATE_BAUDRATE_Baud57600},
{76800, UART_BAUDRATE_BAUDRATE_Baud76800},
{115200, UART_BAUDRATE_BAUDRATE_Baud115200},
{230400, UART_BAUDRATE_BAUDRATE_Baud230400},
{250000, UART_BAUDRATE_BAUDRATE_Baud250000},
{460800, UART_BAUDRATE_BAUDRATE_Baud460800},
{921600, UART_BAUDRATE_BAUDRATE_Baud921600},
{1000000, UART_BAUDRATE_BAUDRATE_Baud1M}
};
int stdio_uart_inited = 0;
serial_t stdio_uart;
// Pinmap used for testing only
static const PinMap PinMap_UART_testing[] = {
{P0_0, 0, 0},
{P0_1, 0, 0},
{P0_2, 0, 0},
{P0_3, 0, 0},
{P0_4, 0, 0},
{P0_5, 0, 0},
{P0_6, 0, 0},
{P0_7, 0, 0},
{P0_8, 0, 0},
{P0_9, 0, 0},
{P0_10, 0, 0},
{P0_11, 0, 0},
{P0_12, 0, 0},
{P0_13, 0, 0},
{P0_14, 0, 0},
{P0_15, 0, 0},
{P0_16, 0, 0},
{P0_17, 0, 0},
{P0_18, 0, 0},
{P0_19, 0, 0},
{P0_20, 0, 0},
{P0_21, 0, 0},
{P0_22, 0, 0},
{P0_23, 0, 0},
{P0_24, 0, 0},
{P0_25, 0, 0},
{P0_28, 0, 0},
{P0_29, 0, 0},
{P0_30, 0, 0},
{NC, NC, 0}
};
void serial_init(serial_t *obj, PinName tx, PinName rx) {
UARTName uart = UART_0;
obj->uart = (NRF_UART_Type *)uart;
//pin configurations --
NRF_GPIO->OUT |= (1 << tx);
NRF_GPIO->OUT |= (1 << RTS_PIN_NUMBER);
NRF_GPIO->DIR |= (1 << tx); //TX_PIN_NUMBER);
NRF_GPIO->DIR |= (1 << RTS_PIN_NUMBER);
NRF_GPIO->DIR &= ~(1 << rx); //RX_PIN_NUMBER);
NRF_GPIO->DIR &= ~(1 << CTS_PIN_NUMBER);
// set default baud rate and format
serial_baud (obj, 9600);
serial_format(obj, 8, ParityNone, 1);
obj->uart->ENABLE = (UART_ENABLE_ENABLE_Enabled << UART_ENABLE_ENABLE_Pos);
obj->uart->TASKS_STARTTX = 1;
obj->uart->TASKS_STARTRX = 1;
obj->uart->EVENTS_RXDRDY = 0;
// dummy write needed or TXDRDY trails write rather than leads write.
// pins are disconnected so nothing is physically transmitted on the wire
obj->uart->PSELTXD = 0xFFFFFFFF;
obj->uart->EVENTS_TXDRDY = 0;
obj->uart->TXD = 0;
while (obj->uart->EVENTS_TXDRDY != 1);
obj->index = 0;
obj->uart->PSELRTS = RTS_PIN_NUMBER;
obj->uart->PSELTXD = tx; //TX_PIN_NUMBER;
obj->uart->PSELCTS = CTS_PIN_NUMBER;
obj->uart->PSELRXD = rx; //RX_PIN_NUMBER;
// set rx/tx pins in PullUp mode
if (tx != NC) {
pin_mode(tx, PullUp);
}
if (rx != NC) {
pin_mode(rx, PullUp);
}
if (uart == STDIO_UART) {
stdio_uart_inited = 1;
memcpy(&stdio_uart, obj, sizeof(serial_t));
}
}
void serial_free(serial_t *obj)
{
serial_irq_ids[obj->index] = 0;
}
// serial_baud
// set the baud rate, taking in to account the current SystemFrequency
void serial_baud(serial_t *obj, int baudrate)
{
if (baudrate<=1200) {
obj->uart->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud1200;
return;
}
for (int i = 1; i<17; i++) {
if (baudrate<acceptedSpeeds[i][0]) {
obj->uart->BAUDRATE = acceptedSpeeds[i - 1][1];
return;
}
}
obj->uart->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud1M;
}
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
{
// 0: 1 stop bits, 1: 2 stop bits
// int parity_enable, parity_select;
switch (parity) {
case ParityNone:
obj->uart->CONFIG = 0;
break;
default:
obj->uart->CONFIG = (UART_CONFIG_PARITY_Included << UART_CONFIG_PARITY_Pos);
return;
}
//no Flow Control
}
//******************************************************************************
// * INTERRUPT HANDLING
//******************************************************************************
static inline void uart_irq(uint32_t iir, uint32_t index)
{
SerialIrq irq_type;
switch (iir) {
case 1:
irq_type = TxIrq;
break;
case 2:
irq_type = RxIrq;
break;
default:
return;
}
if (serial_irq_ids[index] != 0) {
irq_handler(serial_irq_ids[index], irq_type);
}
}
#ifdef __cplusplus
extern "C" {
#endif
void UART0_IRQHandler()
{
uint32_t irtype = 0;
if((NRF_UART0->INTENSET & 0x80) && NRF_UART0->EVENTS_TXDRDY) {
irtype = 1;
} else if((NRF_UART0->INTENSET & 0x04) && NRF_UART0->EVENTS_RXDRDY) {
irtype = 2;
}
uart_irq(irtype, 0);
}
#ifdef __cplusplus
}
#endif
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
{
irq_handler = handler;
serial_irq_ids[obj->index] = id;
}
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
{
IRQn_Type irq_n = (IRQn_Type)0;
switch ((int)obj->uart) {
case UART_0:
irq_n = UART0_IRQn;
break;
}
if (enable) {
switch (irq) {
case RxIrq:
obj->uart->INTENSET = (UART_INTENSET_RXDRDY_Msk);
break;
case TxIrq:
obj->uart->INTENSET = (UART_INTENSET_TXDRDY_Msk);
break;
}
NVIC_SetPriority(irq_n, 3);
NVIC_EnableIRQ(irq_n);
} else { // disable
// maseked writes to INTENSET dont disable and masked writes to
// INTENCLR seemed to clear the entire register, not bits.
// Added INTEN to memory map and seems to allow set and clearing of specific bits as desired
int all_disabled = 0;
switch (irq) {
case RxIrq:
obj->uart->INTENCLR = (UART_INTENCLR_RXDRDY_Msk);
all_disabled = (obj->uart->INTENCLR & (UART_INTENCLR_TXDRDY_Msk)) == 0;
break;
case TxIrq:
obj->uart->INTENCLR = (UART_INTENCLR_TXDRDY_Msk);
all_disabled = (obj->uart->INTENCLR & (UART_INTENCLR_RXDRDY_Msk)) == 0;
break;
}
if (all_disabled) {
NVIC_DisableIRQ(irq_n);
}
}
}
//******************************************************************************
//* READ/WRITE
//******************************************************************************
int serial_getc(serial_t *obj)
{
while (!serial_readable(obj)) {
}
obj->uart->EVENTS_RXDRDY = 0;
return (uint8_t)obj->uart->RXD;
}
void serial_putc(serial_t *obj, int c)
{
while (!serial_writable(obj)) {
}
obj->uart->EVENTS_TXDRDY = 0;
obj->uart->TXD = (uint8_t)c;
}
int serial_readable(serial_t *obj)
{
return (obj->uart->EVENTS_RXDRDY == 1);
}
int serial_writable(serial_t *obj)
{
return (obj->uart->EVENTS_TXDRDY == 1);
}
void serial_break_set(serial_t *obj)
{
obj->uart->TASKS_SUSPEND = 1;
}
void serial_break_clear(serial_t *obj)
{
obj->uart->TASKS_STARTTX = 1;
obj->uart->TASKS_STARTRX = 1;
}
void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
{
if (type == FlowControlRTSCTS || type == FlowControlRTS) {
NRF_GPIO->DIR |= (1<<rxflow);
pin_mode(rxflow, PullUp);
obj->uart->PSELRTS = rxflow;
obj->uart->CONFIG |= 0x01; // Enable HWFC
}
if (type == FlowControlRTSCTS || type == FlowControlCTS) {
NRF_GPIO->DIR &= ~(1<<txflow);
pin_mode(txflow, PullUp);
obj->uart->PSELCTS = txflow;
obj->uart->CONFIG |= 0x01; // Enable HWFC;
}
if (type == FlowControlNone) {
obj->uart->PSELRTS = 0xFFFFFFFF; // Disable RTS
obj->uart->PSELCTS = 0xFFFFFFFF; // Disable CTS
obj->uart->CONFIG &= ~0x01; // Enable HWFC;
}
}
void serial_clear(serial_t *obj) {
}
const PinMap *serial_tx_pinmap()
{
return PinMap_UART_testing;
}
const PinMap *serial_rx_pinmap()
{
return PinMap_UART_testing;
}
const PinMap *serial_cts_pinmap()
{
return PinMap_UART_testing;
}
const PinMap *serial_rts_pinmap()
{
return PinMap_UART_testing;
}

33
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/sleep.c
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@ -1,33 +0,0 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "sleep_api.h"
#include "cmsis.h"
#include "mbed_interface.h"
#include "mbed_toolchain.h"
MBED_WEAK void hal_sleep(void)
{
// ensure debug is disconnected if semihost is enabled....
NRF_POWER->TASKS_LOWPWR = 1;
// wait for interrupt
__WFE();
}
MBED_WEAK void hal_deepsleep(void)
{
hal_sleep();
// NRF_POWER->SYSTEMOFF=1;
}

375
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/spi_api.c
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@ -1,375 +0,0 @@
/* mbed Microcontroller Library
* Copyright (c) 2013 Nordic Semiconductor
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
//#include <math.h>
#include "mbed_assert.h"
#include "spi_api.h"
#include "cmsis.h"
#include "pinmap.h"
#include "mbed_error.h"
#define SPIS_MESSAGE_SIZE 1
volatile uint8_t m_tx_buf[SPIS_MESSAGE_SIZE] = {0};
volatile uint8_t m_rx_buf[SPIS_MESSAGE_SIZE] = {0};
// nRF51822's I2C_0 and SPI_0 (I2C_1, SPI_1 and SPIS1) share the same address.
// They can't be used at the same time. So we use two global variable to track the usage.
// See nRF51822 address information at nRF51822_PS v2.0.pdf - Table 15 Peripheral instance reference
extern volatile i2c_spi_peripheral_t i2c0_spi0_peripheral; // from i2c_api.c
extern volatile i2c_spi_peripheral_t i2c1_spi1_peripheral;
// Pinmap used for testing only
static const PinMap PinMap_SPI_testing[] = {
{P0_0, 0, 0},
{P0_1, 0, 0},
{P0_2, 0, 0},
{P0_3, 0, 0},
{P0_4, 0, 0},
{P0_5, 0, 0},
{P0_6, 0, 0},
{P0_7, 0, 0},
{P0_8, 0, 0},
{P0_9, 0, 0},
{P0_10, 0, 0},
{P0_11, 0, 0},
{P0_12, 0, 0},
{P0_13, 0, 0},
{P0_14, 0, 0},
{P0_15, 0, 0},
{P0_16, 0, 0},
{P0_17, 0, 0},
{P0_18, 0, 0},
{P0_19, 0, 0},
{P0_20, 0, 0},
{P0_21, 0, 0},
{P0_22, 0, 0},
{P0_23, 0, 0},
{P0_24, 0, 0},
{P0_25, 0, 0},
{P0_28, 0, 0},
{P0_29, 0, 0},
{P0_30, 0, 0},
{NC, NC, 0}
};
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
{
SPIName spi = SPI_0;
if (ssel == NC && i2c0_spi0_peripheral.usage == I2C_SPI_PERIPHERAL_FOR_SPI &&
i2c0_spi0_peripheral.sda_mosi == (uint8_t)mosi &&
i2c0_spi0_peripheral.scl_miso == (uint8_t)miso &&
i2c0_spi0_peripheral.sclk == (uint8_t)sclk) {
// The SPI with the same pins is already initialized
spi = SPI_0;
obj->peripheral = 0x1;
} else if (ssel == NC && i2c1_spi1_peripheral.usage == I2C_SPI_PERIPHERAL_FOR_SPI &&
i2c1_spi1_peripheral.sda_mosi == (uint8_t)mosi &&
i2c1_spi1_peripheral.scl_miso == (uint8_t)miso &&
i2c1_spi1_peripheral.sclk == (uint8_t)sclk) {
// The SPI with the same pins is already initialized
spi = SPI_1;
obj->peripheral = 0x2;
} else if (i2c1_spi1_peripheral.usage == 0) {
i2c1_spi1_peripheral.usage = I2C_SPI_PERIPHERAL_FOR_SPI;
i2c1_spi1_peripheral.sda_mosi = (uint8_t)mosi;
i2c1_spi1_peripheral.scl_miso = (uint8_t)miso;
i2c1_spi1_peripheral.sclk = (uint8_t)sclk;
spi = SPI_1;
obj->peripheral = 0x2;
} else if (i2c0_spi0_peripheral.usage == 0) {
i2c0_spi0_peripheral.usage = I2C_SPI_PERIPHERAL_FOR_SPI;
i2c0_spi0_peripheral.sda_mosi = (uint8_t)mosi;
i2c0_spi0_peripheral.scl_miso = (uint8_t)miso;
i2c0_spi0_peripheral.sclk = (uint8_t)sclk;
spi = SPI_0;
obj->peripheral = 0x1;
} else {
// No available peripheral
error("No available SPI");
}
if (ssel==NC) {
obj->spi = (NRF_SPI_Type *)spi;
obj->spis = (NRF_SPIS_Type *)NC;
} else {
obj->spi = (NRF_SPI_Type *)NC;
obj->spis = (NRF_SPIS_Type *)spi;
}
// pin out the spi pins
if (ssel != NC) { //slave
obj->spis->POWER = 0;
obj->spis->POWER = 1;
NRF_GPIO->PIN_CNF[mosi] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
| (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
| (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
NRF_GPIO->PIN_CNF[miso] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
| (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
| (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
NRF_GPIO->PIN_CNF[sclk] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
| (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
| (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
NRF_GPIO->PIN_CNF[ssel] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
| (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
| (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
obj->spis->PSELMOSI = mosi;
obj->spis->PSELMISO = miso;
obj->spis->PSELSCK = sclk;
obj->spis->PSELCSN = ssel;
obj->spis->EVENTS_END = 0;
obj->spis->EVENTS_ACQUIRED = 0;
obj->spis->MAXRX = SPIS_MESSAGE_SIZE;
obj->spis->MAXTX = SPIS_MESSAGE_SIZE;
obj->spis->TXDPTR = (uint32_t)&m_tx_buf[0];
obj->spis->RXDPTR = (uint32_t)&m_rx_buf[0];
obj->spis->SHORTS = (SPIS_SHORTS_END_ACQUIRE_Enabled << SPIS_SHORTS_END_ACQUIRE_Pos);
spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
} else { //master
obj->spi->POWER = 0;
obj->spi->POWER = 1;
//NRF_GPIO->DIR |= (1<<mosi);
NRF_GPIO->PIN_CNF[mosi] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
| (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
| (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
obj->spi->PSELMOSI = mosi;
NRF_GPIO->PIN_CNF[sclk] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
| (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
| (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
obj->spi->PSELSCK = sclk;
//NRF_GPIO->DIR &= ~(1<<miso);
NRF_GPIO->PIN_CNF[miso] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
| (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
| (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
obj->spi->PSELMISO = miso;
obj->spi->EVENTS_READY = 0U;
spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
spi_frequency(obj, 1000000);
}
}
void spi_free(spi_t *obj)
{
}
static inline void spi_disable(spi_t *obj, int slave)
{
if (slave) {
obj->spis->ENABLE = (SPIS_ENABLE_ENABLE_Disabled << SPIS_ENABLE_ENABLE_Pos);
} else {
obj->spi->ENABLE = (SPI_ENABLE_ENABLE_Disabled << SPI_ENABLE_ENABLE_Pos);
}
}
static inline void spi_enable(spi_t *obj, int slave)
{
if (slave) {
obj->spis->ENABLE = (SPIS_ENABLE_ENABLE_Enabled << SPIS_ENABLE_ENABLE_Pos);
} else {
obj->spi->ENABLE = (SPI_ENABLE_ENABLE_Enabled << SPI_ENABLE_ENABLE_Pos);
}
}
void spi_format(spi_t *obj, int bits, int mode, int slave)
{
uint32_t config_mode = 0;
spi_disable(obj, slave);
if (bits != 8) {
error("Only 8bits SPI supported");
}
switch (mode) {
case 0:
config_mode = (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos) | (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos);
break;
case 1:
config_mode = (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos) | (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos);
break;
case 2:
config_mode = (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos) | (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos);
break;
case 3:
config_mode = (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos) | (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos);
break;
default:
error("SPI format error");
break;
}
//default to msb first
if (slave) {
obj->spis->CONFIG = (config_mode | (SPI_CONFIG_ORDER_MsbFirst << SPI_CONFIG_ORDER_Pos));
} else {
obj->spi->CONFIG = (config_mode | (SPI_CONFIG_ORDER_MsbFirst << SPI_CONFIG_ORDER_Pos));
}
spi_enable(obj, slave);
}
void spi_frequency(spi_t *obj, int hz)
{
if ((int)obj->spi==NC) {
return;
}
spi_disable(obj, 0);
if (hz<250000) { //125Kbps
obj->spi->FREQUENCY = (uint32_t) SPI_FREQUENCY_FREQUENCY_K125;
} else if (hz<500000) { //250Kbps
obj->spi->FREQUENCY = (uint32_t) SPI_FREQUENCY_FREQUENCY_K250;
} else if (hz<1000000) { //500Kbps
obj->spi->FREQUENCY = (uint32_t) SPI_FREQUENCY_FREQUENCY_K500;
} else if (hz<2000000) { //1Mbps
obj->spi->FREQUENCY = (uint32_t) SPI_FREQUENCY_FREQUENCY_M1;
} else if (hz<4000000) { //2Mbps
obj->spi->FREQUENCY = (uint32_t) SPI_FREQUENCY_FREQUENCY_M2;
} else if (hz<8000000) { //4Mbps
obj->spi->FREQUENCY = (uint32_t) SPI_FREQUENCY_FREQUENCY_M4;
} else { //8Mbps
obj->spi->FREQUENCY = (uint32_t) SPI_FREQUENCY_FREQUENCY_M8;
}
spi_enable(obj, 0);
}
static inline int spi_readable(spi_t *obj)
{
return (obj->spi->EVENTS_READY == 1);
}
static inline int spi_writeable(spi_t *obj)
{
return (obj->spi->EVENTS_READY == 0);
}
static inline int spi_read(spi_t *obj)
{
while (!spi_readable(obj)) {
}
obj->spi->EVENTS_READY = 0;
return (int)obj->spi->RXD;
}
int spi_master_write(spi_t *obj, int value)
{
while (!spi_writeable(obj)) {
}
obj->spi->TXD = (uint32_t)value;
return spi_read(obj);
}
int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length,
char *rx_buffer, int rx_length, char write_fill) {
int total = (tx_length > rx_length) ? tx_length : rx_length;
for (int i = 0; i < total; i++) {
char out = (i < tx_length) ? tx_buffer[i] : write_fill;
char in = spi_master_write(obj, out);
if (i < rx_length) {
rx_buffer[i] = in;
}
}
return total;
}
//static inline int spis_writeable(spi_t *obj) {
// return (obj->spis->EVENTS_ACQUIRED==1);
//}
int spi_slave_receive(spi_t *obj)
{
return obj->spis->EVENTS_END;
}
int spi_slave_read(spi_t *obj)
{
return m_rx_buf[0];
}
void spi_slave_write(spi_t *obj, int value)
{
m_tx_buf[0] = value & 0xFF;
obj->spis->TASKS_RELEASE = 1;
obj->spis->EVENTS_ACQUIRED = 0;
obj->spis->EVENTS_END = 0;
}
const PinMap *spi_master_mosi_pinmap()
{
return PinMap_SPI_testing;
}
const PinMap *spi_master_miso_pinmap()
{
return PinMap_SPI_testing;
}
const PinMap *spi_master_clk_pinmap()
{
return PinMap_SPI_testing;
}
const PinMap *spi_master_cs_pinmap()
{
return PinMap_SPI_testing;
}
const PinMap *spi_slave_mosi_pinmap()
{
return PinMap_SPI_testing;
}
const PinMap *spi_slave_miso_pinmap()
{
return PinMap_SPI_testing;
}
const PinMap *spi_slave_clk_pinmap()
{
return PinMap_SPI_testing;
}
const PinMap *spi_slave_cs_pinmap()
{
return PinMap_SPI_testing;
}

20
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/twi_config.h
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/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#ifndef TWI_MASTER_CONFIG
#define TWI_MASTER_CONFIG
#include "PinNames.h"
#define TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER (I2C_SCL0)
#define TWI_MASTER_CONFIG_DATA_PIN_NUMBER (I2C_SDA0)
#endif

304
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/twi_master.c
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/* Copyright (c) 2009 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#include "twi_master.h"
#include "twi_config.h"
#include <stdbool.h>
#include <stdint.h>
#include "nrf.h"
#include "nrf_delay.h"
/* Max cycles approximately to wait on RXDREADY and TXDREADY event,
* This is optimized way instead of using timers, this is not power aware. */
#define MAX_TIMEOUT_LOOPS (20000UL) /**< MAX while loops to wait for RXD/TXD event */
static bool twi_master_write(uint8_t * data, uint8_t data_length, bool issue_stop_condition, NRF_TWI_Type* twi)
{
uint32_t timeout = MAX_TIMEOUT_LOOPS; /* max loops to wait for EVENTS_TXDSENT event*/
if (data_length == 0)
{
/* Return false for requesting data of size 0 */
return false;
}
twi->TXD = *data++;
twi->TASKS_STARTTX = 1;
/** @snippet [TWI HW master write] */
while (true)
{
while (twi->EVENTS_TXDSENT == 0 && twi->EVENTS_ERROR == 0 && (--timeout))
{
// Do nothing.
}
if (timeout == 0 || NRF_TWI1->EVENTS_ERROR != 0)
{
// Recover the peripheral as indicated by PAN 56: "TWI: TWI module lock-up." found at
// Product Anomaly Notification document found at
// https://www.nordicsemi.com/eng/Products/Bluetooth-R-low-energy/nRF51822/#Downloads
twi->EVENTS_ERROR = 0;
twi->ENABLE = TWI_ENABLE_ENABLE_Disabled << TWI_ENABLE_ENABLE_Pos;
twi->POWER = 0;
nrf_delay_us(5);
twi->POWER = 1;
twi->ENABLE = TWI_ENABLE_ENABLE_Enabled << TWI_ENABLE_ENABLE_Pos;
(void)twi_master_init_and_clear(twi);
return false;
}
twi->EVENTS_TXDSENT = 0;
if (--data_length == 0)
{
break;
}
twi->TXD = *data++;
}
/** @snippet [TWI HW master write] */
if (issue_stop_condition)
{
twi->EVENTS_STOPPED = 0;
twi->TASKS_STOP = 1;
/* Wait until stop sequence is sent */
while(twi->EVENTS_STOPPED == 0)
{
// Do nothing.
}
}
return true;
}
/** @brief Function for read by twi_master.
*/
static bool twi_master_read(uint8_t * data, uint8_t data_length, bool issue_stop_condition, NRF_TWI_Type* twi)
{
uint32_t timeout = MAX_TIMEOUT_LOOPS; /* max loops to wait for RXDREADY event*/
if (data_length == 0)
{
/* Return false for requesting data of size 0 */
return false;
}
else if (data_length == 1)
{
NRF_PPI->CH[0].TEP = (uint32_t)&twi->TASKS_STOP;
}
else
{
NRF_PPI->CH[0].TEP = (uint32_t)&twi->TASKS_SUSPEND;
}
NRF_PPI->CHENSET = PPI_CHENSET_CH0_Msk;
twi->EVENTS_RXDREADY = 0;
twi->TASKS_STARTRX = 1;
/** @snippet [TWI HW master read] */
while (true)
{
while (twi->EVENTS_RXDREADY == 0 && NRF_TWI1->EVENTS_ERROR == 0 && (--timeout))
{
// Do nothing.
}
twi->EVENTS_RXDREADY = 0;
if (timeout == 0 || twi->EVENTS_ERROR != 0)
{
// Recover the peripheral as indicated by PAN 56: "TWI: TWI module lock-up." found at
// Product Anomaly Notification document found at
// https://www.nordicsemi.com/eng/Products/Bluetooth-R-low-energy/nRF51822/#Downloads
twi->EVENTS_ERROR = 0;
twi->ENABLE = TWI_ENABLE_ENABLE_Disabled << TWI_ENABLE_ENABLE_Pos;
twi->POWER = 0;
nrf_delay_us(5);
twi->POWER = 1;
twi->ENABLE = TWI_ENABLE_ENABLE_Enabled << TWI_ENABLE_ENABLE_Pos;
(void)twi_master_init_and_clear(twi);
return false;
}
*data++ = NRF_TWI1->RXD;
/* Configure PPI to stop TWI master before we get last BB event */
if (--data_length == 1)
{
NRF_PPI->CH[0].TEP = (uint32_t)&NRF_TWI1->TASKS_STOP;
}
if (data_length == 0)
{
break;
}
// Recover the peripheral as indicated by PAN 56: "TWI: TWI module lock-up." found at
// Product Anomaly Notification document found at
// https://www.nordicsemi.com/eng/Products/Bluetooth-R-low-energy/nRF51822/#Downloads
nrf_delay_us(20);
twi->TASKS_RESUME = 1;
}
/** @snippet [TWI HW master read] */
/* Wait until stop sequence is sent */
while(twi->EVENTS_STOPPED == 0)
{
// Do nothing.
}
twi->EVENTS_STOPPED = 0;
NRF_PPI->CHENCLR = PPI_CHENCLR_CH0_Msk;
return true;
}
/**
* @brief Function for detecting stuck slaves (SDA = 0 and SCL = 1) and tries to clear the bus.
*
* @return
* @retval false Bus is stuck.
* @retval true Bus is clear.
*/
static bool twi_master_clear_bus(NRF_TWI_Type* twi)
{
uint32_t twi_state;
bool bus_clear;
uint32_t clk_pin_config;
uint32_t data_pin_config;
// Save and disable TWI hardware so software can take control over the pins.
twi_state = twi->ENABLE;
twi->ENABLE = TWI_ENABLE_ENABLE_Disabled << TWI_ENABLE_ENABLE_Pos;
clk_pin_config = \
NRF_GPIO->PIN_CNF[TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER];
NRF_GPIO->PIN_CNF[TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER] = \
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \
| (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) \
| (GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos) \
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) \
| (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
data_pin_config = \
NRF_GPIO->PIN_CNF[TWI_MASTER_CONFIG_DATA_PIN_NUMBER];
NRF_GPIO->PIN_CNF[TWI_MASTER_CONFIG_DATA_PIN_NUMBER] = \
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \
| (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) \
| (GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos) \
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) \
| (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
TWI_SDA_HIGH();
TWI_SCL_HIGH();
TWI_DELAY();
if ((TWI_SDA_READ() == 1) && (TWI_SCL_READ() == 1))
{
bus_clear = true;
}
else
{
uint_fast8_t i;
bus_clear = false;
// Clock max 18 pulses worst case scenario(9 for master to send the rest of command and 9
// for slave to respond) to SCL line and wait for SDA come high.
for (i=18; i--;)
{
TWI_SCL_LOW();
TWI_DELAY();
TWI_SCL_HIGH();
TWI_DELAY();
if (TWI_SDA_READ() == 1)
{
bus_clear = true;
break;
}
}
}
NRF_GPIO->PIN_CNF[TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER] = clk_pin_config;
NRF_GPIO->PIN_CNF[TWI_MASTER_CONFIG_DATA_PIN_NUMBER] = data_pin_config;
twi->ENABLE = twi_state;
return bus_clear;
}
/** @brief Function for initializing the twi_master.
*/
bool twi_master_init_and_clear(NRF_TWI_Type* twi)
{
/* To secure correct signal levels on the pins used by the TWI
master when the system is in OFF mode, and when the TWI master is
disabled, these pins must be configured in the GPIO peripheral.
*/
NRF_GPIO->PIN_CNF[TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER] = \
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \
| (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) \
| (GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos) \
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) \
| (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
NRF_GPIO->PIN_CNF[TWI_MASTER_CONFIG_DATA_PIN_NUMBER] = \
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \
| (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) \
| (GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos) \
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) \
| (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
twi->EVENTS_RXDREADY = 0;
twi->EVENTS_TXDSENT = 0;
twi->PSELSCL = TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER;
twi->PSELSDA = TWI_MASTER_CONFIG_DATA_PIN_NUMBER;
twi->FREQUENCY = TWI_FREQUENCY_FREQUENCY_K100 << TWI_FREQUENCY_FREQUENCY_Pos;
NRF_PPI->CH[0].EEP = (uint32_t)&twi->EVENTS_BB;
NRF_PPI->CH[0].TEP = (uint32_t)&twi->TASKS_SUSPEND;
NRF_PPI->CHENCLR = PPI_CHENCLR_CH0_Msk;
twi->ENABLE = TWI_ENABLE_ENABLE_Enabled << TWI_ENABLE_ENABLE_Pos;
return twi_master_clear_bus(twi);
}
/** @brief Function for transfer by twi_master.
*/
bool twi_master_transfer(uint8_t address,
uint8_t * data,
uint8_t data_length,
bool issue_stop_condition,
NRF_TWI_Type* twi)
{
bool transfer_succeeded = false;
if (data_length > 0 && twi_master_clear_bus(twi))
{
twi->ADDRESS = (address >> 1);
if ((address & TWI_READ_BIT))
{
transfer_succeeded = twi_master_read(data, data_length, issue_stop_condition, twi);
}
else
{
transfer_succeeded = twi_master_write(data, data_length, issue_stop_condition, twi);
}
}
return transfer_succeeded;
}
/*lint --flb "Leave library region" */

112
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/twi_master.h
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@ -1,112 +0,0 @@
/* Copyright (c) 2009 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#ifndef TWI_MASTER_H
#define TWI_MASTER_H
#ifdef __cplusplus
extern "C" {
#endif
/*lint ++flb "Enter library region" */
#include <stdbool.h>
#include <stdint.h>
#include "nrf51.h"
/** @file
* @brief Software controlled TWI Master driver.
*
*
* @defgroup lib_driver_twi_master Software controlled TWI Master driver
* @{
* @ingroup nrf_drivers
* @brief Software controlled TWI Master driver.
*
* Supported features:
* - Repeated start
* - No multi-master
* - Only 7-bit addressing
* - Supports clock stretching (with optional SMBus style slave timeout)
* - Tries to handle slaves stuck in the middle of transfer
*/
#define TWI_READ_BIT (0x01) //!< If this bit is set in the address field, transfer direction is from slave to master.
#define TWI_ISSUE_STOP ((bool)true) //!< Parameter for @ref twi_master_transfer
#define TWI_DONT_ISSUE_STOP ((bool)false) //!< Parameter for @ref twi_master_transfer
/* These macros are needed to see if the slave is stuck and we as master send dummy clock cycles to end its wait */
/*lint -e717 -save "Suppress do {} while (0) for these macros" */
/*lint ++flb "Enter library region" */
#define TWI_SCL_HIGH() do { NRF_GPIO->OUTSET = (1UL << TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER); } while(0) /*!< Pulls SCL line high */
#define TWI_SCL_LOW() do { NRF_GPIO->OUTCLR = (1UL << TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER); } while(0) /*!< Pulls SCL line low */
#define TWI_SDA_HIGH() do { NRF_GPIO->OUTSET = (1UL << TWI_MASTER_CONFIG_DATA_PIN_NUMBER); } while(0) /*!< Pulls SDA line high */
#define TWI_SDA_LOW() do { NRF_GPIO->OUTCLR = (1UL << TWI_MASTER_CONFIG_DATA_PIN_NUMBER); } while(0) /*!< Pulls SDA line low */
#define TWI_SDA_INPUT() do { NRF_GPIO->DIRCLR = (1UL << TWI_MASTER_CONFIG_DATA_PIN_NUMBER); } while(0) /*!< Configures SDA pin as input */
#define TWI_SDA_OUTPUT() do { NRF_GPIO->DIRSET = (1UL << TWI_MASTER_CONFIG_DATA_PIN_NUMBER); } while(0) /*!< Configures SDA pin as output */
#define TWI_SCL_OUTPUT() do { NRF_GPIO->DIRSET = (1UL << TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER); } while(0) /*!< Configures SCL pin as output */
/*lint -restore */
#define TWI_SDA_READ() ((NRF_GPIO->IN >> TWI_MASTER_CONFIG_DATA_PIN_NUMBER) & 0x1UL) /*!< Reads current state of SDA */
#define TWI_SCL_READ() ((NRF_GPIO->IN >> TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER) & 0x1UL) /*!< Reads current state of SCL */
#define TWI_DELAY() nrf_delay_us(4) /*!< Time to wait when pin states are changed. For fast-mode the delay can be zero and for standard-mode 4 us delay is sufficient. */
/**
* @brief Function for initializing TWI bus IO pins and checks if the bus is operational.
*
* Both pins are configured as Standard-0, No-drive-1 (open drain).
*
* @param twi The TWI interface to use - either NRF_TWI0 or NRF_TWI1
* @return
* @retval true TWI bus is clear for transfers.
* @retval false TWI bus is stuck.
*/
bool twi_master_init_and_clear(NRF_TWI_Type* twi);
/**
* @brief Function for transferring data over TWI bus.
*
* If TWI master detects even one NACK from the slave or timeout occurs, STOP condition is issued
* and the function returns false.
* Bit 0 (@ref TWI_READ_BIT) in the address parameter controls transfer direction;
* - If 1, master reads data_length number of bytes from the slave
* - If 0, master writes data_length number of bytes to the slave.
*
* @note Make sure at least data_length number of bytes is allocated in data if TWI_READ_BIT is set.
* @note @ref TWI_ISSUE_STOP
*
* @param address Data transfer direction (LSB) / Slave address (7 MSBs).
* @param data Pointer to data.
* @param data_length Number of bytes to transfer.
* @param issue_stop_condition If @ref TWI_ISSUE_STOP, STOP condition is issued before exiting function. If @ref TWI_DONT_ISSUE_STOP, STOP condition is not issued before exiting function. If transfer failed for any reason, STOP condition will be issued in any case.
* @param twi The TWI interface to use - either NRF_TWI0 or NRF_TWI1
* @return
* @retval true Data transfer succeeded without errors.
* @retval false Data transfer failed.
*/
bool twi_master_transfer(uint8_t address, uint8_t *data, uint8_t data_length, bool issue_stop_condition, NRF_TWI_Type* twi);
/**
*@}
**/
#ifdef __cplusplus
}
#endif
/*lint --flb "Leave library region" */
#endif //TWI_MASTER_H

618
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/us_ticker.c
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@ -1,618 +0,0 @@
/* mbed Microcontroller Library
* Copyright (c) 2013 Nordic Semiconductor
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if DEVICE_USTICKER
#include <stddef.h>
#include <stdbool.h>
#include "us_ticker_api.h"
#include "cmsis.h"
#include "PeripheralNames.h"
#include "nrf_delay.h"
#include "mbed_toolchain.h"
#include "mbed_critical.h"
/*
* Note: The micro-second timer API on the nRF51 platform is implemented using
* the RTC counter run at 32kHz (sourced from an external oscillator). This is
* a trade-off between precision and power. Running a normal 32-bit MCU counter
* at high frequency causes the average power consumption to rise to a few
* hundred micro-amps, which is prohibitive for typical low-power BLE
* applications.
* A 32kHz clock doesn't offer the precision needed for keeping u-second time,
* but we're assuming that this will not be a problem for the average user.
*/
#define MAX_RTC_COUNTER_VAL 0x00FFFFFF /**< Maximum value of the RTC counter. */
#define RTC_CLOCK_FREQ (uint32_t)(32768)
#define RTC1_IRQ_PRI 3 /**< Priority of the RTC1 interrupt (used
* for checking for timeouts and executing
* timeout handlers). This must be the same
* as APP_IRQ_PRIORITY_LOW; taken from the
* Nordic SDK. */
#define MAX_RTC_TASKS_DELAY 47 /**< Maximum delay until an RTC task is executed. */
#define FUZZY_RTC_TICKS 2 /* RTC COMPARE occurs when a CC register is N and the RTC
* COUNTER value transitions from N-1 to N. If we're trying to
* setup a callback for a time which will arrive very shortly,
* there are limits to how short the callback interval may be for us
* to rely upon the RTC Compare trigger. If the COUNTER is N,
* writing N+2 to a CC register is guaranteed to trigger a COMPARE
* event at N+2. */
#define RTC_UNITS_TO_MICROSECONDS(RTC_UNITS) (((RTC_UNITS) * (uint64_t)1000000) / RTC_CLOCK_FREQ)
#define MICROSECONDS_TO_RTC_UNITS(MICROS) ((((uint64_t)(MICROS) * RTC_CLOCK_FREQ) + 999999) / 1000000)
#define US_TICKER_SW_IRQ_MASK 0x1
static bool us_ticker_inited = false;
static volatile uint32_t overflowCount; /**< The number of times the 24-bit RTC counter has overflowed. */
static volatile bool us_ticker_callbackPending = false;
static uint32_t us_ticker_callbackTimestamp;
static bool os_tick_started = false; /**< flag indicating if the os_tick has started */
/**
* The value previously set in the capture compare register of channel 1
*/
static uint32_t previous_tick_cc_value = 0;
// us ticker fire interrupt flag for IRQ handler
volatile uint8_t m_common_sw_irq_flag = 0;
/*
RTX provide the following definitions which are used by the tick code:
* os_trv: The number (minus 1) of clock cycle between two tick.
* os_clockrate: Time duration between two ticks (in us).
* OS_Tick_Handler: The function which handle a tick event.
This function is special because it never returns.
Those definitions are used by the code which handle the os tick.
To allow compilation of us_ticker programs without RTOS, those symbols are
exported from this module as weak ones.
*/
MBED_WEAK uint32_t const os_trv;
MBED_WEAK uint32_t const os_clockrate;
MBED_WEAK void OS_Tick_Handler() { }
static inline void rtc1_enableCompareInterrupt(void)
{
NRF_RTC1->EVTENCLR = RTC_EVTEN_COMPARE0_Msk;
NRF_RTC1->INTENSET = RTC_INTENSET_COMPARE0_Msk;
}
static inline void rtc1_disableCompareInterrupt(void)
{
NRF_RTC1->INTENCLR = RTC_INTENSET_COMPARE0_Msk;
NRF_RTC1->EVTENCLR = RTC_EVTEN_COMPARE0_Msk;
}
static inline void rtc1_enableOverflowInterrupt(void)
{
NRF_RTC1->EVTENCLR = RTC_EVTEN_OVRFLW_Msk;
NRF_RTC1->INTENSET = RTC_INTENSET_OVRFLW_Msk;
}
static inline void rtc1_disableOverflowInterrupt(void)
{
NRF_RTC1->INTENCLR = RTC_INTENSET_OVRFLW_Msk;
NRF_RTC1->EVTENCLR = RTC_EVTEN_OVRFLW_Msk;
}
static inline void invokeCallback(void)
{
us_ticker_callbackPending = false;
rtc1_disableCompareInterrupt();
us_ticker_irq_handler();
}
/**
* @brief Function for starting the RTC1 timer. The RTC timer is expected to
* keep running--some interrupts may be disabled temporarily.
*/
static void rtc1_start()
{
NRF_RTC1->PRESCALER = 0; /* for no pre-scaling. */
rtc1_enableOverflowInterrupt();
NVIC_SetPriority(RTC1_IRQn, RTC1_IRQ_PRI);
NVIC_ClearPendingIRQ(RTC1_IRQn);
NVIC_EnableIRQ(RTC1_IRQn);
NRF_RTC1->TASKS_START = 1;
nrf_delay_us(MAX_RTC_TASKS_DELAY);
}
/**
* @brief Function for stopping the RTC1 timer. We don't expect to call this.
*/
void rtc1_stop(void)
{
// If the os tick has been started, RTC1 shouldn't be stopped
// In that case, us ticker and overflow interrupt are disabled.
if (os_tick_started) {
rtc1_disableCompareInterrupt();
rtc1_disableOverflowInterrupt();
} else {
NVIC_DisableIRQ(RTC1_IRQn);
rtc1_disableCompareInterrupt();
rtc1_disableOverflowInterrupt();
NRF_RTC1->TASKS_STOP = 1;
nrf_delay_us(MAX_RTC_TASKS_DELAY);
NRF_RTC1->TASKS_CLEAR = 1;
nrf_delay_us(MAX_RTC_TASKS_DELAY);
}
}
/**
* @brief Function for returning the current value of the RTC1 counter.
*
* @return Current RTC1 counter as a 64-bit value with 56-bit precision (even
* though the underlying counter is 24-bit)
*/
static inline uint64_t rtc1_getCounter64(void)
{
if (NRF_RTC1->EVENTS_OVRFLW) {
overflowCount++;
NRF_RTC1->EVENTS_OVRFLW = 0;
NRF_RTC1->EVTENCLR = RTC_EVTEN_OVRFLW_Msk;
}
return ((uint64_t)overflowCount << 24) | NRF_RTC1->COUNTER;
}
/**
* @brief Function for returning the current value of the RTC1 counter.
*
* @return Current RTC1 counter as a 32-bit value (even though the underlying counter is 24-bit)
*/
static inline uint32_t rtc1_getCounter(void)
{
return rtc1_getCounter64();
}
/**
* @brief Function for handling the RTC1 interrupt for us ticker (capture compare channel 0 and overflow).
*
* @details Checks for timeouts, and executes timeout handlers for expired timers.
*/
void us_ticker_handler(void)
{
if (m_common_sw_irq_flag & US_TICKER_SW_IRQ_MASK) {
m_common_sw_irq_flag &= ~US_TICKER_SW_IRQ_MASK;
us_ticker_irq_handler();
}
if (NRF_RTC1->EVENTS_OVRFLW) {
overflowCount++;
NRF_RTC1->EVENTS_OVRFLW = 0;
NRF_RTC1->EVTENCLR = RTC_EVTEN_OVRFLW_Msk;
}
if (NRF_RTC1->EVENTS_COMPARE[0]) {
NRF_RTC1->EVENTS_COMPARE[0] = 0;
NRF_RTC1->EVTENCLR = RTC_EVTEN_COMPARE0_Msk;
if (us_ticker_callbackPending && ((int)(us_ticker_callbackTimestamp - rtc1_getCounter()) <= 0))
invokeCallback();
}
}
void us_ticker_init(void)
{
if (us_ticker_inited) {
return;
}
rtc1_start();
us_ticker_inited = true;
}
uint32_t us_ticker_read()
{
if (!us_ticker_inited) {
us_ticker_init();
}
/* Return a pseudo microsecond counter value. This is only as precise as the
* 32khz low-freq clock source, but could be adequate.*/
return RTC_UNITS_TO_MICROSECONDS(rtc1_getCounter64());
}
/**
* Setup the us_ticker callback interrupt to go at the given timestamp.
*
* @Note: Only one callback is pending at any time.
*
* @Note: If a callback is pending, and this function is called again, the new
* callback-time overrides the existing callback setting. It is the caller's
* responsibility to ensure that this function is called to setup a callback for
* the earliest timeout.
*
* @Note: If this function is used to setup an interrupt which is immediately
* pending--such as for 'now' or a time in the past,--then the callback is
* invoked a few ticks later.
*/
void us_ticker_set_interrupt(timestamp_t timestamp)
{
if (!us_ticker_inited) {
us_ticker_init();
}
/*
* The argument to this function is a 32-bit microsecond timestamp for when
* a callback should be invoked. On the nRF51, we use an RTC timer running
* at 32kHz to implement a low-power us-ticker. This results in a problem
* based on the fact that 1000000 is not a multiple of 32768.
*
* Going from a micro-second based timestamp to a 32kHz based RTC-time is a
* linear mapping; but this mapping doesn't preserve wraparounds--i.e. when
* the 32-bit micro-second timestamp wraps around unfortunately the
* underlying RTC counter doesn't. The result is that timestamp expiry
* checks on micro-second timestamps don't yield the same result when
* applied on the corresponding RTC timestamp values.
*
* One solution is to translate the incoming 32-bit timestamp into a virtual
* 64-bit timestamp based on the knowledge of system-uptime, and then use
* this wraparound-free 64-bit value to do a linear mapping to RTC time.
* System uptime on an nRF is maintained using the 24-bit RTC counter. We
* track the overflow count to extend the 24-bit hardware counter by an
* additional 32 bits. RTC_UNITS_TO_MICROSECONDS() converts this into
* microsecond units (in 64-bits).
*/
const uint64_t currentTime64 = RTC_UNITS_TO_MICROSECONDS(rtc1_getCounter64());
uint64_t timestamp64 = (currentTime64 & ~(uint64_t)0xFFFFFFFFULL) + timestamp;
if (((uint32_t)currentTime64 > 0x80000000) && (timestamp < 0x80000000)) {
timestamp64 += (uint64_t)0x100000000ULL;
}
uint32_t newCallbackTime = MICROSECONDS_TO_RTC_UNITS(timestamp64);
/* Check for repeat setup of an existing callback. This is actually not
* important; the following code should work even without this check. */
if (us_ticker_callbackPending && (newCallbackTime == us_ticker_callbackTimestamp)) {
return;
}
/* Check for callbacks which are immediately (or will *very* shortly become) pending.
* Even if they are immediately pending, they are scheduled to trigger a few
* ticks later. This keeps things simple by invoking the callback from an
* independent interrupt context. */
if ((int)(newCallbackTime - rtc1_getCounter()) <= (int)FUZZY_RTC_TICKS) {
newCallbackTime = rtc1_getCounter() + FUZZY_RTC_TICKS;
}
NRF_RTC1->CC[0] = newCallbackTime & MAX_RTC_COUNTER_VAL;
us_ticker_callbackTimestamp = newCallbackTime;
if (!us_ticker_callbackPending) {
us_ticker_callbackPending = true;
rtc1_enableCompareInterrupt();
}
}
void us_ticker_fire_interrupt(void)
{
core_util_critical_section_enter();
m_common_sw_irq_flag |= US_TICKER_SW_IRQ_MASK;
NVIC_SetPendingIRQ(RTC1_IRQn);
core_util_critical_section_exit();
}
void us_ticker_disable_interrupt(void)
{
if (us_ticker_callbackPending) {
rtc1_disableCompareInterrupt();
us_ticker_callbackPending = false;
}
}
void us_ticker_clear_interrupt(void)
{
NRF_RTC1->EVENTS_OVRFLW = 0;
NRF_RTC1->EVENTS_COMPARE[0] = 0;
}
void us_ticker_free(void)
{
}
#if defined (__CC_ARM) /* ARMCC Compiler */
__asm void RTC1_IRQHandler(void)
{
IMPORT OS_Tick_Handler
IMPORT us_ticker_handler
/**
* Chanel 1 of RTC1 is used by RTX as a systick.
* If the compare event on channel 1 is set, then branch to OS_Tick_Handler.
* Otherwise, just execute us_ticker_handler.
* This function has to be written in assembly and tagged as naked because OS_Tick_Handler
* will never return.
* A c function would put lr on the stack before calling OS_Tick_Handler and this value
* would never been dequeued.
*
* \code
* void RTC1_IRQHandler(void) {
if(NRF_RTC1->EVENTS_COMPARE[1]) {
// never return...
OS_Tick_Handler();
} else {
us_ticker_handler();
}
}
* \endcode
*/
ldr r0,=0x40011144
ldr r1, [r0, #0]
cmp r1, #0
beq US_TICKER_HANDLER
bl OS_Tick_Handler
US_TICKER_HANDLER
push {r3, lr}
bl us_ticker_handler
pop {r3, pc}
nop /* padding */
}
#elif defined (__GNUC__) /* GNU Compiler */
__attribute__((naked)) void RTC1_IRQHandler(void)
{
/**
* Chanel 1 of RTC1 is used by RTX as a systick.
* If the compare event on channel 1 is set, then branch to OS_Tick_Handler.
* Otherwise, just execute us_ticker_handler.
* This function has to be written in assembly and tagged as naked because OS_Tick_Handler
* will never return.
* A c function would put lr on the stack before calling OS_Tick_Handler and this value
* would never been dequeued.
*
* \code
* void RTC1_IRQHandler(void) {
if(NRF_RTC1->EVENTS_COMPARE[1]) {
// never return...
OS_Tick_Handler();
} else {
us_ticker_handler();
}
}
* \endcode
*/
__asm__ (
"ldr r0,=0x40011144\n"
"ldr r1, [r0, #0]\n"
"cmp r1, #0\n"
"beq US_TICKER_HANDLER\n"
"bl OS_Tick_Handler\n"
"US_TICKER_HANDLER:\n"
"push {r3, lr}\n"
"bl us_ticker_handler\n"
"pop {r3, pc}\n"
"nop"
);
}
#else
#error Compiler not supported.
#error Provide a definition of RTC1_IRQHandler.
/*
* Chanel 1 of RTC1 is used by RTX as a systick.
* If the compare event on channel 1 is set, then branch to OS_Tick_Handler.
* Otherwise, just execute us_ticker_handler.
* This function has to be written in assembly and tagged as naked because OS_Tick_Handler
* will never return.
* A c function would put lr on the stack before calling OS_Tick_Handler and this value
* will never been dequeued. After a certain time a stack overflow will happen.
*
* \code
* void RTC1_IRQHandler(void) {
if(NRF_RTC1->EVENTS_COMPARE[1]) {
// never return...
OS_Tick_Handler();
} else {
us_ticker_handler();
}
}
* \endcode
*/
#endif
/**
* Return the next number of clock cycle needed for the next tick.
* @note This function has been carrefuly optimized for a systick occuring every 1000us.
*/
static uint32_t get_next_tick_cc_delta() {
uint32_t delta = 0;
if (os_clockrate != 1000) {
// In RTX, by default SYSTICK is is used.
// A tick event is generated every os_trv + 1 clock cycles of the system timer.
delta = os_trv + 1;
} else {
// If the clockrate is set to 1000us then 1000 tick should happen every second.
// Unfortunatelly, when clockrate is set to 1000, os_trv is equal to 31.
// If (os_trv + 1) is used as the delta value between two ticks, 1000 ticks will be
// generated in 32000 clock cycle instead of 32768 clock cycles.
// As a result, if a user schedule an OS timer to start in 100s, the timer will start
// instead after 97.656s
// The code below fix this issue, a clock rate of 1000s will generate 1000 ticks in 32768
// clock cycles.
// The strategy is simple, for 1000 ticks:
// * 768 ticks will occur 33 clock cycles after the previous tick
// * 232 ticks will occur 32 clock cycles after the previous tick
// By default every delta is equal to 33.
// Every five ticks (20%, 200 delta in one second), the delta is equal to 32
// The remaining (32) deltas equal to 32 are distributed using primes numbers.
static uint32_t counter = 0;
if ((counter % 5) == 0 || (counter % 31) == 0 || (counter % 139) == 0 || (counter == 503)) {
delta = 32;
} else {
delta = 33;
}
++counter;
if (counter == 1000) {
counter = 0;
}
}
return delta;
}
static inline void clear_tick_interrupt() {
NRF_RTC1->EVENTS_COMPARE[1] = 0;
NRF_RTC1->EVTENCLR = (1 << 17);
}
/**
* Indicate if a value is included in a range which can be wrapped.
* @param begin start of the range
* @param end end of the range
* @param val value to check
* @return true if the value is included in the range and false otherwise.
*/
static inline bool is_in_wrapped_range(uint32_t begin, uint32_t end, uint32_t val) {
// regular case, begin < end
// return true if begin <= val < end
if (begin < end) {
if (begin <= val && val < end) {
return true;
} else {
return false;
}
} else {
// In this case end < begin because it has wrap around the limits
// return false if end < val < begin
if (end < val && val < begin) {
return false;
} else {
return true;
}
}
}
/**
* Register the next tick.
*/
static void register_next_tick() {
previous_tick_cc_value = NRF_RTC1->CC[1];
uint32_t delta = get_next_tick_cc_delta();
uint32_t new_compare_value = (previous_tick_cc_value + delta) & MAX_RTC_COUNTER_VAL;
// Disable irq directly for few cycles,
// Validation of the new CC value against the COUNTER,
// Setting the new CC value and enabling CC IRQ should be an atomic operation
// Otherwise, there is a possibility to set an invalid CC value because
// the RTC1 keeps running.
// This code is very short 20-38 cycles in the worst case, it shouldn't
// disturb softdevice.
__disable_irq();
uint32_t current_counter = NRF_RTC1->COUNTER;
// If an overflow occur, set the next tick in COUNTER + delta clock cycles
if (is_in_wrapped_range(previous_tick_cc_value, new_compare_value, current_counter) == false) {
new_compare_value = current_counter + delta;
}
NRF_RTC1->CC[1] = new_compare_value;
// set the interrupt of CC channel 1 and reenable IRQs
NRF_RTC1->INTENSET = RTC_INTENSET_COMPARE1_Msk;
__enable_irq();
}
/**
* Initialize alternative hardware timer as RTX kernel timer
* This function is directly called by RTX.
* @note this function shouldn't be called directly.
* @return IRQ number of the alternative hardware timer
*/
int os_tick_init (void)
{
// their is no need to start the LF clock, it is already started by SystemInit.
NVIC_SetPriority(RTC1_IRQn, RTC1_IRQ_PRI);
NVIC_ClearPendingIRQ(RTC1_IRQn);
NVIC_EnableIRQ(RTC1_IRQn);
NRF_RTC1->TASKS_START = 1;
nrf_delay_us(MAX_RTC_TASKS_DELAY);
NRF_RTC1->CC[1] = 0;
clear_tick_interrupt();
register_next_tick();
os_tick_started = true;
return RTC1_IRQn;
}
/**
* Acknowledge the tick interrupt.
* This function is called by the function OS_Tick_Handler of RTX.
* @note this function shouldn't be called directly.
*/
void os_tick_irqack(void)
{
clear_tick_interrupt();
register_next_tick();
}
/**
* Returns the overflow flag of the alternative hardware timer.
* @note This function is exposed by RTX kernel.
* @return 1 if the timer has overflowed and 0 otherwise.
*/
uint32_t os_tick_ovf(void) {
uint32_t current_counter = NRF_RTC1->COUNTER;
uint32_t next_tick_cc_value = NRF_RTC1->CC[1];
return is_in_wrapped_range(previous_tick_cc_value, next_tick_cc_value, current_counter) ? 0 : 1;
}
/**
* Return the value of the alternative hardware timer.
* @note The documentation is not very clear about what is expected as a result,
* is it an ascending counter, a descending one ?
* None of this is specified.
* The default systick is a descending counter and this function return values in
* descending order, even if the internal counter used is an ascending one.
* @return the value of the alternative hardware timer.
*/
uint32_t os_tick_val(void) {
uint32_t current_counter = NRF_RTC1->COUNTER;
uint32_t next_tick_cc_value = NRF_RTC1->CC[1];
// do not use os_tick_ovf because its counter value can be different
if(is_in_wrapped_range(previous_tick_cc_value, next_tick_cc_value, current_counter)) {
if (next_tick_cc_value > previous_tick_cc_value) {
return next_tick_cc_value - current_counter;
} else if(current_counter <= next_tick_cc_value) {
return next_tick_cc_value - current_counter;
} else {
return next_tick_cc_value + (MAX_RTC_COUNTER_VAL - current_counter);
}
} else {
// use (os_trv + 1) has the base step, can be totally inacurate ...
uint32_t clock_cycles_by_tick = os_trv + 1;
// if current counter has wrap arround, add the limit to it.
if (current_counter < next_tick_cc_value) {
current_counter = current_counter + MAX_RTC_COUNTER_VAL;
}
return clock_cycles_by_tick - ((current_counter - next_tick_cc_value) % clock_cycles_by_tick);
}
}
#endif // DEVICE_USTICKER

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@ -1,81 +0,0 @@
/*
* Copyright (c) 2013 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef MBED_PERIPHERALNAMES_H
#define MBED_PERIPHERALNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
#define STDIO_UART_TX TX_PIN_NUMBER
#define STDIO_UART_RX RX_PIN_NUMBER
#define STDIO_UART UART_0
typedef enum {
UART_0 = (int)NRF_UART0_BASE
} UARTName;
typedef enum {
SPI_0 = (int)NRF_SPI0_BASE,
SPI_1 = (int)NRF_SPI1_BASE,
SPIS = (int)NRF_SPIS1_BASE
} SPIName;
typedef enum {
PWM_1 = 0,
PWM_2
} PWMName;
typedef enum {
I2C_0 = (int)NRF_TWI0_BASE,
I2C_1 = (int)NRF_TWI1_BASE
} I2CName;
typedef enum {
ADC0_0 = (int)NRF_ADC_BASE
} ADCName;
#ifdef __cplusplus
}
#endif
#endif

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/*
* Copyright (c) 2013 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef MBED_PORTNAMES_H
#define MBED_PORTNAMES_H
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
Port0 = 0 //GPIO pins 0-31
} PortName;
#ifdef __cplusplus
}
#endif
#endif

199
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_NRF51_DK/PinNames.h
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@ -1,199 +0,0 @@
/*
* Copyright (c) 2013 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
PIN_INPUT,
PIN_OUTPUT
} PinDirection;
typedef enum {
p0 = 0,
p1 = 1,
p2 = 2,
p3 = 3,
p4 = 4,
p5 = 5,
p6 = 6,
p7 = 7,
p8 = 8,
p9 = 9,
p10 = 10,
p11 = 11,
p12 = 12,
p13 = 13,
p14 = 14,
p15 = 15,
p16 = 16,
p17 = 17,
p18 = 18,
p19 = 19,
p20 = 20,
p21 = 21,
p22 = 22,
p23 = 23,
p24 = 24,
p25 = 25,
p26 = 26,
p27 = 27,
p28 = 28,
p29 = 29,
p30 = 30,
P0_0 = p0,
P0_1 = p1,
P0_2 = p2,
P0_3 = p3,
P0_4 = p4,
P0_5 = p5,
P0_6 = p6,
P0_7 = p7,
P0_8 = p8,
P0_9 = p9,
P0_10 = p10,
P0_11 = p11,
P0_12 = p12,
P0_13 = p13,
P0_14 = p14,
P0_15 = p15,
P0_16 = p16,
P0_17 = p17,
P0_18 = p18,
P0_19 = p19,
P0_20 = p20,
P0_21 = p21,
P0_22 = p22,
P0_23 = p23,
P0_24 = p24,
P0_25 = p25,
P0_26 = p26,
P0_27 = p27,
P0_28 = p28,
P0_29 = p29,
P0_30 = p30,
LED1 = p21,
LED2 = p22,
LED3 = p23,
LED4 = p24,
BUTTON1 = p17,
BUTTON2 = p18,
BUTTON3 = p19,
BUTTON4 = p20,
RX_PIN_NUMBER = p11,
TX_PIN_NUMBER = p9,
CTS_PIN_NUMBER = p10,
RTS_PIN_NUMBER = p8,
// mBed interface Pins
USBTX = TX_PIN_NUMBER,
USBRX = RX_PIN_NUMBER,
SPI_PSELMOSI0 = p25,
SPI_PSELMISO0 = p28,
SPI_PSELSS0 = p24,
SPI_PSELSCK0 = p29,
SPI_PSELMOSI1 = p13,
SPI_PSELMISO1 = p14,
SPI_PSELSS1 = p12,
SPI_PSELSCK1 = p15,
SPIS_PSELMOSI = p13,
SPIS_PSELMISO = p14,
SPIS_PSELSS = p12,
SPIS_PSELSCK = p15,
I2C_SDA0 = p30,
I2C_SCL0 = p7,
D0 = p12,
D1 = p13,
D2 = p14,
D3 = p15,
D4 = p16,
D5 = p17,
D6 = p18,
D7 = p19,
D8 = p20,
D9 = p23,
D10 = p24,
D11 = p25,
D12 = p28,
D13 = p29,
D14 = p30,
D15 = p7,
A0 = p1,
A1 = p2,
A2 = p3,
A3 = p4,
A4 = p5,
A5 = p6,
// Not connected
NC = (int)0xFFFFFFFF
} PinName;
typedef enum {
PullNone = 0,
PullDown = 1,
PullUp = 3,
PullDefault = PullUp
} PinMode;
#ifdef __cplusplus
}
#endif
#endif

38
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/TARGET_NRF51_DK/device.h
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@ -1,38 +0,0 @@
// The 'features' section in 'target.json' is now used to create the device's hardware preprocessor switches.
// Check the 'features' section of the target description in 'targets.json' for more details.
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_DEVICE_H
#define MBED_DEVICE_H
#include "objects.h"
#endif

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targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/analogin_api.c
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@ -1,94 +0,0 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "mbed_assert.h"
#include "analogin_api.h"
#include "cmsis.h"
#include "pinmap.h"
#include "nrf_drv_adc.h"
#if DEVICE_ANALOGIN
#define ADC_10BIT_RANGE 0x3FF
#define ADC_RANGE ADC_10BIT_RANGE
static const PinMap PinMap_ADC[] = {
{p1, ADC0_0, 4},
{p2, ADC0_0, 8},
{p3, ADC0_0, 16},
{p4, ADC0_0, 32},
{p5, ADC0_0, 64},
{p6, ADC0_0, 128},
{p26, ADC0_0, 1},
{p27, ADC0_0, 2},
{NC, NC, 0}
};
void ADC_IRQHandler(void); // export IRQ handler from nrf_drv_adc.c
void analogin_init(analogin_t *obj, PinName pin)
{
obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
MBED_ASSERT(obj->adc != (ADCName)NC);
uint32_t pinFunc = pinmap_function(pin, PinMap_ADC);
MBED_ASSERT(pinFunc != (uint32_t)NC);
obj->adc_pin = pinFunc;
NVIC_SetVector(ADC_IRQn, (uint32_t)ADC_IRQHandler);
ret_code_t ret_code;
// p_config, event_handler
ret_code = nrf_drv_adc_init(NULL , NULL); // select blocking mode
MBED_ASSERT((ret_code == NRF_SUCCESS) || (ret_code == NRF_ERROR_INVALID_STATE)); //NRF_ERROR_INVALID_STATE expected for multiple channels used.
}
uint16_t analogin_read_u16(analogin_t *obj)
{
nrf_adc_value_t adc_value;
nrf_drv_adc_channel_t adc_channel;
// initialization by assigment because IAR dosen't support variable initializer in declaration statement.
adc_channel.config.config.resolution = NRF_ADC_CONFIG_RES_10BIT;
adc_channel.config.config.input = NRF_ADC_CONFIG_SCALING_INPUT_ONE_THIRD;
adc_channel.config.config.reference = NRF_ADC_CONFIG_REF_VBG;
adc_channel.config.config.ain = (obj->adc_pin);
adc_channel.p_next = NULL;
ret_code_t ret_code;
ret_code = nrf_drv_adc_sample_convert( &adc_channel, &adc_value);
MBED_ASSERT(ret_code == NRF_SUCCESS);
return adc_value;
}
float analogin_read(analogin_t *obj)
{
uint16_t value = analogin_read_u16(obj);
return (float)value * (1.0f / (float)ADC_RANGE);
}
const PinMap *analogin_pinmap()
{
return PinMap_ADC;
}
#endif // DEVICE_ANALOGIN

189
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_16K/startup_nRF51822.S
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@ -1,189 +0,0 @@
; mbed Microcontroller Library
; Copyright (c) 2013 Nordic Semiconductor.
;Licensed under the Apache License, Version 2.0 (the "License");
;you may not use this file except in compliance with the License.
;You may obtain a copy of the License at
;http://www.apache.org/licenses/LICENSE-2.0
;Unless required by applicable law or agreed to in writing, software
;distributed under the License is distributed on an "AS IS" BASIS,
;WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
;See the License for the specific language governing permissions and
;limitations under the License.
; Description message
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD POWER_CLOCK_IRQHandler ;POWER_CLOCK
DCD RADIO_IRQHandler ;RADIO
DCD UART0_IRQHandler_v ;UART0
DCD SPI0_TWI0_IRQHandler_v ;SPI0_TWI0
DCD SPI1_TWI1_IRQHandler_v ;SPI1_TWI1
DCD 0 ;Reserved
DCD GPIOTE_IRQHandler_v ;GPIOTE
DCD ADC_IRQHandler_v ;ADC
DCD TIMER0_IRQHandler ;TIMER0
DCD TIMER1_IRQHandler_v ;TIMER1
DCD TIMER2_IRQHandler_v ;TIMER2
DCD RTC0_IRQHandler ;RTC0
DCD TEMP_IRQHandler ;TEMP
DCD RNG_IRQHandler ;RNG
DCD ECB_IRQHandler ;ECB
DCD CCM_AAR_IRQHandler ;CCM_AAR
DCD WDT_IRQHandler_v ;WDT
DCD RTC1_IRQHandler_v ;RTC1
DCD QDEC_IRQHandler_v ;QDEC
DCD LPCOMP_IRQHandler_v ;LPCOMP_COMP
DCD SWI0_IRQHandler_v ;SWI0
DCD SWI1_IRQHandler_v ;SWI1
DCD SWI2_IRQHandler_v ;SWI2
DCD SWI3_IRQHandler_v ;SWI3
DCD SWI4_IRQHandler ;SWI4
DCD SWI5_IRQHandler ;SWI5
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset Handler
NRF_POWER_RAMON_ADDRESS EQU 0x40000524 ; NRF_POWER->RAMON address
NRF_POWER_RAMON_RAMxON_ONMODE_Msk EQU 0xF ; All RAM blocks on in onmode bit mask
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
IMPORT nrf_reloc_vector_table
LDR R0, =NRF_POWER_RAMON_ADDRESS
LDR R2, [R0]
MOVS R1, #NRF_POWER_RAMON_RAMxON_ONMODE_Msk
ORRS R2, R2, R1
STR R2, [R0]
LDR R0, =SystemInit
BLX R0
LDR R0, =nrf_reloc_vector_table
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT POWER_CLOCK_IRQHandler [WEAK]
EXPORT RADIO_IRQHandler [WEAK]
EXPORT UART0_IRQHandler_v [WEAK]
EXPORT SPI0_TWI0_IRQHandler_v [WEAK]
EXPORT SPI1_TWI1_IRQHandler_v [WEAK]
EXPORT GPIOTE_IRQHandler_v [WEAK]
EXPORT ADC_IRQHandler_v [WEAK]
EXPORT TIMER0_IRQHandler [WEAK]
EXPORT TIMER1_IRQHandler_v [WEAK]
EXPORT TIMER2_IRQHandler_v [WEAK]
EXPORT RTC0_IRQHandler [WEAK]
EXPORT TEMP_IRQHandler [WEAK]
EXPORT RNG_IRQHandler [WEAK]
EXPORT ECB_IRQHandler [WEAK]
EXPORT CCM_AAR_IRQHandler [WEAK]
EXPORT WDT_IRQHandler_v [WEAK]
EXPORT RTC1_IRQHandler_v [WEAK]
EXPORT QDEC_IRQHandler_v [WEAK]
EXPORT LPCOMP_IRQHandler_v [WEAK]
EXPORT SWI0_IRQHandler_v [WEAK]
EXPORT SWI1_IRQHandler_v [WEAK]
EXPORT SWI2_IRQHandler_v [WEAK]
EXPORT SWI3_IRQHandler_v [WEAK]
EXPORT SWI4_IRQHandler [WEAK]
EXPORT SWI5_IRQHandler [WEAK]
POWER_CLOCK_IRQHandler
RADIO_IRQHandler
UART0_IRQHandler_v
SPI0_TWI0_IRQHandler_v
SPI1_TWI1_IRQHandler_v
GPIOTE_IRQHandler_v
ADC_IRQHandler_v
TIMER0_IRQHandler
TIMER1_IRQHandler_v
TIMER2_IRQHandler_v
RTC0_IRQHandler
TEMP_IRQHandler
RNG_IRQHandler
ECB_IRQHandler
CCM_AAR_IRQHandler
WDT_IRQHandler_v
RTC1_IRQHandler_v
QDEC_IRQHandler_v
LPCOMP_IRQHandler_v
SWI0_IRQHandler_v
SWI1_IRQHandler_v
SWI2_IRQHandler_v
SWI3_IRQHandler_v
SWI4_IRQHandler
SWI5_IRQHandler
B .
ENDP
ALIGN
END

33
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_32K/nRF51822.sct
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@ -1,33 +0,0 @@
#! armcc -E
;WITHOUT SOFTDEVICE:
;LR_IROM1 0x00000000 0x00040000 {
; ER_IROM1 0x00000000 0x00040000 {
; *.o (RESET, +First)
; *(InRoot$$Sections)
; .ANY (+RO)
; }
; RW_IRAM1 0x20000000 0x00008000 {
; .ANY (+RW +ZI)
; }
;}
;
;WITH SOFTDEVICE:
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x1B000 0x0025000 {
ER_IROM1 0x1B000 0x0025000 {
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM0 0x20002ef8 UNINIT 0x000000c0 { ;no init section
*(*noinit)
}
RW_IRAM1 0x20002FB8 0x00005048 {
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x20002FB8+0x00005048 EMPTY -Stack_Size { ; Stack region growing down
}
}

198
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_32K/startup_nRF51822.S
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@ -1,198 +0,0 @@
; mbed Microcontroller Library
; Copyright (c) 2013 Nordic Semiconductor.
;Licensed under the Apache License, Version 2.0 (the "License");
;you may not use this file except in compliance with the License.
;You may obtain a copy of the License at
;http://www.apache.org/licenses/LICENSE-2.0
;Unless required by applicable law or agreed to in writing, software
;distributed under the License is distributed on an "AS IS" BASIS,
;WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
;See the License for the specific language governing permissions and
;limitations under the License.
; Description message
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD POWER_CLOCK_IRQHandler ;POWER_CLOCK
DCD RADIO_IRQHandler ;RADIO
DCD UART0_IRQHandler_v ;UART0
DCD SPI0_TWI0_IRQHandler_v ;SPI0_TWI0
DCD SPI1_TWI1_IRQHandler_v ;SPI1_TWI1
DCD 0 ;Reserved
DCD GPIOTE_IRQHandler_v ;GPIOTE
DCD ADC_IRQHandler_v ;ADC
DCD TIMER0_IRQHandler ;TIMER0
DCD TIMER1_IRQHandler_v ;TIMER1
DCD TIMER2_IRQHandler_v ;TIMER2
DCD RTC0_IRQHandler ;RTC0
DCD TEMP_IRQHandler ;TEMP
DCD RNG_IRQHandler ;RNG
DCD ECB_IRQHandler ;ECB
DCD CCM_AAR_IRQHandler ;CCM_AAR
DCD WDT_IRQHandler_v ;WDT
DCD RTC1_IRQHandler_v ;RTC1
DCD QDEC_IRQHandler_v ;QDEC
DCD LPCOMP_IRQHandler_v ;LPCOMP_COMP
DCD SWI0_IRQHandler_v ;SWI0
DCD SWI1_IRQHandler_v ;SWI1
DCD SWI2_IRQHandler_v ;SWI2
DCD SWI3_IRQHandler_v ;SWI3
DCD SWI4_IRQHandler ;SWI4
DCD SWI5_IRQHandler ;SWI5
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset Handler
NRF_POWER_RAMON_ADDRESS EQU 0x40000524 ; NRF_POWER->RAMON address
NRF_POWER_RAMONB_ADDRESS EQU 0x40000554 ; NRF_POWER->RAMONB address
NRF_POWER_RAMONx_RAMxON_ONMODE_Msk EQU 0x3 ; All RAM blocks on in onmode bit mask
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
IMPORT nrf_reloc_vector_table
MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
LDR R0, =NRF_POWER_RAMON_ADDRESS
LDR R2, [R0]
ORRS R2, R2, R1
STR R2, [R0]
LDR R0, =NRF_POWER_RAMONB_ADDRESS
LDR R2, [R0]
ORRS R2, R2, R1
STR R2, [R0]
LDR R0, =SystemInit
BLX R0
LDR R0, =nrf_reloc_vector_table
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT POWER_CLOCK_IRQHandler [WEAK]
EXPORT RADIO_IRQHandler [WEAK]
EXPORT UART0_IRQHandler_v [WEAK]
EXPORT SPI0_TWI0_IRQHandler_v [WEAK]
EXPORT SPI1_TWI1_IRQHandler_v [WEAK]
EXPORT GPIOTE_IRQHandler_v [WEAK]
EXPORT ADC_IRQHandler_v [WEAK]
EXPORT TIMER0_IRQHandler [WEAK]
EXPORT TIMER1_IRQHandler_v [WEAK]
EXPORT TIMER2_IRQHandler_v [WEAK]
EXPORT RTC0_IRQHandler [WEAK]
EXPORT TEMP_IRQHandler [WEAK]
EXPORT RNG_IRQHandler [WEAK]
EXPORT ECB_IRQHandler [WEAK]
EXPORT CCM_AAR_IRQHandler [WEAK]
EXPORT WDT_IRQHandler_v [WEAK]
EXPORT RTC1_IRQHandler_v [WEAK]
EXPORT QDEC_IRQHandler_v [WEAK]
EXPORT LPCOMP_IRQHandler_v [WEAK]
EXPORT SWI0_IRQHandler_v [WEAK]
EXPORT SWI1_IRQHandler_v [WEAK]
EXPORT SWI2_IRQHandler_v [WEAK]
EXPORT SWI3_IRQHandler_v [WEAK]
EXPORT SWI4_IRQHandler [WEAK]
EXPORT SWI5_IRQHandler [WEAK]
POWER_CLOCK_IRQHandler
RADIO_IRQHandler
UART0_IRQHandler_v
SPI0_TWI0_IRQHandler_v
SPI1_TWI1_IRQHandler_v
GPIOTE_IRQHandler_v
ADC_IRQHandler_v
TIMER0_IRQHandler
TIMER1_IRQHandler_v
TIMER2_IRQHandler_v
RTC0_IRQHandler
TEMP_IRQHandler
RNG_IRQHandler
ECB_IRQHandler
CCM_AAR_IRQHandler
WDT_IRQHandler_v
RTC1_IRQHandler_v
QDEC_IRQHandler_v
LPCOMP_IRQHandler_v
SWI0_IRQHandler_v
SWI1_IRQHandler_v
SWI2_IRQHandler_v
SWI3_IRQHandler_v
SWI4_IRQHandler
SWI5_IRQHandler
B .
ENDP
ALIGN
END

33
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S110/nRF51822.sct
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#! armcc -E
;WITHOUT SOFTDEVICE:
;LR_IROM1 0x00000000 0x00040000 {
; ER_IROM1 0x00000000 0x00040000 {
; *.o (RESET, +First)
; *(InRoot$$Sections)
; .ANY (+RO)
; }
; RW_IRAM1 0x20000000 0x00004000 {
; .ANY (+RW +ZI)
; }
;}
;
;WITH SOFTDEVICE:
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x18000 0x0028000 {
ER_IROM1 0x18000 0x0028000 {
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM0 0x20002000 UNINIT 0x000000c0 { ;no init section
*(*noinit)
}
RW_IRAM1 0x200020C0 0x00001F40 {
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x200020C0+0x00001F40 EMPTY -Stack_Size { ; Stack region growing down
}
}

33
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S130/nRF51822.sct
View File

@ -1,33 +0,0 @@
#! armcc -E
;WITHOUT SOFTDEVICE:
;LR_IROM1 0x00000000 0x00040000 {
; ER_IROM1 0x00000000 0x00040000 {
; *.o (RESET, +First)
; *(InRoot$$Sections)
; .ANY (+RO)
; }
; RW_IRAM1 0x20000000 0x00004000 {
; .ANY (+RW +ZI)
; }
;}
;
;WITH SOFTDEVICE:
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x0001B000 0x0025000 {
ER_IROM1 0x0001B000 0x0025000 {
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM0 0x20002ef8 UNINIT 0x000000c0 { ;no init section
*(*noinit)
}
RW_IRAM1 0x20002FB8 0x00001048 {
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x20002FB8+0x00001048 EMPTY -Stack_Size { ; Stack region growing down
}
}

171
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_32K/NRF51822.ld
View File

@ -1,171 +0,0 @@
/* Linker script to configure memory regions. */
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x800
#endif
MEMORY
{
FLASH (rx) : ORIGIN = 0x0001B000, LENGTH = 0x25000
RAM (rwx) : ORIGIN = 0x20002ef8, LENGTH = 0x5108
}
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
*
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
* __etext
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __end__
* end
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
*/
ENTRY(Reset_Handler)
SECTIONS
{
.text :
{
KEEP(*(.Vectors))
*(.text*)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
*(.rodata*)
KEEP(*(.eh_frame*))
} > FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
__exidx_end = .;
__etext = .;
.data : AT (__etext)
{
__data_start__ = .;
*(vtable)
*(.data*)
. = ALIGN(8);
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(8);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(8);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
. = ALIGN(8);
PROVIDE(__start_fs_data = .);
KEEP(*(.fs_data))
PROVIDE(__stop_fs_data = .);
*(.jcr)
. = ALIGN(8);
/* All data end */
__data_end__ = .;
} > RAM
__edata = .;
.noinit :
{
PROVIDE(__start_noinit = .);
KEEP(*(.noinit))
PROVIDE(__stop_noinit = .);
} > RAM
.bss :
{
. = ALIGN(8);
__bss_start__ = .;
*(.bss*)
*(COMMON)
. = ALIGN(8);
__bss_end__ = .;
} > RAM
.heap (NOLOAD):
{
__end__ = .;
end = __end__;
__HeapBase = .;
*(.heap*)
. = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
__HeapLimit = .;
} > RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy (NOLOAD):
{
*(.stack*)
} > RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
}

157
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S110/NRF51822.ld
View File

@ -1,157 +0,0 @@
/* Linker script to configure memory regions. */
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x800
#endif
MEMORY
{
FLASH (rx) : ORIGIN = 0x00018000, LENGTH = 0x28000
RAM (rwx) : ORIGIN = 0x20002000, LENGTH = 0x2000
}
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
*
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
* __etext
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __end__
* end
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
*/
ENTRY(Reset_Handler)
SECTIONS
{
.text :
{
KEEP(*(.Vectors))
*(.text*)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
*(.rodata*)
KEEP(*(.eh_frame*))
} > FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
__exidx_end = .;
__etext = .;
.data : AT (__etext)
{
__data_start__ = .;
*(vtable)
*(.data*)
. = ALIGN(8);
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(8);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(8);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
*(.jcr)
. = ALIGN(8);
/* All data end */
__data_end__ = .;
} > RAM
.bss :
{
. = ALIGN(8);
__bss_start__ = .;
*(.bss*)
*(COMMON)
. = ALIGN(8);
__bss_end__ = .;
} > RAM
.heap (NOLOAD):
{
__end__ = .;
end = __end__;
__HeapBase = .;
*(.heap*)
. = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
__HeapLimit = .;
} > RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy (NOLOAD):
{
*(.stack*)
} > RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
}

169
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S130/NRF51822.ld
View File

@ -1,169 +0,0 @@
/* Linker script to configure memory regions. */
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x800
#endif
MEMORY
{
FLASH (rx) : ORIGIN = 0x0001B000, LENGTH = 0x25000
RAM (rwx) : ORIGIN = 0x20002ef8, LENGTH = 0x1108
}
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
*
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
* __etext
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __end__
* end
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
*/
ENTRY(Reset_Handler)
SECTIONS
{
.text :
{
KEEP(*(.Vectors))
*(.text*)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
*(.rodata*)
KEEP(*(.eh_frame*))
} > FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
__exidx_end = .;
__etext = .;
.data : AT (__etext)
{
__data_start__ = .;
*(vtable)
*(.data*)
. = ALIGN(8);
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(8);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(8);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
. = ALIGN(8);
PROVIDE(__start_fs_data = .);
KEEP(*(.fs_data))
PROVIDE(__stop_fs_data = .);
*(.jcr)
. = ALIGN(8);
/* All data end */
__data_end__ = .;
} > RAM
.noinit :
{
PROVIDE(__start_noinit = .);
KEEP(*(.noinit))
PROVIDE(__stop_noinit = .);
} > RAM
.bss :
{
. = ALIGN(8);
__bss_start__ = .;
*(.bss*)
*(COMMON)
. = ALIGN(8);
__bss_end__ = .;
} > RAM
.heap (NOLOAD):
{
__end__ = .;
end = __end__;
__HeapBase = .;
*(.heap*)
. = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
__HeapLimit = .;
} > RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy (NOLOAD):
{
*(.stack*)
} > RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
}

253
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_GCC_ARM/startup_NRF51822.S
View File

@ -1,253 +0,0 @@
/*
* Copyright (c) 2013 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
NOTE: Template files (including this one) are application specific and therefore
expected to be copied into the application project folder prior to its use!
*/
.syntax unified
.arch armv6-m
.section .stack
.align 3
.globl __StackTop
.globl __StackLimit
__StackLimit:
.size __StackLimit, . - __StackLimit
__StackTop:
.size __StackTop, . - __StackTop
.section .heap
.align 3
.globl __HeapBase
.globl __HeapLimit
.section .Vectors
.align 2
.globl __Vectors
__Vectors:
.long __StackTop /* Top of Stack */
.long Reset_Handler /* Reset Handler */
.long NMI_Handler /* NMI Handler */
.long HardFault_Handler /* Hard Fault Handler */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long SVC_Handler /* SVCall Handler */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long PendSV_Handler /* PendSV Handler */
.long SysTick_Handler /* SysTick Handler */
/* External Interrupts */
.long POWER_CLOCK_IRQHandler /*POWER_CLOCK */
.long RADIO_IRQHandler /*RADIO */
.long UART0_IRQHandler_v /*UART0 */
.long SPI0_TWI0_IRQHandler_v /*SPI0_TWI0 */
.long SPI1_TWI1_IRQHandler_v /*SPI1_TWI1 */
.long 0 /*Reserved */
.long GPIOTE_IRQHandler_v /*GPIOTE */
.long ADC_IRQHandler_v /*ADC */
.long TIMER0_IRQHandler /*TIMER0 */
.long TIMER1_IRQHandler_v /*TIMER1 */
.long TIMER2_IRQHandler_v /*TIMER2 */
.long RTC0_IRQHandler /*RTC0 */
.long TEMP_IRQHandler /*TEMP */
.long RNG_IRQHandler /*RNG */
.long ECB_IRQHandler /*ECB */
.long CCM_AAR_IRQHandler /*CCM_AAR */
.long WDT_IRQHandler_v /*WDT */
.long RTC1_IRQHandler_v /*RTC1 */
.long QDEC_IRQHandler_v /*QDEC */
.long LPCOMP_IRQHandler_v /*LPCOMP */
.long SWI0_IRQHandler_v /*SWI0 */
.long SWI1_IRQHandler_v /*SWI1 */
.long SWI2_IRQHandler_v /*SWI2 */
.long SWI3_IRQHandler_v /*SWI3 */
.long SWI4_IRQHandler /*SWI4 */
.long SWI5_IRQHandler /*SWI5 */
.size __Vectors, . - __Vectors
/* Reset Handler */
.equ NRF_POWER_RAMON_ADDRESS, 0x40000524
.equ NRF_POWER_RAMONB_ADDRESS, 0x40000554
.equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3
.text
.thumb
.thumb_func
.align 1
.globl Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
.fnstart
MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
LDR R0, =NRF_POWER_RAMON_ADDRESS
LDR R2, [R0]
ORRS R2, R1
STR R2, [R0]
LDR R0, =NRF_POWER_RAMONB_ADDRESS
LDR R2, [R0]
ORRS R2, R1
STR R2, [R0]
/* Loop to copy data from read only memory to RAM. The ranges
* of copy from/to are specified by following symbols evaluated in
* linker script.
* __etext: End of code section, i.e., begin of data sections to copy from.
* __data_start__/__data_end__: RAM address range that data should be
* copied to. Both must be aligned to 4 bytes boundary. */
ldr r1, =__etext
ldr r2, =__data_start__
ldr r3, =__data_end__
subs r3, r2
ble .LC0
.LC1:
subs r3, 4
ldr r0, [r1,r3]
str r0, [r2,r3]
bgt .LC1
.LC0:
LDR R0, =SystemInit
BLX R0
LDR R0, =nrf_reloc_vector_table
BLX R0
LDR R0, =_start
BX R0
.pool
.cantunwind
.fnend
.size Reset_Handler,.-Reset_Handler
.section ".text"
/* Dummy Exception Handlers (infinite loops which can be modified) */
.weak NMI_Handler
.type NMI_Handler, %function
NMI_Handler:
B .
.size NMI_Handler, . - NMI_Handler
.weak HardFault_Handler
.type HardFault_Handler, %function
HardFault_Handler:
B .
.size HardFault_Handler, . - HardFault_Handler
.weak SVC_Handler
.type SVC_Handler, %function
SVC_Handler:
B .
.size SVC_Handler, . - SVC_Handler
.weak PendSV_Handler
.type PendSV_Handler, %function
PendSV_Handler:
B .
.size PendSV_Handler, . - PendSV_Handler
.weak SysTick_Handler
.type SysTick_Handler, %function
SysTick_Handler:
B .
.size SysTick_Handler, . - SysTick_Handler
/* IRQ Handlers */
.globl Default_Handler
.type Default_Handler, %function
Default_Handler:
B .
.size Default_Handler, . - Default_Handler
.macro IRQ handler
.weak \handler
.set \handler, Default_Handler
.endm
IRQ POWER_CLOCK_IRQHandler /* restricted */
IRQ RADIO_IRQHandler /* blocked */
IRQ UART0_IRQHandler_v
IRQ SPI0_TWI0_IRQHandler_v
IRQ SPI1_TWI1_IRQHandler_v
IRQ GPIOTE_IRQHandler_v
IRQ ADC_IRQHandler_v
IRQ TIMER0_IRQHandler /* blocked */
IRQ TIMER1_IRQHandler_v
IRQ TIMER2_IRQHandler_v
IRQ RTC0_IRQHandler /* blocked */
IRQ TEMP_IRQHandler /* restricted */
IRQ RNG_IRQHandler /* restricted */
IRQ ECB_IRQHandler /* restricted */
IRQ CCM_AAR_IRQHandler /* blocked */
IRQ WDT_IRQHandler_v
IRQ RTC1_IRQHandler_v
IRQ QDEC_IRQHandler_v
IRQ LPCOMP_IRQHandler_v
IRQ SWI0_IRQHandler_v
IRQ SWI1_IRQHandler_v /* restricted for Radio Notification */
IRQ SWI2_IRQHandler_v /* blocked for SoftDevice Event */
IRQ SWI3_IRQHandler_v
IRQ SWI4_IRQHandler /* blocked */
IRQ SWI5_IRQHandler /* blocked */
.end

48
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_16K/nRF51822_QFAA.icf
View File

@ -1,48 +0,0 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x0001b000;
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x0001b0c0;
define symbol __ICFEDIT_region_ROM_end__ = 0x0003FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20002ef8;
define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
export symbol __ICFEDIT_region_RAM_start__;
export symbol __ICFEDIT_region_RAM_end__;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0x900;
/**** End of ICF editor section. ###ICF###*/
define symbol __code_start_soft_device__ = 0x0;
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
keep { section .intvec };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite,
block HEAP,
block CSTACK };
/*This is used for mbed applications build inside the Embedded workbench
Applications build with the python scritps use a hex merge so need to merge it
inside the linker. The linker can only use binary files so the hex merge is not possible
through the linker. That is why a binary is used instead of a hex image for the embedded project.
*/
if(isdefinedsymbol(SOFT_DEVICE_BIN))
{
place at address mem:__code_start_soft_device__ { section .noinit_softdevice };
}

48
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf
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@ -1,48 +0,0 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __ICFEDIT_intvec_start__ = 0x0001b000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x0001b0c0;
define symbol __ICFEDIT_region_ROM_end__ = 0x0003FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20002ef8;
define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
export symbol __ICFEDIT_region_RAM_start__;
export symbol __ICFEDIT_region_RAM_end__;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0x1800;
/**** End of ICF editor section. ###ICF###*/
define symbol __code_start_soft_device__ = 0x0;
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
keep { section .intvec };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite,
block HEAP,
block CSTACK };
/*This is used for mbed applications build inside the Embedded workbench
Applications build with the python scritps use a hex merge so need to merge it
inside the linker. The linker can only use binary files so the hex merge is not possible
through the linker. That is why a binary is used instead of a hex image for the embedded project.
*/
if(isdefinedsymbol(SOFT_DEVICE_BIN))
{
place at address mem:__code_start_soft_device__ { section .noinit_softdevice };
}

234
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/startup_NRF51822_IAR.S
View File

@ -1,234 +0,0 @@
;; Copyright (c) 2009 Nordic Semiconductor. All Rights Reserved.
;; The information contained herein is confidential property of Nordic
;; Semiconductor ASA.Terms and conditions of usage are described in detail
;; in NORDIC SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
;; Licensees are granted free, non-transferable use of the information. NO
;; WARRANTY of ANY KIND is provided. This heading must NOT be removed from
;; the file.
;; Description message
MODULE ?cstartup
;; Stack size default : 1024
;; Heap size default : 2048
;; Forward declaration of sections.
SECTION CSTACK:DATA:NOROOT(3)
SECTION .intvec:CODE:NOROOT(2)
EXTERN __iar_program_start
EXTERN SystemInit
EXTERN nrf_reloc_vector_table
PUBLIC __vector_table
PUBLIC __Vectors
PUBLIC __Vectors_End
PUBLIC __Vectors_Size
DATA
__vector_table
DCD sfe(CSTACK)
DCD Reset_Handler
DCD NMI_Handler
DCD HardFault_Handler
DCD 0
DCD 0
DCD 0
;__vector_table_0x1c
DCD 0
DCD 0
DCD 0
DCD 0
DCD SVC_Handler
DCD 0
DCD 0
DCD PendSV_Handler
DCD SysTick_Handler
; External Interrupts
DCD POWER_CLOCK_IRQHandler ;POWER_CLOCK
DCD RADIO_IRQHandler ;RADIO
DCD UART0_IRQHandler_v ;UART0
DCD SPI0_TWI0_IRQHandler_v ;SPI0_TWI0
DCD SPI1_TWI1_IRQHandler_v ;SPI1_TWI1
DCD 0 ;Reserved
DCD GPIOTE_IRQHandler_v ;GPIOTE
DCD ADC_IRQHandler_v ;ADC
DCD TIMER0_IRQHandler ;TIMER0
DCD TIMER1_IRQHandler_v ;TIMER1
DCD TIMER2_IRQHandler_v ;TIMER2
DCD RTC0_IRQHandler ;RTC0
DCD TEMP_IRQHandler ;TEMP
DCD RNG_IRQHandler ;RNG
DCD ECB_IRQHandler ;ECB
DCD CCM_AAR_IRQHandler ;CCM_AAR
DCD WDT_IRQHandler_v ;WDT
DCD RTC1_IRQHandler_v ;RTC1
DCD QDEC_IRQHandler_v ;QDEC
DCD LPCOMP_IRQHandler_v ;LPCOMP_COMP
DCD SWI0_IRQHandler ;SWI0
DCD SWI1_IRQHandler_v ;SWI1
DCD SWI2_IRQHandler_v ;SWI2
DCD SWI3_IRQHandler_v ;SWI3
DCD SWI4_IRQHandler ;SWI4
DCD SWI5_IRQHandler ;SWI5
__Vectors_End
__Vectors EQU __vector_table
__Vectors_Size EQU __Vectors_End - __Vectors
NRF_POWER_RAMON_ADDRESS EQU 0x40000524 ; NRF_POWER->RAMON address
NRF_POWER_RAMON_RAMxON_ONMODE_Msk EQU 0xF ; All RAM blocks on in onmode bit mask
; Default handlers.
THUMB
PUBWEAK Reset_Handler
SECTION .text:CODE:REORDER:NOROOT(2)
Reset_Handler
LDR R0, =NRF_POWER_RAMON_ADDRESS
LDR R2, [R0]
MOVS R1, #NRF_POWER_RAMON_RAMxON_ONMODE_Msk
ORRS R2, R2, R1
STR R2, [R0]
LDR R0, =SystemInit
BLX R0
LDR R0, =nrf_reloc_vector_table
BLX R0
LDR R0, =__iar_program_start
BX R0
; Dummy exception handlers
PUBWEAK NMI_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
NMI_Handler
B .
PUBWEAK HardFault_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
HardFault_Handler
B .
PUBWEAK SVC_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
SVC_Handler
B .
PUBWEAK PendSV_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
PendSV_Handler
B .
PUBWEAK SysTick_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
SysTick_Handler
B .
; Dummy interrupt handlers
PUBWEAK POWER_CLOCK_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
POWER_CLOCK_IRQHandler
B .
PUBWEAK RADIO_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
RADIO_IRQHandler
B .
PUBWEAK UART0_IRQHandler_v
SECTION .text:CODE:REORDER:NOROOT(1)
UART0_IRQHandler_v
B .
PUBWEAK SPI0_TWI0_IRQHandler_v
SECTION .text:CODE:REORDER:NOROOT(1)
SPI0_TWI0_IRQHandler_v
B .
PUBWEAK SPI1_TWI1_IRQHandler_v
SECTION .text:CODE:REORDER:NOROOT(1)
SPI1_TWI1_IRQHandler_v
B .
PUBWEAK GPIOTE_IRQHandler_v
SECTION .text:CODE:REORDER:NOROOT(1)
GPIOTE_IRQHandler_v
B .
PUBWEAK ADC_IRQHandler_v
SECTION .text:CODE:REORDER:NOROOT(1)
ADC_IRQHandler_v
B .
PUBWEAK TIMER0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TIMER0_IRQHandler
B .
PUBWEAK TIMER1_IRQHandler_v
SECTION .text:CODE:REORDER:NOROOT(1)
TIMER1_IRQHandler_v
B .
PUBWEAK TIMER2_IRQHandler_v
SECTION .text:CODE:REORDER:NOROOT(1)
TIMER2_IRQHandler_v
B .
PUBWEAK RTC0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
RTC0_IRQHandler
B .
PUBWEAK TEMP_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TEMP_IRQHandler
B .
PUBWEAK RNG_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
RNG_IRQHandler
B .
PUBWEAK ECB_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
ECB_IRQHandler
B .
PUBWEAK CCM_AAR_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
CCM_AAR_IRQHandler
B .
PUBWEAK WDT_IRQHandler_v
SECTION .text:CODE:REORDER:NOROOT(1)
WDT_IRQHandler_v
B .
PUBWEAK RTC1_IRQHandler_v
SECTION .text:CODE:REORDER:NOROOT(1)
RTC1_IRQHandler_v
B .
PUBWEAK QDEC_IRQHandler_v
SECTION .text:CODE:REORDER:NOROOT(1)
QDEC_IRQHandler_v
B .
PUBWEAK LPCOMP_IRQHandler_v
SECTION .text:CODE:REORDER:NOROOT(1)
LPCOMP_IRQHandler_v
B .
PUBWEAK SWI0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI0_IRQHandler
B .
PUBWEAK SWI1_IRQHandler_v
SECTION .text:CODE:REORDER:NOROOT(1)
SWI1_IRQHandler_v
B .
PUBWEAK SWI2_IRQHandler_v
SECTION .text:CODE:REORDER:NOROOT(1)
SWI2_IRQHandler_v
B .
PUBWEAK SWI3_IRQHandler_v
SECTION .text:CODE:REORDER:NOROOT(1)
SWI3_IRQHandler_v
B .
PUBWEAK SWI4_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI4_IRQHandler
B .
PUBWEAK SWI5_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI5_IRQHandler
B .
END

13
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/cmsis.h
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@ -1,13 +0,0 @@
/* mbed Microcontroller Library - CMSIS
* Copyright (C) 2009-2011 ARM Limited. All rights reserved.
*
* A generic CMSIS include header, pulling in LPC407x_8x specifics
*/
#ifndef MBED_CMSIS_H
#define MBED_CMSIS_H
#include "nrf.h"
#include "cmsis_nvic.h"
#endif

43
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/cmsis_nvic.c
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@ -1,43 +0,0 @@
/* mbed Microcontroller Library
* CMSIS-style functionality to support dynamic vectors
*******************************************************************************
* Copyright (c) 2011 ARM Limited. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of ARM Limited nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#include "cmsis_nvic.h"
extern uint32_t nrf_dispatch_vector[NVIC_NUM_VECTORS];
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
{
nrf_dispatch_vector[IRQn + NVIC_USER_IRQ_OFFSET] = vector;
}
uint32_t NVIC_GetVector(IRQn_Type IRQn)
{
return nrf_dispatch_vector[IRQn + NVIC_USER_IRQ_OFFSET];
}

53
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/cmsis_nvic.h
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@ -1,53 +0,0 @@
/* mbed Microcontroller Library
* CMSIS-style functionality to support dynamic vectors
*******************************************************************************
* Copyright (c) 2011 ARM Limited. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of ARM Limited nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
#define NVIC_NUM_VECTORS (16 + 32) // CORE + MCU Peripherals
#define NVIC_USER_IRQ_OFFSET 16
#include "nrf51.h"
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
uint32_t NVIC_GetVector(IRQn_Type IRQn);
#ifdef __cplusplus
}
#endif
#endif

192
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/system_nrf51.c
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@ -1,192 +0,0 @@
/*
* Copyright (c) 2015 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/* NOTE: Template files (including this one) are application specific and therefore expected to
be copied into the application project folder prior to its use! */
#include <stdint.h>
#include <stdbool.h>
#include "nrf.h"
#include "system_nrf51.h"
#include "nrf5x_lf_clk_helper.h"
/*lint ++flb "Enter library region" */
#define __SYSTEM_CLOCK (16000000UL) /*!< nRF51 devices use a fixed System Clock Frequency of 16MHz */
static bool is_manual_peripheral_setup_needed(void);
static bool is_disabled_in_debug_needed(void);
static bool is_peripheral_domain_setup_needed(void);
#if defined ( __CC_ARM )
uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;
#elif defined ( __ICCARM__ )
__root uint32_t SystemCoreClock = __SYSTEM_CLOCK;
#elif defined ( __GNUC__ )
uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;
#endif
void SystemCoreClockUpdate(void)
{
SystemCoreClock = __SYSTEM_CLOCK;
}
void SystemInit(void)
{
#if defined(TARGET_NRF_32MHZ_XTAL)
/* For 32MHz HFCLK XTAL such as Taiyo Yuden
Physically, tiny footprint XTAL oscillate higher freq. To make BLE modules smaller, some modules
are using 32MHz XTAL.
This code wriging the value 0xFFFFFF00 to the UICR (User Information Configuration Register)
at address 0x10001008, to make nRF51 works with 32MHz system clock. This register will be overwritten
by SoftDevice to 0xFFFFFFFF, the default value. Each hex files built with mbed classic online compiler
contain SoftDevice, so that, this code run once just after the hex file will be flashed onto nRF51.
After changing the value, nRF51 need to reboot. */
if (*(uint32_t *)0x10001008 == 0xFFFFFFFF)
{
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
*(uint32_t *)0x10001008 = 0xFFFFFF00;
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NVIC_SystemReset();
while (true){}
}
#endif
/* If desired, switch off the unused RAM to lower consumption by the use of RAMON register.
It can also be done in the application main() function. */
/* Prepare the peripherals for use as indicated by the PAN 26 "System: Manual setup is required
to enable the use of peripherals" found at Product Anomaly document for your device found at
https://www.nordicsemi.com/. The side effect of executing these instructions in the devices
that do not need it is that the new peripherals in the second generation devices (LPCOMP for
example) will not be available. */
if (is_manual_peripheral_setup_needed())
{
*(uint32_t volatile *)0x40000504 = 0xC007FFDF;
*(uint32_t volatile *)0x40006C18 = 0x00008000;
}
/* Disable PROTENSET registers under debug, as indicated by PAN 59 "MPU: Reset value of DISABLEINDEBUG
register is incorrect" found at Product Anomaly document for your device found at
https://www.nordicsemi.com/. There is no side effect of using these instruction if not needed. */
if (is_disabled_in_debug_needed())
{
NRF_MPU->DISABLEINDEBUG = MPU_DISABLEINDEBUG_DISABLEINDEBUG_Disabled << MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos;
}
/* Execute the following code to eliminate excessive current in sleep mode with RAM retention in nRF51802 devices,
as indicated by PAN 76 "System: Excessive current in sleep mode with retention" found at Product Anomaly document
for your device found at https://www.nordicsemi.com/. */
if (is_peripheral_domain_setup_needed()){
if (*(uint32_t volatile *)0x4006EC00 != 1){
*(uint32_t volatile *)0x4006EC00 = 0x9375;
while (*(uint32_t volatile *)0x4006EC00 != 1){
}
}
*(uint32_t volatile *)0x4006EC14 = 0xC0;
}
// Start the LF oscilator according to the mbed configuration (over the nrf5x_lf_clk_helper.h file)
NRF_CLOCK->LFCLKSRC = (CLOCK_LFCLKSRC_SRC_TO_USE << CLOCK_LFCLKSRC_SRC_Pos);
NRF_CLOCK->EVENTS_LFCLKSTARTED = 0;
NRF_CLOCK->TASKS_LFCLKSTART = 1;
// Wait for the external oscillator to start up.
while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0) {
// Do nothing.
}
}
static bool is_manual_peripheral_setup_needed(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x00) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
{
return true;
}
if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x10) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
{
return true;
}
if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
{
return true;
}
}
return false;
}
static bool is_disabled_in_debug_needed(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
{
return true;
}
}
return false;
}
static bool is_peripheral_domain_setup_needed(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0xA0) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
{
return true;
}
if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0xD0) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
{
return true;
}
}
return false;
}
/*lint --flb "Leave library region" */

78
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/system_nrf51.h
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@ -1,78 +0,0 @@
/*
* Copyright (c) 2015 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef SYSTEM_NRF51_H
#define SYSTEM_NRF51_H
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system.
* Initialize the System and update the SystemCoreClock variable.
*/
extern void SystemInit (void);
/**
* Update SystemCoreClock variable
*
* @param none
* @return none
*
* @brief Updates the SystemCoreClock with current core Clock
* retrieved from cpu registers.
*/
extern void SystemCoreClockUpdate (void);
#ifdef __cplusplus
}
#endif
#endif /* SYSTEM_NRF51_H */

299
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/*
* Copyright (c) 2013 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "mbed_assert.h"
#include "mbed_error.h"
#include "pwmout_api.h"
#include "cmsis.h"
#include "pinmap.h"
#if DEVICE_PWMOUT
#include "nrf.h"
#include "nrf_drv_timer.h"
#include "app_pwm.h"
#define PWM_INSTANCE_COUNT 2
#define PWM_CHANNELS_PER_INSTANCE 2
#define PWM_DEFAULT_PERIOD_US 20000
#define PWM_PERIOD_MIN 3
typedef struct
{
const app_pwm_t * const instance;
NRF_TIMER_Type * const timer_reg;
uint8_t channels_allocated;
uint32_t pins[PWM_CHANNELS_PER_INSTANCE];
uint16_t period_us;
uint16_t duty_ticks[PWM_CHANNELS_PER_INSTANCE];
} pwm_t;
// Pinmap used for testing only
static const PinMap PinMap_PWM_testing[] = {
{p0, 0, 0},
{p1, 0, 0},
{p2, 0, 0},
{p3, 0, 0},
{p4, 0, 0},
{p5, 0, 0},
{p6, 0, 0},
{p7, 0, 0},
{p8, 0, 0},
{p9, 0, 0},
{p10, 0, 0},
{p11, 0, 0},
{p12, 0, 0},
{p13, 0, 0},
{p14, 0, 0},
{p15, 0, 0},
{p16, 0, 0},
{p17, 0, 0},
{p18, 0, 0},
{p19, 0, 0},
{p20, 0, 0},
{p21, 0, 0},
{p22, 0, 0},
{p23, 0, 0},
{p24, 0, 0},
{p25, 0, 0},
{p28, 0, 0},
{p29, 0, 0},
{p30, 0, 0},
{NC, NC, 0}
};
APP_PWM_INSTANCE(m_pwm_instance_0, 1); //PWM0: Timer 1
APP_PWM_INSTANCE(m_pwm_instance_1, 2); //PWM1: Timer 2
static pwm_t m_pwm[] = {
{.instance = &m_pwm_instance_0, .timer_reg = NRF_TIMER1, .channels_allocated = 0},
{.instance = &m_pwm_instance_1, .timer_reg = NRF_TIMER2, .channels_allocated = 0}
};
static inline void pwm_ticks_set(pwm_t* pwm, uint8_t channel, uint16_t ticks)
{
pwm->duty_ticks[channel] = ticks;
while (app_pwm_channel_duty_ticks_set(pwm->instance, channel, ticks) != NRF_SUCCESS);
}
static void pwm_reinit(pwm_t * pwm)
{
app_pwm_uninit(pwm->instance);
app_pwm_config_t pwm_cfg = APP_PWM_DEFAULT_CONFIG_2CH(pwm->period_us,
pwm->pins[0],
pwm->pins[1]);
app_pwm_init(pwm->instance, &pwm_cfg, NULL);
app_pwm_enable(pwm->instance);
for (uint8_t channel = 0; channel < PWM_CHANNELS_PER_INSTANCE; ++channel) {
if ((pwm->channels_allocated & (1 << channel)) && (pwm->pins[channel] != APP_PWM_NOPIN)) {
app_pwm_channel_duty_ticks_set(pwm->instance, channel, pwm->duty_ticks[channel]);
}
}
}
void GPIOTE_IRQHandler(void);// exported from nrf_drv_gpiote.c
void TIMER1_IRQHandler(void);
void TIMER2_IRQHandler(void);
static const peripheral_handler_desc_t timer_handlers[] =
{
{
TIMER1_IRQn,
(uint32_t)TIMER1_IRQHandler
},
{
TIMER2_IRQn,
(uint32_t)TIMER2_IRQHandler
}
};
void pwmout_init(pwmout_t *obj, PinName pin)
{
if (pin == NC) {
error("PwmOut init failed. Invalid pin name.");
}
// Check if pin is already initialized and find the next free channel.
uint8_t free_instance = 0xFF;
uint8_t free_channel = 0xFF;
for (uint8_t inst = 0; inst < PWM_INSTANCE_COUNT; ++inst) {
if (m_pwm[inst].channels_allocated) {
for (uint8_t channel = 0; channel < PWM_CHANNELS_PER_INSTANCE; ++channel) {
if (m_pwm[inst].channels_allocated & (1 << channel)) {
if (m_pwm[inst].pins[channel] == (uint32_t)pin) {
error("PwmOut init failed. Pin is already in use.");
return;
}
}
else {
if (free_instance == 0xFF) {
free_instance = inst;
free_channel = channel;
}
}
}
}
else {
if (free_instance == 0xFF) {
free_instance = inst;
free_channel = 0;
}
}
}
if (free_instance == 0xFF)
{
error("PwmOut init failed. All available PWM channels are in use.");
return;
}
// Init / reinit PWM instance.
m_pwm[free_instance].pins[free_channel] = (uint32_t) pin;
m_pwm[free_instance].duty_ticks[free_channel] = 0;
if (!m_pwm[free_instance].channels_allocated) {
NVIC_SetVector(GPIOTE_IRQn, (uint32_t) GPIOTE_IRQHandler);
NVIC_SetVector(timer_handlers[free_instance].IRQn, timer_handlers[free_instance].vector);
m_pwm[free_instance].period_us = PWM_DEFAULT_PERIOD_US;
for (uint8_t channel = 1; channel < PWM_CHANNELS_PER_INSTANCE; ++channel) {
m_pwm[free_instance].pins[channel] = APP_PWM_NOPIN;
m_pwm[free_instance].duty_ticks[channel] = 0;
}
app_pwm_config_t pwm_cfg = APP_PWM_DEFAULT_CONFIG_1CH(PWM_DEFAULT_PERIOD_US, pin);
app_pwm_init(m_pwm[free_instance].instance, &pwm_cfg, NULL);
app_pwm_enable(m_pwm[free_instance].instance);
}
else {
pwm_reinit(&m_pwm[free_instance]);
}
m_pwm[free_instance].channels_allocated |= (1 << free_channel);
obj->pin = pin;
obj->pwm_struct = (void *) &m_pwm[free_instance];
obj->pwm_channel = free_channel;
}
void pwmout_free(pwmout_t *obj)
{
MBED_ASSERT(obj->pwm_name != (PWMName)NC);
MBED_ASSERT(obj->pwm_channel < PWM_CHANNELS_PER_INSTANCE);
pwm_t * pwm = (pwm_t *) obj->pwm_struct;
pwm->channels_allocated &= ~(1 << obj->pwm_channel);
pwm->pins[obj->pwm_channel] = APP_PWM_NOPIN;
pwm->duty_ticks[obj->pwm_channel] = 0;
app_pwm_uninit(pwm->instance);
if (pwm->channels_allocated) {
pwm_reinit(pwm);
}
obj->pwm_struct = NULL;
}
void pwmout_write(pwmout_t *obj, float value)
{
pwm_t * pwm = (pwm_t *) obj->pwm_struct;
if (value > 1.0f) {
value = 1.0f;
}
app_pwm_channel_duty_set(pwm->instance, obj->pwm_channel, (app_pwm_duty_t)(value * 100.0f) );
}
float pwmout_read(pwmout_t *obj)
{
pwm_t * pwm = (pwm_t *) obj->pwm_struct;
MBED_ASSERT(pwm != NULL);
return ((float)pwm->duty_ticks[obj->pwm_channel] / (float)app_pwm_cycle_ticks_get(pwm->instance));
}
void pwmout_period(pwmout_t *obj, float seconds)
{
pwmout_period_us(obj, seconds * 1000000.0f);
}
void pwmout_period_ms(pwmout_t *obj, int ms)
{
pwmout_period_us(obj, ms * 1000);
}
void pwmout_period_us(pwmout_t *obj, int us)
{
pwm_t * pwm = (pwm_t *) obj->pwm_struct;
MBED_ASSERT(pwm != NULL);
if (us < PWM_PERIOD_MIN) {
us = PWM_PERIOD_MIN;
}
pwm->period_us = (uint32_t)us;
pwm_reinit(pwm);
}
void pwmout_pulsewidth(pwmout_t *obj, float seconds)
{
pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
}
void pwmout_pulsewidth_ms(pwmout_t *obj, int ms)
{
pwmout_pulsewidth_us(obj, ms * 1000);
}
void pwmout_pulsewidth_us(pwmout_t *obj, int us)
{
pwm_t * pwm = (pwm_t *) obj->pwm_struct;
MBED_ASSERT(pwm);
uint16_t ticks = nrf_timer_us_to_ticks((uint32_t)us, nrf_timer_frequency_get(pwm->timer_reg));
pwm_ticks_set(pwm, obj->pwm_channel, ticks);
}
const PinMap *pwmout_pinmap()
{
return PinMap_PWM_testing;
}
#endif // DEVICE_PWMOUT

281
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/sdk/drivers_nrf/adc/nrf_drv_adc.c
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@ -1,281 +0,0 @@
/*
* Copyright (c) 2015 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "nrf_drv_adc.h"
#include "nrf_drv_common.h"
#include "nrf_assert.h"
#include "app_util_platform.h"
#include "app_util.h"
typedef struct
{
nrf_drv_adc_event_handler_t event_handler;
nrf_drv_adc_channel_t * p_head;
nrf_drv_adc_channel_t * p_current_conv;
nrf_adc_value_t * p_buffer;
uint8_t size;
uint8_t idx;
nrf_drv_state_t state;
} adc_cb_t;
static adc_cb_t m_cb;
static const nrf_drv_adc_config_t m_default_config = NRF_DRV_ADC_DEFAULT_CONFIG;
ret_code_t nrf_drv_adc_init(nrf_drv_adc_config_t const * p_config,
nrf_drv_adc_event_handler_t event_handler)
{
if (m_cb.state != NRF_DRV_STATE_UNINITIALIZED)
{
return NRF_ERROR_INVALID_STATE;
}
nrf_adc_event_clear(NRF_ADC_EVENT_END);
if (event_handler)
{
if (!p_config)
{
p_config = (nrf_drv_adc_config_t *)&m_default_config;
}
nrf_drv_common_irq_enable(ADC_IRQn, p_config->interrupt_priority);
}
m_cb.event_handler = event_handler;
m_cb.state = NRF_DRV_STATE_INITIALIZED;
return NRF_SUCCESS;
}
void nrf_drv_adc_uninit(void)
{
m_cb.p_head = NULL;
nrf_drv_common_irq_disable(ADC_IRQn);
nrf_adc_int_disable(NRF_ADC_INT_END_MASK);
nrf_adc_task_trigger(NRF_ADC_TASK_STOP);
m_cb.state = NRF_DRV_STATE_UNINITIALIZED;
}
void nrf_drv_adc_channel_enable(nrf_drv_adc_channel_t * const p_channel)
{
ASSERT(m_cb.state == NRF_DRV_STATE_INITIALIZED);
// This assert has been removed as it requires non-existent symbols from linker
//ASSERT(!is_address_from_stack(p_channel));
p_channel->p_next = NULL;
if (m_cb.p_head == NULL)
{
m_cb.p_head = p_channel;
}
else
{
nrf_drv_adc_channel_t * p_curr_channel = m_cb.p_head;
while (p_curr_channel->p_next != NULL)
{
ASSERT(p_channel != p_curr_channel);
p_curr_channel = p_curr_channel->p_next;
}
p_curr_channel->p_next = p_channel;
}
}
void nrf_drv_adc_channel_disable(nrf_drv_adc_channel_t * const p_channel)
{
ASSERT(m_cb.state == NRF_DRV_STATE_INITIALIZED);
ASSERT(m_cb.p_head);
nrf_drv_adc_channel_t * p_curr_channel = m_cb.p_head;
nrf_drv_adc_channel_t * p_prev_channel = NULL;
while(p_curr_channel != p_channel)
{
p_prev_channel = p_curr_channel;
p_curr_channel = p_curr_channel->p_next;
ASSERT(p_curr_channel == NULL);
}
if (p_prev_channel)
{
p_prev_channel->p_next = p_curr_channel->p_next;
}
else
{
m_cb.p_head = p_curr_channel->p_next;
}
}
void nrf_drv_adc_sample(void)
{
ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED);
ASSERT(!nrf_adc_is_busy());
nrf_adc_start();
}
ret_code_t nrf_drv_adc_sample_convert(nrf_drv_adc_channel_t const * const p_channel,
nrf_adc_value_t * p_value)
{
ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED);
if(m_cb.state == NRF_DRV_STATE_POWERED_ON)
{
return NRF_ERROR_BUSY;
}
else
{
m_cb.state = NRF_DRV_STATE_POWERED_ON;
nrf_adc_config_set(p_channel->config.data);
nrf_adc_enable();
nrf_adc_int_disable(NRF_ADC_INT_END_MASK);
nrf_adc_start();
if (p_value)
{
while(!nrf_adc_event_check(NRF_ADC_EVENT_END)) {}
nrf_adc_event_clear(NRF_ADC_EVENT_END);
*p_value = (nrf_adc_value_t)nrf_adc_result_get();
nrf_adc_disable();
m_cb.state = NRF_DRV_STATE_INITIALIZED;
}
else
{
ASSERT(m_cb.event_handler);
m_cb.p_buffer = NULL;
nrf_adc_int_enable(NRF_ADC_INT_END_MASK);
}
return NRF_SUCCESS;
}
}
static bool adc_sample_process()
{
nrf_adc_event_clear(NRF_ADC_EVENT_END);
nrf_adc_disable();
m_cb.p_buffer[m_cb.idx] = (nrf_adc_value_t)nrf_adc_result_get();
m_cb.idx++;
if (m_cb.idx < m_cb.size)
{
bool task_trigger = false;
if (m_cb.p_current_conv->p_next == NULL)
{
m_cb.p_current_conv = m_cb.p_head;
}
else
{
m_cb.p_current_conv = m_cb.p_current_conv->p_next;
task_trigger = true;
}
nrf_adc_config_set(m_cb.p_current_conv->config.data);
nrf_adc_enable();
if (task_trigger)
{
//nrf_adc_start();
nrf_adc_task_trigger(NRF_ADC_TASK_START);
}
return false;
}
else
{
return true;
}
}
ret_code_t nrf_drv_adc_buffer_convert(nrf_adc_value_t * buffer, uint16_t size)
{
ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED);
if(m_cb.state == NRF_DRV_STATE_POWERED_ON)
{
return NRF_ERROR_BUSY;
}
else
{
m_cb.state = NRF_DRV_STATE_POWERED_ON;
m_cb.p_current_conv = m_cb.p_head;
m_cb.size = size;
m_cb.idx = 0;
m_cb.p_buffer = buffer;
nrf_adc_config_set(m_cb.p_current_conv->config.data);
nrf_adc_event_clear(NRF_ADC_EVENT_END);
nrf_adc_enable();
if (m_cb.event_handler)
{
nrf_adc_int_enable(NRF_ADC_INT_END_MASK);
}
else
{
while(1)
{
while(!nrf_adc_event_check(NRF_ADC_EVENT_END)){}
if (adc_sample_process())
{
m_cb.state = NRF_DRV_STATE_INITIALIZED;
break;
}
}
}
return NRF_SUCCESS;
}
}
bool nrf_drv_adc_is_busy(void)
{
ASSERT(m_cb.state != NRF_DRV_STATE_UNINITIALIZED);
return (m_cb.state == NRF_DRV_STATE_POWERED_ON) ? true : false;
}
void ADC_IRQHandler(void)
{
if (m_cb.p_buffer == NULL)
{
nrf_adc_event_clear(NRF_ADC_EVENT_END);
nrf_adc_int_disable(NRF_ADC_INT_END_MASK);
nrf_adc_disable();
nrf_drv_adc_evt_t evt;
evt.type = NRF_DRV_ADC_EVT_SAMPLE;
evt.data.sample.sample = (nrf_adc_value_t)nrf_adc_result_get();
m_cb.state = NRF_DRV_STATE_INITIALIZED;
m_cb.event_handler(&evt);
}
else if (adc_sample_process())
{
nrf_adc_int_disable(NRF_ADC_INT_END_MASK);
nrf_drv_adc_evt_t evt;
evt.type = NRF_DRV_ADC_EVT_DONE;
evt.data.done.p_buffer = m_cb.p_buffer;
evt.data.done.size = m_cb.size;
m_cb.state = NRF_DRV_STATE_INITIALIZED;
m_cb.event_handler(&evt);
}
}

324
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/sdk/drivers_nrf/adc/nrf_drv_adc.h
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@ -1,324 +0,0 @@
/*
* Copyright (c) 2015 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "nrf_adc.h"
#include "nrf_drv_config.h"
#include "sdk_errors.h"
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @addtogroup nrf_adc ADC HAL and driver
* @ingroup nrf_drivers
* @brief Analog-to-digital converter (ADC) APIs.
* @details The ADC HAL provides basic APIs for accessing the registers of the analog-to-digital converter.
* The ADC driver provides APIs on a higher level.
*
* @defgroup nrf_adc_drv ADC driver
* @{
* @ingroup nrf_adc
* @brief Analog-to-digital converter (ADC) driver.
*/
/**
* @brief Driver event types.
*/
typedef enum
{
NRF_DRV_ADC_EVT_DONE, ///< Event generated when the buffer is filled with samples.
NRF_DRV_ADC_EVT_SAMPLE, ///< Event generated when the requested channel is sampled.
} nrf_drv_adc_evt_type_t;
typedef int16_t nrf_adc_value_t;
/**
* @brief Analog-to-digital converter driver DONE event.
*/
typedef struct
{
nrf_adc_value_t * p_buffer; ///< Pointer to buffer with converted samples.
uint16_t size; ///< Number of samples in the buffer.
} nrf_drv_adc_done_evt_t;
/**
* @brief Analog-to-digital converter driver SAMPLE event.
*/
typedef struct
{
nrf_adc_value_t sample; ///< Converted sample.
} nrf_drv_adc_sample_evt_t;
/**
* @brief Analog-to-digital converter driver event.
*/
typedef struct
{
nrf_drv_adc_evt_type_t type; ///< Event type.
union
{
nrf_drv_adc_done_evt_t done; ///< Data for DONE event.
nrf_drv_adc_sample_evt_t sample; ///< Data for SAMPLE event.
} data;
} nrf_drv_adc_evt_t;
/**@brief Macro for initializing the ADC channel with the default configuration. */
#define NRF_DRV_ADC_DEFAULT_CHANNEL(analog_input) \
{{{ \
.resolution = NRF_ADC_CONFIG_RES_10BIT, \
.input = NRF_ADC_CONFIG_SCALING_INPUT_FULL_SCALE, \
.reference = NRF_ADC_CONFIG_REF_VBG, \
.ain = (analog_input) \
}}, NULL}
/**
* @brief ADC channel configuration.
*
* @note The bit fields reflect bit fields in the ADC CONFIG register.
*/
typedef struct
{
uint32_t resolution :2; ///< 8-10 bit resolution.
uint32_t input :3; ///< Input selection and scaling.
uint32_t reference :2; ///< Reference source.
uint32_t reserved :1; ///< Unused bit fields.
uint32_t ain :8; ///< Analog input.
uint32_t external_reference:2; ///< Eternal reference source.
}nrf_drv_adc_channel_config_t;
// Forward declaration of the nrf_drv_adc_channel_t type.
typedef struct nrf_drv_adc_channel_s nrf_drv_adc_channel_t;
/**
* @brief ADC channel.
*
* This structure is defined by the user and used by the driver. Therefore, it should
* not be defined on the stack as a local variable.
*/
struct nrf_drv_adc_channel_s
{
union
{
nrf_drv_adc_channel_config_t config; ///< Channel configuration.
uint32_t data; ///< Raw value.
} config;
nrf_drv_adc_channel_t * p_next; ///< Pointer to the next enabled channel (for internal use).
};
/**
* @brief ADC configuration.
*/
typedef struct
{
uint8_t interrupt_priority; ///< Priority of ADC interrupt.
} nrf_drv_adc_config_t;
/** @brief ADC default configuration. */
#define NRF_DRV_ADC_DEFAULT_CONFIG \
{ \
.interrupt_priority = ADC_CONFIG_IRQ_PRIORITY \
}
/**
* @brief User event handler prototype.
*
* This function is called when the requested number of samples has been processed.
*
* @param p_event Event.
*/
typedef void (*nrf_drv_adc_event_handler_t)(nrf_drv_adc_evt_t const * p_event);
/**
* @brief Function for initializing the ADC.
*
* If a valid event handler is provided, the driver is initialized in non-blocking mode.
* If event_handler is NULL, the driver works in blocking mode.
*
* @param[in] p_config Driver configuration.
* @param[in] event_handler Event handler provided by the user.
*
* @retval NRF_SUCCESS If initialization was successful.
* @retval NRF_ERROR_INVALID_STATE If the driver is already initialized.
*/
ret_code_t nrf_drv_adc_init(nrf_drv_adc_config_t const * p_config,
nrf_drv_adc_event_handler_t event_handler);
/**
* @brief Function for uninitializing the ADC.
*
* This function stops all ongoing conversions and disables all channels.
*/
void nrf_drv_adc_uninit(void);
/**
* @brief Function for enabling an ADC channel.
*
* This function configures and enables the channel. When @ref nrf_drv_adc_buffer_convert is
* called, all channels that have been enabled with this function are sampled.
*
* @note The channel instance variable @p p_channel is used by the driver as an item
* in a list. Therefore, it cannot be an automatic variable, and an assertion fails if it is
* an automatic variable (if asserts are enabled).
*/
void nrf_drv_adc_channel_enable(nrf_drv_adc_channel_t * const p_channel);
/**
* @brief Function for disabling an ADC channel.
*/
void nrf_drv_adc_channel_disable(nrf_drv_adc_channel_t * const p_channel);
/**
* @brief Function for starting ADC sampling.
*
* This function triggers single ADC sampling. If more than one channel is enabled, the driver
* emulates scanning and all channels are sampled in the order they were enabled.
*/
void nrf_drv_adc_sample(void);
/**
* @brief Function for executing a single ADC conversion.
*
* This function selects the desired input and starts a single conversion. If a valid pointer
* is provided for the result, the function blocks until the conversion is completed. Otherwise, the
* function returns when the conversion is started, and the result is provided in an event (driver
* must be initialized in non-blocking mode otherwise an assertion will fail). The function will fail if
* ADC is busy. The channel does not need to be enabled to perform a single conversion.
*
* @param[in] p_channel Channel.
* @param[out] p_value Pointer to the location where the result should be placed. Unless NULL is
* provided, the function is blocking.
*
* @retval NRF_SUCCESS If conversion was successful.
* @retval NRF_ERROR_BUSY If the ADC driver is busy.
*/
ret_code_t nrf_drv_adc_sample_convert(nrf_drv_adc_channel_t const * const p_channel,
nrf_adc_value_t * p_value);
/**
* @brief Function for converting data to the buffer.
*
* If the driver is initialized in non-blocking mode, this function returns when the first conversion
* is set up. When the buffer is filled, the application is notified by the event handler. If the
* driver is initialized in blocking mode, the function returns when the buffer is filled.
*
* Conversion is done on all enabled channels, but it is not triggered by this
* function. This function will prepare the ADC for sampling and then
* wait for the SAMPLE task. Sampling can be triggered manually by the @ref
* nrf_drv_adc_sample function or by PPI using the @ref NRF_ADC_TASK_START task.
*
* @note If more than one channel is enabled, the function emulates scanning, and
* a single START task will trigger conversion on all enabled channels. For example:
* If 3 channels are enabled and the user requests 6 samples, the completion event
* handler will be called after 2 START tasks.
* @note The application must adjust the sampling frequency. The maximum frequency
* depends on the sampling timer and the maximum latency of the ADC interrupt. If
* an interrupt is not handled before the next sampling is triggered, the sample
* will be lost.
*
* @param[in] buffer Result buffer.
* @param[in] size Buffer size in samples.
*
* @retval NRF_SUCCESS If conversion was successful.
* @retval NRF_ERROR_BUSY If the driver is busy.
*/
ret_code_t nrf_drv_adc_buffer_convert(nrf_adc_value_t * buffer, uint16_t size);
/**
* @brief Function for retrieving the ADC state.
*
* @retval true If the ADC is busy.
* @retval false If the ADC is ready.
*/
bool nrf_drv_adc_is_busy(void);
/**
* @brief Function for getting the address of the ADC START task.
*
* This function is used to get the address of the START task, which can be used to trigger ADC
* conversion.
*
* @return Start task address.
*/
__STATIC_INLINE uint32_t nrf_drv_adc_start_task_get(void);
/**
* @brief Function for converting a GPIO pin number to an analog input pin mask to be used in
* the ADC channel configuration.
*
* @param[in] pin GPIO pin.
*
* @return Analog input pin mask. The function returns @ref NRF_ADC_CONFIG_INPUT_DISABLED
* if the specified pin is not an analog input.
*/
__STATIC_INLINE nrf_adc_config_input_t nrf_drv_adc_gpio_to_ain(uint32_t pin);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE uint32_t nrf_drv_adc_start_task_get(void)
{
return nrf_adc_task_address_get(NRF_ADC_TASK_START);
}
__STATIC_INLINE nrf_adc_config_input_t nrf_drv_adc_gpio_to_ain(uint32_t pin)
{
// AIN2 - AIN7
if (pin >= 1 && pin <= 6)
{
return (nrf_adc_config_input_t)(1 << (pin+1));
}
// AIN0 - AIN1
else if (pin >= 26 && pin <= 27)
{
return (nrf_adc_config_input_t)(1 <<(pin - 26));
}
else
{
return NRF_ADC_CONFIG_INPUT_DISABLED;
}
}
#ifdef __cplusplus
}
#endif
#endif
/** @} */

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/*
* Copyright (c) 2015 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef NRF_DRV_CONFIG_H
#define NRF_DRV_CONFIG_H
/**
* Provide a non-zero value here in applications that need to use several
* peripherals with the same ID that are sharing certain resources
* (for example, SPI0 and TWI0). Obviously, such peripherals cannot be used
* simultaneously. Therefore, this definition allows to initialize the driver
* for another peripheral from a given group only after the previously used one
* is uninitialized. Normally, this is not possible, because interrupt handlers
* are implemented in individual drivers.
* This functionality requires a more complicated interrupt handling and driver
* initialization, hence it is not always desirable to use it.
*/
#define PERIPHERAL_RESOURCE_SHARING_ENABLED 1
/* CLOCK */
#define CLOCK_ENABLED 1
#if (CLOCK_ENABLED == 1)
#define CLOCK_CONFIG_XTAL_FREQ NRF_CLOCK_XTALFREQ_Default
#define CLOCK_CONFIG_LF_SRC NRF_CLOCK_LFCLK_Xtal
#define CLOCK_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#endif
/* GPIOTE */
#define GPIOTE_ENABLED 1
#if (GPIOTE_ENABLED == 1)
#define GPIOTE_CONFIG_USE_SWI_EGU false
#define GPIOTE_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 8
#endif
/* TIMER */
#ifdef SOFTDEVICE_PRESENT
#define TIMER0_ENABLED 0
#else
#define TIMER0_ENABLED 1
#endif
#if (TIMER0_ENABLED == 1)
#define TIMER0_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
#define TIMER0_CONFIG_MODE TIMER_MODE_MODE_Timer
#define TIMER0_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_32Bit
#define TIMER0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TIMER0_INSTANCE_INDEX 0
#endif
#define TIMER1_ENABLED 1
#if (TIMER1_ENABLED == 1)
#define TIMER1_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
#define TIMER1_CONFIG_MODE TIMER_MODE_MODE_Timer
#define TIMER1_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
#define TIMER1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TIMER1_INSTANCE_INDEX (TIMER0_ENABLED)
#endif
#define TIMER2_ENABLED 1
#if (TIMER2_ENABLED == 1)
#define TIMER2_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
#define TIMER2_CONFIG_MODE TIMER_MODE_MODE_Timer
#define TIMER2_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
#define TIMER2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TIMER2_INSTANCE_INDEX (TIMER1_ENABLED+TIMER0_ENABLED)
#endif
#define TIMER3_ENABLED 0
#if (TIMER3_ENABLED == 1)
#define TIMER3_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
#define TIMER3_CONFIG_MODE TIMER_MODE_MODE_Timer
#define TIMER3_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
#define TIMER3_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TIMER3_INSTANCE_INDEX (TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED)
#endif
#define TIMER4_ENABLED 0
#if (TIMER4_ENABLED == 1)
#define TIMER4_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
#define TIMER4_CONFIG_MODE TIMER_MODE_MODE_Timer
#define TIMER4_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
#define TIMER4_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TIMER4_INSTANCE_INDEX (TIMER3_ENABLED+TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED)
#endif
#define TIMER_COUNT (TIMER0_ENABLED + TIMER1_ENABLED + TIMER2_ENABLED + TIMER3_ENABLED + TIMER4_ENABLED)
/* RTC */
#define RTC0_ENABLED 0
#if (RTC0_ENABLED == 1)
#define RTC0_CONFIG_FREQUENCY 32678
#define RTC0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define RTC0_CONFIG_RELIABLE false
#define RTC0_INSTANCE_INDEX 0
#endif
#define RTC1_ENABLED 0
#if (RTC1_ENABLED == 1)
#define RTC1_CONFIG_FREQUENCY 32768
#define RTC1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define RTC1_CONFIG_RELIABLE false
#define RTC1_INSTANCE_INDEX (RTC0_ENABLED)
#endif
#define RTC2_ENABLED 0
#if (RTC2_ENABLED == 1)
#define RTC2_CONFIG_FREQUENCY 32768
#define RTC2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define RTC2_CONFIG_RELIABLE false
#define RTC2_INSTANCE_INDEX (RTC0_ENABLED+RTC1_ENABLED)
#endif
#define RTC_COUNT (RTC0_ENABLED+RTC1_ENABLED+RTC2_ENABLED)
#define NRF_MAXIMUM_LATENCY_US 2000
/* RNG */
#define RNG_ENABLED 0
#if (RNG_ENABLED == 1)
#define RNG_CONFIG_ERROR_CORRECTION true
#define RNG_CONFIG_POOL_SIZE 8
#define RNG_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#endif
/* PWM */
#define PWM0_ENABLED 0
#if (PWM0_ENABLED == 1)
#define PWM0_CONFIG_OUT0_PIN 2
#define PWM0_CONFIG_OUT1_PIN 3
#define PWM0_CONFIG_OUT2_PIN 4
#define PWM0_CONFIG_OUT3_PIN 5
#define PWM0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define PWM0_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
#define PWM0_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
#define PWM0_CONFIG_TOP_VALUE 1000
#define PWM0_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
#define PWM0_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
#define PWM0_INSTANCE_INDEX 0
#endif
#define PWM1_ENABLED 0
#if (PWM1_ENABLED == 1)
#define PWM1_CONFIG_OUT0_PIN 2
#define PWM1_CONFIG_OUT1_PIN 3
#define PWM1_CONFIG_OUT2_PIN 4
#define PWM1_CONFIG_OUT3_PIN 5
#define PWM1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define PWM1_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
#define PWM1_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
#define PWM1_CONFIG_TOP_VALUE 1000
#define PWM1_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
#define PWM1_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
#define PWM1_INSTANCE_INDEX (PWM0_ENABLED)
#endif
#define PWM2_ENABLED 0
#if (PWM2_ENABLED == 1)
#define PWM2_CONFIG_OUT0_PIN 2
#define PWM2_CONFIG_OUT1_PIN 3
#define PWM2_CONFIG_OUT2_PIN 4
#define PWM2_CONFIG_OUT3_PIN 5
#define PWM2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define PWM2_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
#define PWM2_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
#define PWM2_CONFIG_TOP_VALUE 1000
#define PWM2_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
#define PWM2_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
#define PWM2_INSTANCE_INDEX (PWM0_ENABLED + PWM1_ENABLED)
#endif
#define PWM_COUNT (PWM0_ENABLED + PWM1_ENABLED + PWM2_ENABLED)
/* SPI */
#define SPI0_ENABLED 0
#if (SPI0_ENABLED == 1)
#define SPI0_USE_EASY_DMA 0
#define SPI0_CONFIG_SCK_PIN 2
#define SPI0_CONFIG_MOSI_PIN 3
#define SPI0_CONFIG_MISO_PIN 4
#define SPI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define SPI0_INSTANCE_INDEX 0
#endif
#define SPI1_ENABLED 1
#if (SPI1_ENABLED == 1)
#define SPI1_USE_EASY_DMA 0
#define SPI1_CONFIG_SCK_PIN 2
#define SPI1_CONFIG_MOSI_PIN 3
#define SPI1_CONFIG_MISO_PIN 4
#define SPI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define SPI1_INSTANCE_INDEX (SPI0_ENABLED)
#endif
#define SPI2_ENABLED 0
#if (SPI2_ENABLED == 1)
#define SPI2_USE_EASY_DMA 0
#define SPI2_CONFIG_SCK_PIN 2
#define SPI2_CONFIG_MOSI_PIN 3
#define SPI2_CONFIG_MISO_PIN 4
#define SPI2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define SPI2_INSTANCE_INDEX (SPI0_ENABLED + SPI1_ENABLED)
#endif
#define SPI_COUNT (SPI0_ENABLED + SPI1_ENABLED + SPI2_ENABLED)
/* SPIS */
#define SPIS0_ENABLED 0
#if (SPIS0_ENABLED == 1)
#define SPIS0_CONFIG_SCK_PIN 2
#define SPIS0_CONFIG_MOSI_PIN 3
#define SPIS0_CONFIG_MISO_PIN 4
#define SPIS0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define SPIS0_INSTANCE_INDEX 0
#endif
#define SPIS1_ENABLED 1
#if (SPIS1_ENABLED == 1)
#define SPIS1_CONFIG_SCK_PIN 2
#define SPIS1_CONFIG_MOSI_PIN 3
#define SPIS1_CONFIG_MISO_PIN 4
#define SPIS1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define SPIS1_INSTANCE_INDEX SPIS0_ENABLED
#endif
#define SPIS2_ENABLED 0
#if (SPIS2_ENABLED == 1)
#define SPIS2_CONFIG_SCK_PIN 2
#define SPIS2_CONFIG_MOSI_PIN 3
#define SPIS2_CONFIG_MISO_PIN 4
#define SPIS2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define SPIS2_INSTANCE_INDEX (SPIS0_ENABLED + SPIS1_ENABLED)
#endif
#define SPIS_COUNT (SPIS0_ENABLED + SPIS1_ENABLED + SPIS2_ENABLED)
/* UART */
#define UART0_ENABLED 1
#if (UART0_ENABLED == 1)
#define UART0_CONFIG_HWFC NRF_UART_HWFC_ENABLED
#define UART0_CONFIG_PARITY NRF_UART_PARITY_EXCLUDED
#define UART0_CONFIG_BAUDRATE NRF_UART_BAUDRATE_9600
#define UART0_CONFIG_PSEL_TXD 9
#define UART0_CONFIG_PSEL_RXD 11
#define UART0_CONFIG_PSEL_CTS 10
#define UART0_CONFIG_PSEL_RTS 8
#define UART0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
#ifdef NRF52
#define UART0_CONFIG_USE_EASY_DMA false
//Compile time flag
#define UART_EASY_DMA_SUPPORT 1
#define UART_LEGACY_SUPPORT 1
#endif //NRF52
#endif
#define TWI0_ENABLED 1
#if (TWI0_ENABLED == 1)
#define TWI0_USE_EASY_DMA 0
#define TWI0_CONFIG_FREQUENCY NRF_TWI_FREQ_100K
#define TWI0_CONFIG_SCL 0
#define TWI0_CONFIG_SDA 1
#define TWI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TWI0_INSTANCE_INDEX 0
#endif
#define TWI1_ENABLED 1
#if (TWI1_ENABLED == 1)
#define TWI1_USE_EASY_DMA 0
#define TWI1_CONFIG_FREQUENCY NRF_TWI_FREQ_100K
#define TWI1_CONFIG_SCL 0
#define TWI1_CONFIG_SDA 1
#define TWI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TWI1_INSTANCE_INDEX (TWI0_ENABLED)
#endif
#define TWI_COUNT (TWI0_ENABLED + TWI1_ENABLED)
/* TWIS */
#define TWIS0_ENABLED 0
#if (TWIS0_ENABLED == 1)
#define TWIS0_CONFIG_ADDR0 0
#define TWIS0_CONFIG_ADDR1 0 /* 0: Disabled */
#define TWIS0_CONFIG_SCL 0
#define TWIS0_CONFIG_SDA 1
#define TWIS0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TWIS0_INSTANCE_INDEX 0
#endif
#define TWIS1_ENABLED 0
#if (TWIS1_ENABLED == 1)
#define TWIS1_CONFIG_ADDR0 0
#define TWIS1_CONFIG_ADDR1 0 /* 0: Disabled */
#define TWIS1_CONFIG_SCL 0
#define TWIS1_CONFIG_SDA 1
#define TWIS1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TWIS1_INSTANCE_INDEX (TWIS0_ENABLED)
#endif
#define TWIS_COUNT (TWIS0_ENABLED + TWIS1_ENABLED)
/* For more documentation see nrf_drv_twis.h file */
#define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0
/* For more documentation see nrf_drv_twis.h file */
#define TWIS_NO_SYNC_MODE 0
/* QDEC */
#define QDEC_ENABLED 0
#if (QDEC_ENABLED == 1)
#define QDEC_CONFIG_REPORTPER NRF_QDEC_REPORTPER_10
#define QDEC_CONFIG_SAMPLEPER NRF_QDEC_SAMPLEPER_16384us
#define QDEC_CONFIG_PIO_A 1
#define QDEC_CONFIG_PIO_B 2
#define QDEC_CONFIG_PIO_LED 3
#define QDEC_CONFIG_LEDPRE 511
#define QDEC_CONFIG_LEDPOL NRF_QDEC_LEPOL_ACTIVE_HIGH
#define QDEC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define QDEC_CONFIG_DBFEN false
#define QDEC_CONFIG_SAMPLE_INTEN false
#endif
/* ADC */
#define ADC_ENABLED 1
#if (ADC_ENABLED == 1)
#define ADC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#endif
/* SAADC */
#define SAADC_ENABLED 0
#if (SAADC_ENABLED == 1)
#define SAADC_CONFIG_RESOLUTION NRF_SAADC_RESOLUTION_10BIT
#define SAADC_CONFIG_OVERSAMPLE NRF_SAADC_OVERSAMPLE_DISABLED
#define SAADC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#endif
/* PDM */
#define PDM_ENABLED 0
#if (PDM_ENABLED == 1)
#define PDM_CONFIG_MODE NRF_PDM_MODE_MONO
#define PDM_CONFIG_EDGE NRF_PDM_EDGE_LEFTFALLING
#define PDM_CONFIG_CLOCK_FREQ NRF_PDM_FREQ_1032K
#define PDM_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#endif
/* COMP */
#define COMP_ENABLED 0
#if (COMP_ENABLED == 1)
#define COMP_CONFIG_REF NRF_COMP_REF_Int1V8
#define COMP_CONFIG_MAIN_MODE NRF_COMP_MAIN_MODE_SE
#define COMP_CONFIG_SPEED_MODE NRF_COMP_SP_MODE_High
#define COMP_CONFIG_HYST NRF_COMP_HYST_NoHyst
#define COMP_CONFIG_ISOURCE NRF_COMP_ISOURCE_Off
#define COMP_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define COMP_CONFIG_INPUT NRF_COMP_INPUT_0
#endif
/* LPCOMP */
#define LPCOMP_ENABLED 0
#if (LPCOMP_ENABLED == 1)
#define LPCOMP_CONFIG_REFERENCE NRF_LPCOMP_REF_SUPPLY_4_8
#define LPCOMP_CONFIG_DETECTION NRF_LPCOMP_DETECT_DOWN
#define LPCOMP_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define LPCOMP_CONFIG_INPUT NRF_LPCOMP_INPUT_0
#endif
/* WDT */
#define WDT_ENABLED 0
#if (WDT_ENABLED == 1)
#define WDT_CONFIG_BEHAVIOUR NRF_WDT_BEHAVIOUR_RUN_SLEEP
#define WDT_CONFIG_RELOAD_VALUE 2000
#define WDT_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
#endif
/* SWI EGU */
#ifdef NRF52
#define EGU_ENABLED 0
#endif
/* I2S */
#define I2S_ENABLED 0
#if (I2S_ENABLED == 1)
#define I2S_CONFIG_SCK_PIN 22
#define I2S_CONFIG_LRCK_PIN 23
#define I2S_CONFIG_MCK_PIN NRF_DRV_I2S_PIN_NOT_USED
#define I2S_CONFIG_SDOUT_PIN 24
#define I2S_CONFIG_SDIN_PIN 25
#define I2S_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
#define I2S_CONFIG_MASTER NRF_I2S_MODE_MASTER
#define I2S_CONFIG_FORMAT NRF_I2S_FORMAT_I2S
#define I2S_CONFIG_ALIGN NRF_I2S_ALIGN_LEFT
#define I2S_CONFIG_SWIDTH NRF_I2S_SWIDTH_16BIT
#define I2S_CONFIG_CHANNELS NRF_I2S_CHANNELS_STEREO
#define I2S_CONFIG_MCK_SETUP NRF_I2S_MCK_32MDIV8
#define I2S_CONFIG_RATIO NRF_I2S_RATIO_256X
#endif
#include "nrf_drv_config_validation.h"
#endif // NRF_DRV_CONFIG_H

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/*
* Copyright (c) 2000 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/**
@defgroup nrf_mbr_api Master Boot Record API
@{
@brief APIs for updating SoftDevice and BootLoader
*/
/* Header guard */
#ifndef NRF_MBR_H__
#define NRF_MBR_H__
#include "nrf_svc.h"
#include <stdint.h>
#ifndef NRF51
#error "This header file shall only be included for nRF51 projects"
#endif
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup NRF_MBR_DEFINES Defines
* @{ */
/**@brief MBR SVC Base number. */
#define MBR_SVC_BASE (0x18)
/**@brief Page size in words. */
#define PAGE_SIZE_IN_WORDS 256
/** @} */
/** @brief The size that must be reserved for the MBR when a softdevice is written to flash.
This is the offset where the first byte of the softdevice hex file is written.*/
#define MBR_SIZE (0x1000)
/** @addtogroup NRF_MBR_ENUMS Enumerations
* @{ */
/**@brief nRF Master Boot Record API SVC numbers. */
enum NRF_MBR_SVCS
{
SD_MBR_COMMAND = MBR_SVC_BASE, /**< ::sd_mbr_command */
};
/**@brief Possible values for ::sd_mbr_command_t.command */
enum NRF_MBR_COMMANDS
{
SD_MBR_COMMAND_COPY_BL, /**< Copy a new BootLoader. @see sd_mbr_command_copy_bl_t */
SD_MBR_COMMAND_COPY_SD, /**< Copy a new SoftDevice. @see ::sd_mbr_command_copy_sd_t*/
SD_MBR_COMMAND_INIT_SD, /**< Init forwarding interrupts to SD, and run reset function in SD*/
SD_MBR_COMMAND_COMPARE, /**< This command works like memcmp. @see ::sd_mbr_command_compare_t*/
SD_MBR_COMMAND_VECTOR_TABLE_BASE_SET, /**< Start forwarding all exception to this address @see ::sd_mbr_command_vector_table_base_set_t*/
};
/** @} */
/** @addtogroup NRF_MBR_TYPES Types
* @{ */
/**@brief This command copies part of a new SoftDevice
* The destination area is erased before copying.
* If dst is in the middle of a flash page, that whole flash page will be erased.
* If (dst+len) is in the middle of a flash page, that whole flash page will be erased.
*
* The user of this function is responsible for setting the PROTENSET registers.
*
* @retval ::NRF_SUCCESS indicates that the contents of the memory blocks where copied correctly.
* @retval ::NRF_ERROR_INTERNAL indicates that the contents of the memory blocks where not verified correctly after copying.
*/
typedef struct
{
uint32_t *src; /**< Pointer to the source of data to be copied.*/
uint32_t *dst; /**< Pointer to the destination where the content is to be copied.*/
uint32_t len; /**< Number of 32 bit words to copy. Must be a multiple of @ref PAGE_SIZE_IN_WORDS words.*/
} sd_mbr_command_copy_sd_t;
/**@brief This command works like memcmp, but takes the length in words.
*
* @retval ::NRF_SUCCESS indicates that the contents of both memory blocks are equal.
* @retval ::NRF_ERROR_NULL indicates that the contents of the memory blocks are not equal.
*/
typedef struct
{
uint32_t *ptr1; /**< Pointer to block of memory. */
uint32_t *ptr2; /**< Pointer to block of memory. */
uint32_t len; /**< Number of 32 bit words to compare.*/
} sd_mbr_command_compare_t;
/**@brief This command copies a new BootLoader.
* With this command, destination of BootLoader is always the address written in NRF_UICR->BOOTADDR.
*
* Destination is erased by this function.
* If (destination+bl_len) is in the middle of a flash page, that whole flash page will be erased.
*
* This function will use PROTENSET to protect the flash that is not intended to be written.
*
* On Success, this function will not return. It will start the new BootLoader from reset-vector as normal.
*
* @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen.
* @retval ::NRF_ERROR_FORBIDDEN if NRF_UICR->BOOTADDR is not set.
* @retval ::NRF_ERROR_INVALID_LENGTH if parameters attempts to read or write outside flash area.
*/
typedef struct
{
uint32_t *bl_src; /**< Pointer to the source of the Bootloader to be be copied.*/
uint32_t bl_len; /**< Number of 32 bit words to copy for BootLoader. */
} sd_mbr_command_copy_bl_t;
/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the MBR
*
* Once this function has been called, this address is where the MBR will start to forward interrupts to after a reset.
*
* To restore default forwarding this function should be called with @param address set to 0.
* The MBR will then start forwarding to interrupts to the address in NFR_UICR->BOOTADDR or to the SoftDevice if the BOOTADDR is not set.
*
* @retval ::NRF_ERROR_INTERNAL indicates an internal error that should not happen.
* @retval ::NRF_ERROR_INVALID_ADDR if parameter address is outside of the flash size.
*/
typedef struct
{
uint32_t address; /**< The base address of the interrupt vector table for forwarded interrupts.*/
} sd_mbr_command_vector_table_base_set_t;
typedef struct
{
uint32_t command; /**< type of command to be issued see @ref NRF_MBR_COMMANDS. */
union
{
sd_mbr_command_copy_sd_t copy_sd; /**< Parameters for copy SoftDevice.*/
sd_mbr_command_copy_bl_t copy_bl; /**< Parameters for copy BootLoader.*/
sd_mbr_command_compare_t compare; /**< Parameters for verify.*/
sd_mbr_command_vector_table_base_set_t base_set; /**< Parameters for vector table base set.*/
} params;
} sd_mbr_command_t;
/** @} */
/** @addtogroup NRF_MBR_FUNCTIONS Functions
* @{ */
/**@brief Issue Master Boot Record commands
*
* Commands used when updating a SoftDevice and bootloader.
*
* @param[in] param Pointer to a struct describing the command.
*
*@note for retvals see ::sd_mbr_command_copy_sd_t ::sd_mbr_command_copy_bl_t ::sd_mbr_command_compare_t
*/
SVCALL(SD_MBR_COMMAND, uint32_t, sd_mbr_command(sd_mbr_command_t* param));
/** @} */
#ifdef __cplusplus
}
#endif
#endif // NRF_MBR_H__
/**
@}
*/

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targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/nrf_ble.h
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@ -1,635 +0,0 @@
/*
* Copyright (c) 2000 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/**
@addtogroup BLE_COMMON BLE SoftDevice Common
@{
@defgroup ble_api Events, type definitions and API calls
@{
@brief Module independent events, type definitions and API calls for the BLE SoftDevice.
*/
#ifndef NRF_BLE_H__
#define NRF_BLE_H__
#include "nrf_ble_ranges.h"
#include "nrf_ble_types.h"
#include "nrf_ble_gap.h"
#include "nrf_ble_l2cap.h"
#include "nrf_ble_gatt.h"
#include "nrf_ble_gattc.h"
#include "nrf_ble_gatts.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup BLE_COMMON_ENUMERATIONS Enumerations
* @{ */
/**
* @brief Common API SVC numbers.
*/
enum BLE_COMMON_SVCS
{
SD_BLE_ENABLE = BLE_SVC_BASE, /**< Enable and initialize the BLE stack */
SD_BLE_EVT_GET, /**< Get an event from the pending events queue. */
SD_BLE_TX_PACKET_COUNT_GET, /**< Get the total number of available application transmission packets for a particular connection. */
SD_BLE_UUID_VS_ADD, /**< Add a Vendor Specific UUID. */
SD_BLE_UUID_DECODE, /**< Decode UUID bytes. */
SD_BLE_UUID_ENCODE, /**< Encode UUID bytes. */
SD_BLE_VERSION_GET, /**< Get the local version information (company id, Link Layer Version, Link Layer Subversion). */
SD_BLE_USER_MEM_REPLY, /**< User Memory Reply. */
SD_BLE_OPT_SET, /**< Set a BLE option. */
SD_BLE_OPT_GET, /**< Get a BLE option. */
};
/**
* @brief BLE Module Independent Event IDs.
*/
enum BLE_COMMON_EVTS
{
BLE_EVT_TX_COMPLETE = BLE_EVT_BASE, /**< Transmission Complete. @ref ble_evt_tx_complete_t */
BLE_EVT_USER_MEM_REQUEST, /**< User Memory request. @ref ble_evt_user_mem_request_t */
BLE_EVT_USER_MEM_RELEASE /**< User Memory release. @ref ble_evt_user_mem_release_t */
};
/**@brief BLE connection bandwidth types.
* Bandwidth types supported by the SoftDevice in packets per connection interval.
*/
enum BLE_CONN_BWS
{
BLE_CONN_BW_NONE = 0,
BLE_CONN_BW_LOW,
BLE_CONN_BW_MID,
BLE_CONN_BW_HIGH
};
/**@brief Common Option IDs.
* IDs that uniquely identify a common option.
*/
enum BLE_COMMON_OPTS
{
BLE_COMMON_OPT_CONN_BW = BLE_OPT_BASE, /**< Bandwidth configuration @ref ble_common_opt_conn_bw_t */
BLE_COMMON_OPT_PA_LNA /**< PA and LNA options */
};
/** @} */
/** @addtogroup BLE_COMMON_DEFINES Defines
* @{ */
/** @brief Required pointer alignment for BLE Events.
*/
#define BLE_EVTS_PTR_ALIGNMENT 4
/** @defgroup BLE_USER_MEM_TYPES User Memory Types
* @{ */
#define BLE_USER_MEM_TYPE_INVALID 0x00 /**< Invalid User Memory Types. */
#define BLE_USER_MEM_TYPE_GATTS_QUEUED_WRITES 0x01 /**< User Memory for GATTS queued writes. */
/** @} */
/** @defgroup BLE_UUID_VS_COUNTS Vendor Specific UUID counts
* @{
*/
#define BLE_UUID_VS_COUNT_MIN 1 /**< Minimum VS UUID count. */
#define BLE_UUID_VS_COUNT_DEFAULT 0 /**< Use the default VS UUID count (10 for this version of the SoftDevice). */
/** @} */
/** @} */
/** @addtogroup BLE_COMMON_STRUCTURES Structures
* @{ */
/**@brief User Memory Block. */
typedef struct
{
uint8_t *p_mem; /**< Pointer to the start of the user memory block. */
uint16_t len; /**< Length in bytes of the user memory block. */
} ble_user_mem_block_t;
/**
* @brief Event structure for @ref BLE_EVT_TX_COMPLETE.
*/
typedef struct
{
uint8_t count; /**< Number of packets transmitted. */
} ble_evt_tx_complete_t;
/**@brief Event structure for @ref BLE_EVT_USER_MEM_REQUEST. */
typedef struct
{
uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */
} ble_evt_user_mem_request_t;
/**@brief Event structure for @ref BLE_EVT_USER_MEM_RELEASE. */
typedef struct
{
uint8_t type; /**< User memory type, see @ref BLE_USER_MEM_TYPES. */
ble_user_mem_block_t mem_block; /**< User memory block */
} ble_evt_user_mem_release_t;
/**@brief Event structure for events not associated with a specific function module. */
typedef struct
{
uint16_t conn_handle; /**< Connection Handle on which this event occurred. */
union
{
ble_evt_tx_complete_t tx_complete; /**< Transmission Complete. */
ble_evt_user_mem_request_t user_mem_request; /**< User Memory Request Event Parameters. */
ble_evt_user_mem_release_t user_mem_release; /**< User Memory Release Event Parameters. */
} params;
} ble_common_evt_t;
/**@brief BLE Event header. */
typedef struct
{
uint16_t evt_id; /**< Value from a BLE_<module>_EVT series. */
uint16_t evt_len; /**< Length in octets including this header. */
} ble_evt_hdr_t;
/**@brief Common BLE Event type, wrapping the module specific event reports. */
typedef struct
{
ble_evt_hdr_t header; /**< Event header. */
union
{
ble_common_evt_t common_evt; /**< Common Event, evt_id in BLE_EVT_* series. */
ble_gap_evt_t gap_evt; /**< GAP originated event, evt_id in BLE_GAP_EVT_* series. */
ble_l2cap_evt_t l2cap_evt; /**< L2CAP originated event, evt_id in BLE_L2CAP_EVT* series. */
ble_gattc_evt_t gattc_evt; /**< GATT client originated event, evt_id in BLE_GATTC_EVT* series. */
ble_gatts_evt_t gatts_evt; /**< GATT server originated event, evt_id in BLE_GATTS_EVT* series. */
} evt;
} ble_evt_t;
/**
* @brief Version Information.
*/
typedef struct
{
uint8_t version_number; /**< Link Layer Version number for BT 4.1 spec is 7 (https://www.bluetooth.org/en-us/specification/assigned-numbers/link-layer). */
uint16_t company_id; /**< Company ID, Nordic Semiconductor's company ID is 89 (0x0059) (https://www.bluetooth.org/apps/content/Default.aspx?doc_id=49708). */
uint16_t subversion_number; /**< Link Layer Sub Version number, corresponds to the SoftDevice Config ID or Firmware ID (FWID). */
} ble_version_t;
/* @brief: Configuration parameters for the PA and LNA. */
typedef struct
{
uint8_t enable :1; /**< Enable toggling for this amplifier */
uint8_t active_high :1; /**< Set the pin to be active high */
uint8_t gpio_pin :6; /**< The GPIO pin to toggle for this amplifier */
} ble_pa_lna_cfg_t;
/*
* @brief PA & LNA GPIO toggle configuration
*
* This option configures the SoftDevice to toggle pins when the radio is active for use with a power amplifier and/or
* a low noise amplifier.
*
* Toggling the pins is achieved by using two PPI channels and a GPIOTE channel. The hardware channel IDs are provided
* by the application and should be regarded as reserved as long as any PA/LNA toggling is enabled.
*
* @note @ref sd_ble_opt_get is not supported for this option.
* @note This feature is only supported for nRF52, on nRF51 @ref NRF_ERROR_NOT_SUPPORTED will always be returned.
* @note Setting this option while the radio is in use (i.e. any of the roles are active) may have undefined consequences
* and must be avoided by the application.
*
*/
typedef struct
{
ble_pa_lna_cfg_t pa_cfg; /**< Power Amplifier configuration */
ble_pa_lna_cfg_t lna_cfg; /**< Low Noise Amplifier configuration */
uint8_t ppi_ch_id_set; /**< PPI channel used for radio pin setting */
uint8_t ppi_ch_id_clr; /**< PPI channel used for radio pin clearing */
uint8_t gpiote_ch_id; /**< GPIOTE channel used for radio pin toggling */
} ble_common_opt_pa_lna_t;
/**
* @brief BLE connection bandwidth configuration parameters
*/
typedef struct
{
uint8_t conn_bw_tx; /**< Connection bandwidth configuration for transmission, see @ref BLE_CONN_BWS.*/
uint8_t conn_bw_rx; /**< Connection bandwidth configuration for reception, see @ref BLE_CONN_BWS.*/
} ble_conn_bw_t;
/**@brief BLE connection specific bandwidth configuration parameters.
*
* This can be used with @ref sd_ble_opt_set to set the bandwidth configuration to be used when creating connections.
*
* Call @ref sd_ble_opt_set with this option prior to calling @ref sd_ble_gap_adv_start or @ref sd_ble_gap_connect.
*
* The bandwidth configurations set via @ref sd_ble_opt_set are maintained separately for central and peripheral
* connections. The given configurations are used for all future connections of the role indicated in this structure
* unless they are changed by subsequent @ref sd_ble_opt_set calls.
*
* @note When this option is not used, the SoftDevice will use the default options:
* - @ref BLE_CONN_BW_HIGH for @ref BLE_GAP_ROLE_PERIPH connections (both transmission and reception).
* - @ref BLE_CONN_BW_MID for @ref BLE_GAP_ROLE_CENTRAL connections (both transmisison and reception).
* This option allows the application to selectively override these defaults for each role.
*
* @note The global memory pool configuration can be set with the @ref ble_conn_bw_counts_t configuration parameter, which
* is provided to @ref sd_ble_enable.
*
* @note Please refer to SoftDevice Specification for more information on bandwidth configuration.
*
* @mscs
* @mmsc{@ref BLE_COMMON_CONF_BW}
* @endmscs
*
* @retval ::NRF_SUCCESS Set successfully.
* @retval ::BLE_ERROR_INVALID_ROLE The role is invalid.
* @retval ::NRF_ERROR_INVALID_PARAM Invalid bandwidth configuration parameters.
* @retval ::NRF_ERROR_NOT_SUPPORTED If the combination of role and bandwidth configuration is not supported.
*/
typedef struct
{
uint8_t role; /**< BLE role of the connection, see @ref BLE_GAP_ROLES. */
ble_conn_bw_t conn_bw; /**< Bandwidth configuration parameters. */
} ble_common_opt_conn_bw_t;
/**@brief Option structure for common options. */
typedef union
{
ble_common_opt_conn_bw_t conn_bw; /**< Parameters for the connection bandwidth option. */
ble_common_opt_pa_lna_t pa_lna; /**< Parameters for controlling PA and LNA pin toggling. */
} ble_common_opt_t;
/**@brief Common BLE Option type, wrapping the module specific options. */
typedef union
{
ble_common_opt_t common_opt; /**< COMMON options, opt_id in @ref BLE_COMMON_OPTS series. */
ble_gap_opt_t gap_opt; /**< GAP option, opt_id in @ref BLE_GAP_OPTS series. */
} ble_opt_t;
/**
* @brief BLE bandwidth count parameters
*
* These parameters are used to configure the memory pools allocated within the SoftDevice for application packets
* (both transmission and reception) for all connections.
*
* @note The sum of all three counts must add up to the sum of @ref ble_gap_enable_params_t::central_conn_count and
* @ref ble_gap_enable_params_t::periph_conn_count in @ref ble_gap_enable_params_t.
*/
typedef struct {
uint8_t high_count; /**< Total number of high bandwidth TX or RX memory pools available to the application at runtime for all active connections. */
uint8_t mid_count; /**< Total number of medium bandwidth TX or RX memory pools available to the application at runtime for all active connections. */
uint8_t low_count; /**< Total number of low bandwidth TX or RX memory pools available to the application at runtime for all active connections. */
} ble_conn_bw_count_t;
/**
* @brief BLE bandwidth global memory pool configuration parameters
*
* These configuration parameters are used to set the amount of memory dedicated to application packets for
* all connections. The application should specify the most demanding configuration for the intended use.
*
* Please refer to the SoftDevice Specification for more information on bandwidth configuration.
*
* @note Each connection created at runtime requires both a TX and an RX memory pool. By the use of these configuration
* parameters, the application can decide the size and total number of the global memory pools that will be later
* available for connection creation.
*
* @mscs
* @mmsc{@ref BLE_COMMON_CONF_BW}
* @endmscs
*
*/
typedef struct {
ble_conn_bw_count_t tx_counts; /**< Global memory pool configuration for transmission.*/
ble_conn_bw_count_t rx_counts; /**< Global memory pool configuration for reception.*/
} ble_conn_bw_counts_t;
/**
* @brief BLE Common Initialization parameters.
*
* @note If @ref p_conn_bw_counts is NULL the SoftDevice will assume default bandwidth configuration for all connections.
* To fit a custom bandwidth configuration requirement, the application developer may have to specify a custom memory
* pool configuration here. See @ref ble_common_opt_conn_bw_t for bandwidth configuration of individual connections.
* Please refer to the SoftDevice Specification for more information on bandwidth configuration.
*/
typedef struct
{
uint16_t vs_uuid_count; /**< Maximum number of 128-bit, Vendor Specific UUID bases to allocate. */
ble_conn_bw_counts_t *p_conn_bw_counts; /**< Bandwidth configuration parameters or NULL for defaults. */
} ble_common_enable_params_t;
/**
* @brief BLE Initialization parameters.
*/
typedef struct
{
ble_common_enable_params_t common_enable_params; /**< Common init parameters @ref ble_common_enable_params_t. */
ble_gap_enable_params_t gap_enable_params; /**< GAP init parameters @ref ble_gap_enable_params_t. */
ble_gatts_enable_params_t gatts_enable_params; /**< GATTS init parameters @ref ble_gatts_enable_params_t. */
} ble_enable_params_t;
/** @} */
/** @addtogroup BLE_COMMON_FUNCTIONS Functions
* @{ */
/**@brief Enable the BLE stack
*
* @param[in, out] p_ble_enable_params Pointer to ble_enable_params_t
* @param[in, out] p_app_ram_base Pointer to a variable containing the start address of the application RAM region
* (APP_RAM_BASE). On return, this will contain the minimum start address of the application RAM region required by the
* SoftDevice for this configuration. Calling @ref sd_ble_enable() with *p_app_ram_base set to 0 can be used during
* development to find out how much memory a specific configuration will need.
*
* @note The memory requirement for a specific configuration will not increase between SoftDevices with the same major
* version number.
*
* @note At runtime the IC's RAM is split into 2 regions: The SoftDevice RAM region is located between 0x20000000 and
* APP_RAM_BASE-1 and the application's RAM region is located between APP_RAM_BASE and the start of the call stack.
*
* @details This call initializes the BLE stack, no other BLE related function can be called before this one.
*
* @mscs
* @mmsc{@ref BLE_COMMON_ENABLE}
* @endmscs
*
* @retval ::NRF_SUCCESS The BLE stack has been initialized successfully.
* @retval ::NRF_ERROR_INVALID_STATE The BLE stack had already been initialized and cannot be reinitialized.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied.
* @retval ::NRF_ERROR_INVALID_LENGTH The specified Attribute Table size is either too small or not a multiple of 4.
* The minimum acceptable size is defined by @ref BLE_GATTS_ATTR_TAB_SIZE_MIN.
* @retval ::NRF_ERROR_INVALID_PARAM Incorrectly configured VS UUID count or connection count parameters.
* @retval ::NRF_ERROR_NO_MEM The amount of memory assigned to the SoftDevice by *p_app_ram_base is not
* large enough to fit this configuration's memory requirement. Check *p_app_ram_base
* and set the start address of the application RAM region accordingly.
* @retval ::NRF_ERROR_CONN_COUNT The requested number of connections exceeds the maximum supported by the SoftDevice.
* Please refer to the SoftDevice Specification for more information on role configuration.
*/
SVCALL(SD_BLE_ENABLE, uint32_t, sd_ble_enable(ble_enable_params_t * p_ble_enable_params, uint32_t * p_app_ram_base));
/**@brief Get an event from the pending events queue.
*
* @param[out] p_dest Pointer to buffer to be filled in with an event, or NULL to retrieve the event length.
* This buffer <b>must be 4-byte aligned in memory</b>.
* @param[in, out] p_len Pointer the length of the buffer, on return it is filled with the event length.
*
* @details This call allows the application to pull a BLE event from the BLE stack. The application is signaled that
* an event is available from the BLE stack by the triggering of the SD_EVT_IRQn interrupt.
* The application is free to choose whether to call this function from thread mode (main context) or directly from the
* Interrupt Service Routine that maps to SD_EVT_IRQn. In any case however, and because the BLE stack runs at a higher
* priority than the application, this function should be called in a loop (until @ref NRF_ERROR_NOT_FOUND is returned)
* every time SD_EVT_IRQn is raised to ensure that all available events are pulled from the BLE stack. Failure to do so
* could potentially leave events in the internal queue without the application being aware of this fact. Sizing the
* p_dest buffer is equally important, since the application needs to provide all the memory necessary for the event to
* be copied into application memory. If the buffer provided is not large enough to fit the entire contents of the event,
* @ref NRF_ERROR_DATA_SIZE will be returned and the application can then call again with a larger buffer size.
* Please note that because of the variable length nature of some events, sizeof(ble_evt_t) will not always be large
* enough to fit certain events, and so it is the application's responsibility to provide an amount of memory large
* enough so that the relevant event is copied in full. The application may "peek" the event length by providing p_dest
* as a NULL pointer and inspecting the value of *p_len upon return:
*
* \code
* uint16_t len;
* errcode = sd_ble_evt_get(NULL, &len);
* \endcode
*
* @note The pointer supplied must be aligned to the extend defined by @ref BLE_EVTS_PTR_ALIGNMENT
*
* @mscs
* @mmsc{@ref BLE_COMMON_IRQ_EVT_MSC}
* @mmsc{@ref BLE_COMMON_THREAD_EVT_MSC}
* @endmscs
*
* @retval ::NRF_SUCCESS Event pulled and stored into the supplied buffer.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid or not sufficiently aligned pointer supplied.
* @retval ::NRF_ERROR_NOT_FOUND No events ready to be pulled.
* @retval ::NRF_ERROR_DATA_SIZE Event ready but could not fit into the supplied buffer.
*/
SVCALL(SD_BLE_EVT_GET, uint32_t, sd_ble_evt_get(uint8_t *p_dest, uint16_t *p_len));
/**@brief Get the total number of available guaranteed application transmission packets for a particular connection.
*
* @details This call allows the application to obtain the total number of guaranteed application transmission packets
* available for a connection. Please note that this does not return the number of free packets, but rather the total
* amount of them for that particular connection. The application has two options to handle transmitting application packets:
* - Use a simple arithmetic calculation: after connection creation time the application should use this function to
* find out the total amount of guaranteed packets available to it and store it in a variable.
* Every time a packet is successfully queued for a transmission on this connection using any of the exposed functions in
* this BLE API, the application should decrement that variable. Conversely, whenever a @ref BLE_EVT_TX_COMPLETE event
* with the conn_handle matching the particular connection is received by the application, it should retrieve the count
* field in such event and add that number to the same variable storing the number of available guaranteed packets. This
* mechanism allows the application to be aware at any time of the number of guaranteed application packets available for
* each of the active connections, and therefore it can know with certainty whether it is possible to send more data or
* it has to wait for a @ref BLE_EVT_TX_COMPLETE event before it proceeds.
* The application can still pursue transmissions when the number of guaranteed application packets available is smaller
* than or equal to zero, but successful queuing of the tranmsission is not guaranteed.
* - Choose to simply not keep track of available packets at all, and instead handle the @ref BLE_ERROR_NO_TX_PACKETS error
* by queueing the packet to be transmitted and try again as soon as a @ref BLE_EVT_TX_COMPLETE event arrives.
*
* The API functions that <b>may</b> consume an application packet depending on the parameters supplied to them can be found below:
* - @ref sd_ble_gattc_write (write without response only)
* - @ref sd_ble_gatts_hvx (notifications only)
* - @ref sd_ble_l2cap_tx (all packets)
*
* @param[in] conn_handle Connection handle.
* @param[out] p_count Pointer to a uint8_t which will contain the number of application transmission packets upon
* successful return.
* @mscs
* @mmsc{@ref BLE_COMMON_APP_BUFF_MSC}
* @endmscs
*
* @retval ::NRF_SUCCESS Number of application transmission packets retrieved successfully.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
*/
SVCALL(SD_BLE_TX_PACKET_COUNT_GET, uint32_t, sd_ble_tx_packet_count_get(uint16_t conn_handle, uint8_t *p_count));
/**@brief Add a Vendor Specific UUID.
*
* @details This call enables the application to add a vendor specific UUID to the BLE stack's table, for later use
* all other modules and APIs. This then allows the application to use the shorter, 24-bit @ref ble_uuid_t format
* when dealing with both 16-bit and 128-bit UUIDs without having to check for lengths and having split code paths.
* The way that this is accomplished is by extending the grouping mechanism that the Bluetooth SIG standard base
* UUID uses for all other 128-bit UUIDs. The type field in the @ref ble_uuid_t structure is an index (relative to
* @ref BLE_UUID_TYPE_VENDOR_BEGIN) to the table populated by multiple calls to this function, and the uuid field
* in the same structure contains the 2 bytes at indices 12 and 13. The number of possible 128-bit UUIDs available to
* the application is therefore the number of Vendor Specific UUIDs added with the help of this function times 65536,
* although restricted to modifying bytes 12 and 13 for each of the entries in the supplied array.
*
* @note Bytes 12 and 13 of the provided UUID will not be used internally, since those are always replaced by
* the 16-bit uuid field in @ref ble_uuid_t.
*
* @note If a UUID is already present in the BLE stack's internal table, the corresponding index will be returned in
* p_uuid_type along with an NRF_SUCCESS error code.
*
* @param[in] p_vs_uuid Pointer to a 16-octet (128-bit) little endian Vendor Specific UUID disregarding
* bytes 12 and 13.
* @param[out] p_uuid_type Pointer to a uint8_t where the type field in @ref ble_uuid_t corresponding to this UUID will be stored.
*
* @retval ::NRF_SUCCESS Successfully added the Vendor Specific UUID.
* @retval ::NRF_ERROR_INVALID_ADDR If p_vs_uuid or p_uuid_type is NULL or invalid.
* @retval ::NRF_ERROR_NO_MEM If there are no more free slots for VS UUIDs.
*/
SVCALL(SD_BLE_UUID_VS_ADD, uint32_t, sd_ble_uuid_vs_add(ble_uuid128_t const *p_vs_uuid, uint8_t *p_uuid_type));
/** @brief Decode little endian raw UUID bytes (16-bit or 128-bit) into a 24 bit @ref ble_uuid_t structure.
*
* @details The raw UUID bytes excluding bytes 12 and 13 (i.e. bytes 0-11 and 14-15) of p_uuid_le are compared
* to the corresponding ones in each entry of the table of vendor specific UUIDs populated with @ref sd_ble_uuid_vs_add
* to look for a match. If there is such a match, bytes 12 and 13 are returned as p_uuid->uuid and the index
* relative to @ref BLE_UUID_TYPE_VENDOR_BEGIN as p_uuid->type.
*
* @note If the UUID length supplied is 2, then the type set by this call will always be @ref BLE_UUID_TYPE_BLE.
*
* @param[in] uuid_le_len Length in bytes of the buffer pointed to by p_uuid_le (must be 2 or 16 bytes).
* @param[in] p_uuid_le Pointer pointing to little endian raw UUID bytes.
* @param[out] p_uuid Pointer to a @ref ble_uuid_t structure to be filled in.
*
* @retval ::NRF_SUCCESS Successfully decoded into the @ref ble_uuid_t structure.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::NRF_ERROR_INVALID_LENGTH Invalid UUID length.
* @retval ::NRF_ERROR_NOT_FOUND For a 128-bit UUID, no match in the populated table of UUIDs.
*/
SVCALL(SD_BLE_UUID_DECODE, uint32_t, sd_ble_uuid_decode(uint8_t uuid_le_len, uint8_t const *p_uuid_le, ble_uuid_t *p_uuid));
/** @brief Encode a @ref ble_uuid_t structure into little endian raw UUID bytes (16-bit or 128-bit).
*
* @note The pointer to the destination buffer p_uuid_le may be NULL, in which case only the validity and size of p_uuid is computed.
*
* @param[in] p_uuid Pointer to a @ref ble_uuid_t structure that will be encoded into bytes.
* @param[out] p_uuid_le_len Pointer to a uint8_t that will be filled with the encoded length (2 or 16 bytes).
* @param[out] p_uuid_le Pointer to a buffer where the little endian raw UUID bytes (2 or 16) will be stored.
*
* @retval ::NRF_SUCCESS Successfully encoded into the buffer.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::NRF_ERROR_INVALID_PARAM Invalid UUID type.
*/
SVCALL(SD_BLE_UUID_ENCODE, uint32_t, sd_ble_uuid_encode(ble_uuid_t const *p_uuid, uint8_t *p_uuid_le_len, uint8_t *p_uuid_le));
/**@brief Get Version Information.
*
* @details This call allows the application to get the BLE stack version information.
*
* @param[out] p_version Pointer to a ble_version_t structure to be filled in.
*
* @retval ::NRF_SUCCESS Version information stored successfully.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::NRF_ERROR_BUSY The BLE stack is busy (typically doing a locally-initiated disconnection procedure).
*/
SVCALL(SD_BLE_VERSION_GET, uint32_t, sd_ble_version_get(ble_version_t *p_version));
/**@brief Provide a user memory block.
*
* @note This call can only be used as a response to a @ref BLE_EVT_USER_MEM_REQUEST event issued to the application.
*
* @param[in] conn_handle Connection handle.
* @param[in,out] p_block Pointer to a user memory block structure.
*
* @mscs
* @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_PEER_CANCEL_MSC}
* @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC}
* @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC}
* @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC}
* @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_NOAUTH_MSC}
* @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC}
* @endmscs
*
* @retval ::NRF_SUCCESS Successfully queued a response to the peer.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
* @retval ::NRF_ERROR_INVALID_STATE Invalid Connection state or no execute write request pending.
* @retval ::NRF_ERROR_BUSY The BLE stack is busy. Retry at later time.
*/
SVCALL(SD_BLE_USER_MEM_REPLY, uint32_t, sd_ble_user_mem_reply(uint16_t conn_handle, ble_user_mem_block_t const *p_block));
/**@brief Set a BLE option.
*
* @details This call allows the application to set the value of an option.
*
* @mscs
* @mmsc{@ref BLE_GAP_PERIPH_BONDING_STATIC_PK_MSC}
* @mmsc{@ref BLE_COMMON_CONF_BW}
* @endmscs
*
* @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS.
* @param[in] p_opt Pointer to a ble_opt_t structure containing the option value.
*
* @retval ::NRF_SUCCESS Option set successfully.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
* @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints.
* @retval ::NRF_ERROR_INVALID_STATE Unable to set the parameter at this time.
* @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed.
*/
SVCALL(SD_BLE_OPT_SET, uint32_t, sd_ble_opt_set(uint32_t opt_id, ble_opt_t const *p_opt));
/**@brief Get a BLE option.
*
* @details This call allows the application to retrieve the value of an option.
*
* @param[in] opt_id Option ID, see @ref BLE_COMMON_OPTS and @ref BLE_GAP_OPTS.
* @param[out] p_opt Pointer to a ble_opt_t structure to be filled in.
*
* @retval ::NRF_SUCCESS Option retrieved successfully.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
* @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, check parameter limits and constraints.
* @retval ::NRF_ERROR_INVALID_STATE Unable to retrieve the parameter at this time.
* @retval ::NRF_ERROR_BUSY The BLE stack is busy or the previous procedure has not completed.
* @retval ::NRF_ERROR_NOT_SUPPORTED This option is not supported.
*
*/
SVCALL(SD_BLE_OPT_GET, uint32_t, sd_ble_opt_get(uint32_t opt_id, ble_opt_t *p_opt));
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* NRF_BLE_H__ */
/**
@}
@}
*/

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/*
* Copyright (c) 2000 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/**
@addtogroup BLE_COMMON
@{
@addtogroup nrf_error
@{
@ingroup BLE_COMMON
@}
@defgroup ble_err General error codes
@{
@brief General error code definitions for the BLE API.
@ingroup BLE_COMMON
*/
#ifndef NRF_BLE_ERR_H__
#define NRF_BLE_ERR_H__
#include "nrf_error.h"
#ifdef __cplusplus
extern "C" {
#endif
/* @defgroup BLE_ERRORS Error Codes
* @{ */
#define BLE_ERROR_NOT_ENABLED (NRF_ERROR_STK_BASE_NUM+0x001) /**< @ref sd_ble_enable has not been called. */
#define BLE_ERROR_INVALID_CONN_HANDLE (NRF_ERROR_STK_BASE_NUM+0x002) /**< Invalid connection handle. */
#define BLE_ERROR_INVALID_ATTR_HANDLE (NRF_ERROR_STK_BASE_NUM+0x003) /**< Invalid attribute handle. */
#define BLE_ERROR_NO_TX_PACKETS (NRF_ERROR_STK_BASE_NUM+0x004) /**< Not enough application packets available on this connection. */
#define BLE_ERROR_INVALID_ROLE (NRF_ERROR_STK_BASE_NUM+0x005) /**< Invalid role. */
/** @} */
/** @defgroup BLE_ERROR_SUBRANGES Module specific error code subranges
* @brief Assignment of subranges for module specific error codes.
* @note For specific error codes, see ble_<module>.h or ble_error_<module>.h.
* @{ */
#define NRF_L2CAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x100) /**< L2CAP specific errors. */
#define NRF_GAP_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x200) /**< GAP specific errors. */
#define NRF_GATTC_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x300) /**< GATT client specific errors. */
#define NRF_GATTS_ERR_BASE (NRF_ERROR_STK_BASE_NUM+0x400) /**< GATT server specific errors. */
/** @} */
#ifdef __cplusplus
}
#endif
#endif
/**
@}
@}
*/

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/*
* Copyright (c) 2000 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/**
@addtogroup BLE_GATT Generic Attribute Profile (GATT) Common
@{
@brief Common definitions and prototypes for the GATT interfaces.
*/
#ifndef NRF_BLE_GATT_H__
#define NRF_BLE_GATT_H__
#include "nrf_ble_types.h"
#include "nrf_ble_ranges.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup BLE_GATT_DEFINES Defines
* @{ */
/** @brief Default MTU size. */
#define GATT_MTU_SIZE_DEFAULT 23
/** @brief Only the default MTU size of 23 is currently supported. */
#define GATT_RX_MTU 23
/**@brief Invalid Attribute Handle. */
#define BLE_GATT_HANDLE_INVALID 0x0000
/**@brief First Attribute Handle. */
#define BLE_GATT_HANDLE_START 0x0001
/**@brief Last Attribute Handle. */
#define BLE_GATT_HANDLE_END 0xFFFF
/** @defgroup BLE_GATT_TIMEOUT_SOURCES GATT Timeout sources
* @{ */
#define BLE_GATT_TIMEOUT_SRC_PROTOCOL 0x00 /**< ATT Protocol timeout. */
/** @} */
/** @defgroup BLE_GATT_WRITE_OPS GATT Write operations
* @{ */
#define BLE_GATT_OP_INVALID 0x00 /**< Invalid Operation. */
#define BLE_GATT_OP_WRITE_REQ 0x01 /**< Write Request. */
#define BLE_GATT_OP_WRITE_CMD 0x02 /**< Write Command. */
#define BLE_GATT_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */
#define BLE_GATT_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */
#define BLE_GATT_OP_EXEC_WRITE_REQ 0x05 /**< Execute Write Request. */
/** @} */
/** @defgroup BLE_GATT_EXEC_WRITE_FLAGS GATT Execute Write flags
* @{ */
#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_CANCEL 0x00
#define BLE_GATT_EXEC_WRITE_FLAG_PREPARED_WRITE 0x01
/** @} */
/** @defgroup BLE_GATT_HVX_TYPES GATT Handle Value operations
* @{ */
#define BLE_GATT_HVX_INVALID 0x00 /**< Invalid Operation. */
#define BLE_GATT_HVX_NOTIFICATION 0x01 /**< Handle Value Notification. */
#define BLE_GATT_HVX_INDICATION 0x02 /**< Handle Value Indication. */
/** @} */
/** @defgroup BLE_GATT_STATUS_CODES GATT Status Codes
* @{ */
#define BLE_GATT_STATUS_SUCCESS 0x0000 /**< Success. */
#define BLE_GATT_STATUS_UNKNOWN 0x0001 /**< Unknown or not applicable status. */
#define BLE_GATT_STATUS_ATTERR_INVALID 0x0100 /**< ATT Error: Invalid Error Code. */
#define BLE_GATT_STATUS_ATTERR_INVALID_HANDLE 0x0101 /**< ATT Error: Invalid Attribute Handle. */
#define BLE_GATT_STATUS_ATTERR_READ_NOT_PERMITTED 0x0102 /**< ATT Error: Read not permitted. */
#define BLE_GATT_STATUS_ATTERR_WRITE_NOT_PERMITTED 0x0103 /**< ATT Error: Write not permitted. */
#define BLE_GATT_STATUS_ATTERR_INVALID_PDU 0x0104 /**< ATT Error: Used in ATT as Invalid PDU. */
#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHENTICATION 0x0105 /**< ATT Error: Authenticated link required. */
#define BLE_GATT_STATUS_ATTERR_REQUEST_NOT_SUPPORTED 0x0106 /**< ATT Error: Used in ATT as Request Not Supported. */
#define BLE_GATT_STATUS_ATTERR_INVALID_OFFSET 0x0107 /**< ATT Error: Offset specified was past the end of the attribute. */
#define BLE_GATT_STATUS_ATTERR_INSUF_AUTHORIZATION 0x0108 /**< ATT Error: Used in ATT as Insufficient Authorisation. */
#define BLE_GATT_STATUS_ATTERR_PREPARE_QUEUE_FULL 0x0109 /**< ATT Error: Used in ATT as Prepare Queue Full. */
#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_FOUND 0x010A /**< ATT Error: Used in ATT as Attribute not found. */
#define BLE_GATT_STATUS_ATTERR_ATTRIBUTE_NOT_LONG 0x010B /**< ATT Error: Attribute cannot be read or written using read/write blob requests. */
#define BLE_GATT_STATUS_ATTERR_INSUF_ENC_KEY_SIZE 0x010C /**< ATT Error: Encryption key size used is insufficient. */
#define BLE_GATT_STATUS_ATTERR_INVALID_ATT_VAL_LENGTH 0x010D /**< ATT Error: Invalid value size. */
#define BLE_GATT_STATUS_ATTERR_UNLIKELY_ERROR 0x010E /**< ATT Error: Very unlikely error. */
#define BLE_GATT_STATUS_ATTERR_INSUF_ENCRYPTION 0x010F /**< ATT Error: Encrypted link required. */
#define BLE_GATT_STATUS_ATTERR_UNSUPPORTED_GROUP_TYPE 0x0110 /**< ATT Error: Attribute type is not a supported grouping attribute. */
#define BLE_GATT_STATUS_ATTERR_INSUF_RESOURCES 0x0111 /**< ATT Error: Encrypted link required. */
#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_BEGIN 0x0112 /**< ATT Error: Reserved for Future Use range #1 begin. */
#define BLE_GATT_STATUS_ATTERR_RFU_RANGE1_END 0x017F /**< ATT Error: Reserved for Future Use range #1 end. */
#define BLE_GATT_STATUS_ATTERR_APP_BEGIN 0x0180 /**< ATT Error: Application range begin. */
#define BLE_GATT_STATUS_ATTERR_APP_END 0x019F /**< ATT Error: Application range end. */
#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_BEGIN 0x01A0 /**< ATT Error: Reserved for Future Use range #2 begin. */
#define BLE_GATT_STATUS_ATTERR_RFU_RANGE2_END 0x01DF /**< ATT Error: Reserved for Future Use range #2 end. */
#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_BEGIN 0x01E0 /**< ATT Error: Reserved for Future Use range #3 begin. */
#define BLE_GATT_STATUS_ATTERR_RFU_RANGE3_END 0x01FC /**< ATT Error: Reserved for Future Use range #3 end. */
#define BLE_GATT_STATUS_ATTERR_CPS_CCCD_CONFIG_ERROR 0x01FD /**< ATT Common Profile and Service Error: Client Characteristic Configuration Descriptor improperly configured. */
#define BLE_GATT_STATUS_ATTERR_CPS_PROC_ALR_IN_PROG 0x01FE /**< ATT Common Profile and Service Error: Procedure Already in Progress. */
#define BLE_GATT_STATUS_ATTERR_CPS_OUT_OF_RANGE 0x01FF /**< ATT Common Profile and Service Error: Out Of Range. */
/** @} */
/** @defgroup BLE_GATT_CPF_FORMATS Characteristic Presentation Formats
* @note Found at http://developer.bluetooth.org/gatt/descriptors/Pages/DescriptorViewer.aspx?u=org.bluetooth.descriptor.gatt.characteristic_presentation_format.xml
* @{ */
#define BLE_GATT_CPF_FORMAT_RFU 0x00 /**< Reserved For Future Use. */
#define BLE_GATT_CPF_FORMAT_BOOLEAN 0x01 /**< Boolean. */
#define BLE_GATT_CPF_FORMAT_2BIT 0x02 /**< Unsigned 2-bit integer. */
#define BLE_GATT_CPF_FORMAT_NIBBLE 0x03 /**< Unsigned 4-bit integer. */
#define BLE_GATT_CPF_FORMAT_UINT8 0x04 /**< Unsigned 8-bit integer. */
#define BLE_GATT_CPF_FORMAT_UINT12 0x05 /**< Unsigned 12-bit integer. */
#define BLE_GATT_CPF_FORMAT_UINT16 0x06 /**< Unsigned 16-bit integer. */
#define BLE_GATT_CPF_FORMAT_UINT24 0x07 /**< Unsigned 24-bit integer. */
#define BLE_GATT_CPF_FORMAT_UINT32 0x08 /**< Unsigned 32-bit integer. */
#define BLE_GATT_CPF_FORMAT_UINT48 0x09 /**< Unsigned 48-bit integer. */
#define BLE_GATT_CPF_FORMAT_UINT64 0x0A /**< Unsigned 64-bit integer. */
#define BLE_GATT_CPF_FORMAT_UINT128 0x0B /**< Unsigned 128-bit integer. */
#define BLE_GATT_CPF_FORMAT_SINT8 0x0C /**< Signed 2-bit integer. */
#define BLE_GATT_CPF_FORMAT_SINT12 0x0D /**< Signed 12-bit integer. */
#define BLE_GATT_CPF_FORMAT_SINT16 0x0E /**< Signed 16-bit integer. */
#define BLE_GATT_CPF_FORMAT_SINT24 0x0F /**< Signed 24-bit integer. */
#define BLE_GATT_CPF_FORMAT_SINT32 0x10 /**< Signed 32-bit integer. */
#define BLE_GATT_CPF_FORMAT_SINT48 0x11 /**< Signed 48-bit integer. */
#define BLE_GATT_CPF_FORMAT_SINT64 0x12 /**< Signed 64-bit integer. */
#define BLE_GATT_CPF_FORMAT_SINT128 0x13 /**< Signed 128-bit integer. */
#define BLE_GATT_CPF_FORMAT_FLOAT32 0x14 /**< IEEE-754 32-bit floating point. */
#define BLE_GATT_CPF_FORMAT_FLOAT64 0x15 /**< IEEE-754 64-bit floating point. */
#define BLE_GATT_CPF_FORMAT_SFLOAT 0x16 /**< IEEE-11073 16-bit SFLOAT. */
#define BLE_GATT_CPF_FORMAT_FLOAT 0x17 /**< IEEE-11073 32-bit FLOAT. */
#define BLE_GATT_CPF_FORMAT_DUINT16 0x18 /**< IEEE-20601 format. */
#define BLE_GATT_CPF_FORMAT_UTF8S 0x19 /**< UTF-8 string. */
#define BLE_GATT_CPF_FORMAT_UTF16S 0x1A /**< UTF-16 string. */
#define BLE_GATT_CPF_FORMAT_STRUCT 0x1B /**< Opaque Structure. */
/** @} */
/** @defgroup BLE_GATT_CPF_NAMESPACES GATT Bluetooth Namespaces
* @{
*/
#define BLE_GATT_CPF_NAMESPACE_BTSIG 0x01 /**< Bluetooth SIG defined Namespace. */
#define BLE_GATT_CPF_NAMESPACE_DESCRIPTION_UNKNOWN 0x0000 /**< Namespace Description Unknown. */
/** @} */
/** @} */
/** @addtogroup BLE_GATT_STRUCTURES Structures
* @{ */
/**@brief GATT Characteristic Properties. */
typedef struct
{
/* Standard properties */
uint8_t broadcast :1; /**< Broadcasting of the value permitted. */
uint8_t read :1; /**< Reading the value permitted. */
uint8_t write_wo_resp :1; /**< Writing the value with Write Command permitted. */
uint8_t write :1; /**< Writing the value with Write Request permitted. */
uint8_t notify :1; /**< Notications of the value permitted. */
uint8_t indicate :1; /**< Indications of the value permitted. */
uint8_t auth_signed_wr :1; /**< Writing the value with Signed Write Command permitted. */
} ble_gatt_char_props_t;
/**@brief GATT Characteristic Extended Properties. */
typedef struct
{
/* Extended properties */
uint8_t reliable_wr :1; /**< Writing the value with Queued Write operations permitted. */
uint8_t wr_aux :1; /**< Writing the Characteristic User Description descriptor permitted. */
} ble_gatt_char_ext_props_t;
#ifdef __cplusplus
}
#endif
#endif // NRF_BLE_GATT_H__
/** @} */
/**
@}
@}
*/

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targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/nrf_ble_gattc.h
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@ -1,572 +0,0 @@
/*
* Copyright (c) 2000 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/**
@addtogroup BLE_GATTC Generic Attribute Profile (GATT) Client
@{
@brief Definitions and prototypes for the GATT Client interface.
*/
#ifndef NRF_BLE_GATTC_H__
#define NRF_BLE_GATTC_H__
#include "nrf_ble_gatt.h"
#include "nrf_ble_types.h"
#include "nrf_ble_ranges.h"
#include "nrf_svc.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup BLE_GATTC_ENUMERATIONS Enumerations
* @{ */
/**@brief GATTC API SVC numbers. */
enum BLE_GATTC_SVCS
{
SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER = BLE_GATTC_SVC_BASE, /**< Primary Service Discovery. */
SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, /**< Relationship Discovery. */
SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, /**< Characteristic Discovery. */
SD_BLE_GATTC_DESCRIPTORS_DISCOVER, /**< Characteristic Descriptor Discovery. */
SD_BLE_GATTC_ATTR_INFO_DISCOVER, /**< Attribute Information Discovery. */
SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, /**< Read Characteristic Value by UUID. */
SD_BLE_GATTC_READ, /**< Generic read. */
SD_BLE_GATTC_CHAR_VALUES_READ, /**< Read multiple Characteristic Values. */
SD_BLE_GATTC_WRITE, /**< Generic write. */
SD_BLE_GATTC_HV_CONFIRM, /**< Handle Value Confirmation. */
};
/**
* @brief GATT Client Event IDs.
*/
enum BLE_GATTC_EVTS
{
BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP = BLE_GATTC_EVT_BASE, /**< Primary Service Discovery Response event. \n See @ref ble_gattc_evt_prim_srvc_disc_rsp_t. */
BLE_GATTC_EVT_REL_DISC_RSP, /**< Relationship Discovery Response event. \n See @ref ble_gattc_evt_rel_disc_rsp_t. */
BLE_GATTC_EVT_CHAR_DISC_RSP, /**< Characteristic Discovery Response event. \n See @ref ble_gattc_evt_char_disc_rsp_t. */
BLE_GATTC_EVT_DESC_DISC_RSP, /**< Descriptor Discovery Response event. \n See @ref ble_gattc_evt_desc_disc_rsp_t. */
BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, /**< Attribute Information Response event. \n See @ref ble_gattc_evt_attr_info_disc_rsp_t. */
BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP, /**< Read By UUID Response event. \n See @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t. */
BLE_GATTC_EVT_READ_RSP, /**< Read Response event. \n See @ref ble_gattc_evt_read_rsp_t. */
BLE_GATTC_EVT_CHAR_VALS_READ_RSP, /**< Read multiple Response event. \n See @ref ble_gattc_evt_char_vals_read_rsp_t. */
BLE_GATTC_EVT_WRITE_RSP, /**< Write Response event. \n See @ref ble_gattc_evt_write_rsp_t. */
BLE_GATTC_EVT_HVX, /**< Handle Value Notification or Indication event. \n Confirm indication with @ref sd_ble_gattc_hv_confirm. \n See @ref ble_gattc_evt_hvx_t. */
BLE_GATTC_EVT_TIMEOUT /**< Timeout event. \n See @ref ble_gattc_evt_timeout_t. */
};
/** @} */
/** @addtogroup BLE_GATTC_DEFINES Defines
* @{ */
/** @defgroup BLE_ERRORS_GATTC SVC return values specific to GATTC
* @{ */
#define BLE_ERROR_GATTC_PROC_NOT_PERMITTED (NRF_GATTC_ERR_BASE + 0x000) /**< Procedure not Permitted. */
/** @} */
/** @defgroup BLE_GATTC_ATTR_INFO_FORMAT Attribute Information Formats
* @{ */
#define BLE_GATTC_ATTR_INFO_FORMAT_16BIT 1 /**< 16-bit Attribute Information Format. */
#define BLE_GATTC_ATTR_INFO_FORMAT_128BIT 2 /**< 128-bit Attribute Information Format. */
/** @} */
/** @} */
/** @addtogroup BLE_GATTC_STRUCTURES Structures
* @{ */
/**@brief Operation Handle Range. */
typedef struct
{
uint16_t start_handle; /**< Start Handle. */
uint16_t end_handle; /**< End Handle. */
} ble_gattc_handle_range_t;
/**@brief GATT service. */
typedef struct
{
ble_uuid_t uuid; /**< Service UUID. */
ble_gattc_handle_range_t handle_range; /**< Service Handle Range. */
} ble_gattc_service_t;
/**@brief GATT include. */
typedef struct
{
uint16_t handle; /**< Include Handle. */
ble_gattc_service_t included_srvc; /**< Handle of the included service. */
} ble_gattc_include_t;
/**@brief GATT characteristic. */
typedef struct
{
ble_uuid_t uuid; /**< Characteristic UUID. */
ble_gatt_char_props_t char_props; /**< Characteristic Properties. */
uint8_t char_ext_props : 1; /**< Extended properties present. */
uint16_t handle_decl; /**< Handle of the Characteristic Declaration. */
uint16_t handle_value; /**< Handle of the Characteristic Value. */
} ble_gattc_char_t;
/**@brief GATT descriptor. */
typedef struct
{
uint16_t handle; /**< Descriptor Handle. */
ble_uuid_t uuid; /**< Descriptor UUID. */
} ble_gattc_desc_t;
/**@brief Write Parameters. */
typedef struct
{
uint8_t write_op; /**< Write Operation to be performed, see @ref BLE_GATT_WRITE_OPS. */
uint8_t flags; /**< Flags, see @ref BLE_GATT_EXEC_WRITE_FLAGS. */
uint16_t handle; /**< Handle to the attribute to be written. */
uint16_t offset; /**< Offset in bytes. @note For WRITE_CMD and WRITE_REQ, offset must be 0. */
uint16_t len; /**< Length of data in bytes. */
uint8_t *p_value; /**< Pointer to the value data. */
} ble_gattc_write_params_t;
/**@brief Attribute Information. */
typedef struct
{
uint16_t handle; /**< Attribute handle. */
union {
ble_uuid_t uuid16; /**< 16-bit Attribute UUID. */
ble_uuid128_t uuid128; /**< 128-bit Attribute UUID. */
} info;
} ble_gattc_attr_info_t;
/**@brief Event structure for @ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP. */
typedef struct
{
uint16_t count; /**< Service count. */
ble_gattc_service_t services[1]; /**< Service data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation.
See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */
} ble_gattc_evt_prim_srvc_disc_rsp_t;
/**@brief Event structure for @ref BLE_GATTC_EVT_REL_DISC_RSP. */
typedef struct
{
uint16_t count; /**< Include count. */
ble_gattc_include_t includes[1]; /**< Include data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation.
See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */
} ble_gattc_evt_rel_disc_rsp_t;
/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_DISC_RSP. */
typedef struct
{
uint16_t count; /**< Characteristic count. */
ble_gattc_char_t chars[1]; /**< Characteristic data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation.
See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */
} ble_gattc_evt_char_disc_rsp_t;
/**@brief Event structure for @ref BLE_GATTC_EVT_DESC_DISC_RSP. */
typedef struct
{
uint16_t count; /**< Descriptor count. */
ble_gattc_desc_t descs[1]; /**< Descriptor data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation.
See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */
} ble_gattc_evt_desc_disc_rsp_t;
/**@brief Event structure for @ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP. */
typedef struct
{
uint16_t count; /**< Attribute count. */
uint8_t format; /**< Attribute information format, see @ref BLE_GATTC_ATTR_INFO_FORMAT. */
ble_gattc_attr_info_t attr_info[1]; /**< Attribute information. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation.
See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */
} ble_gattc_evt_attr_info_disc_rsp_t;
/**@brief GATT read by UUID handle value pair. */
typedef struct
{
uint16_t handle; /**< Attribute Handle. */
uint8_t *p_value; /**< Pointer to value, variable length (length available as value_len in @ref ble_gattc_evt_char_val_by_uuid_read_rsp_t).
Please note that this pointer is absolute to the memory provided by the user when retrieving the event,
so it will effectively point to a location inside the handle_value array. */
} ble_gattc_handle_value_t;
/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP. */
typedef struct
{
uint16_t count; /**< Handle-Value Pair Count. */
uint16_t value_len; /**< Length of the value in Handle-Value(s) list. */
ble_gattc_handle_value_t handle_value[1]; /**< Handle-Value(s) list. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation.
See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */
} ble_gattc_evt_char_val_by_uuid_read_rsp_t;
/**@brief Event structure for @ref BLE_GATTC_EVT_READ_RSP. */
typedef struct
{
uint16_t handle; /**< Attribute Handle. */
uint16_t offset; /**< Offset of the attribute data. */
uint16_t len; /**< Attribute data length. */
uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation.
See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */
} ble_gattc_evt_read_rsp_t;
/**@brief Event structure for @ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP. */
typedef struct
{
uint16_t len; /**< Concatenated Attribute values length. */
uint8_t values[1]; /**< Attribute values. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation.
See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */
} ble_gattc_evt_char_vals_read_rsp_t;
/**@brief Event structure for @ref BLE_GATTC_EVT_WRITE_RSP. */
typedef struct
{
uint16_t handle; /**< Attribute Handle. */
uint8_t write_op; /**< Type of write operation, see @ref BLE_GATT_WRITE_OPS. */
uint16_t offset; /**< Data offset. */
uint16_t len; /**< Data length. */
uint8_t data[1]; /**< Data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation.
See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */
} ble_gattc_evt_write_rsp_t;
/**@brief Event structure for @ref BLE_GATTC_EVT_HVX. */
typedef struct
{
uint16_t handle; /**< Handle to which the HVx operation applies. */
uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */
uint16_t len; /**< Attribute data length. */
uint8_t data[1]; /**< Attribute data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation.
See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */
} ble_gattc_evt_hvx_t;
/**@brief Event structure for @ref BLE_GATTC_EVT_TIMEOUT. */
typedef struct
{
uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */
} ble_gattc_evt_timeout_t;
/**@brief GATTC event structure. */
typedef struct
{
uint16_t conn_handle; /**< Connection Handle on which event occured. */
uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */
uint16_t error_handle; /**< In case of error: The handle causing the error. In all other cases @ref BLE_GATT_HANDLE_INVALID. */
union
{
ble_gattc_evt_prim_srvc_disc_rsp_t prim_srvc_disc_rsp; /**< Primary Service Discovery Response Event Parameters. */
ble_gattc_evt_rel_disc_rsp_t rel_disc_rsp; /**< Relationship Discovery Response Event Parameters. */
ble_gattc_evt_char_disc_rsp_t char_disc_rsp; /**< Characteristic Discovery Response Event Parameters. */
ble_gattc_evt_desc_disc_rsp_t desc_disc_rsp; /**< Descriptor Discovery Response Event Parameters. */
ble_gattc_evt_char_val_by_uuid_read_rsp_t char_val_by_uuid_read_rsp; /**< Characteristic Value Read by UUID Response Event Parameters. */
ble_gattc_evt_read_rsp_t read_rsp; /**< Read Response Event Parameters. */
ble_gattc_evt_char_vals_read_rsp_t char_vals_read_rsp; /**< Characteristic Values Read Response Event Parameters. */
ble_gattc_evt_write_rsp_t write_rsp; /**< Write Response Event Parameters. */
ble_gattc_evt_hvx_t hvx; /**< Handle Value Notification/Indication Event Parameters. */
ble_gattc_evt_timeout_t timeout; /**< Timeout Event Parameters. */
ble_gattc_evt_attr_info_disc_rsp_t attr_info_disc_rsp; /**< Attribute Information Discovery Event Parameters. */
} params; /**< Event Parameters. @note Only valid if @ref gatt_status == @ref BLE_GATT_STATUS_SUCCESS. */
} ble_gattc_evt_t;
/** @} */
/** @addtogroup BLE_GATTC_FUNCTIONS Functions
* @{ */
/**@brief Initiate or continue a GATT Primary Service Discovery procedure.
*
* @details This function initiates or resumes a Primary Service discovery procedure, starting from the supplied handle.
* If the last service has not been reached, this function must be called again with an updated start handle value to continue the search.
*
* @note If any of the discovered services have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with
* type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event.
*
* @events
* @event{@ref BLE_GATTC_EVT_PRIM_SRVC_DISC_RSP}
* @endevents
*
* @mscs
* @mmsc{@ref BLE_GATTC_PRIM_SRVC_DISC_MSC}
* @endmscs
*
* @param[in] conn_handle The connection handle identifying the connection to perform this procedure on.
* @param[in] start_handle Handle to start searching from.
* @param[in] p_srvc_uuid Pointer to the service UUID to be found. If it is NULL, all primary services will be returned.
*
* @retval ::NRF_SUCCESS Successfully started or resumed the Primary Service Discovery procedure.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
* @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State.
* @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
* @retval ::NRF_ERROR_BUSY Client procedure already in progress.
*/
SVCALL(SD_BLE_GATTC_PRIMARY_SERVICES_DISCOVER, uint32_t, sd_ble_gattc_primary_services_discover(uint16_t conn_handle, uint16_t start_handle, ble_uuid_t const *p_srvc_uuid));
/**@brief Initiate or continue a GATT Relationship Discovery procedure.
*
* @details This function initiates or resumes the Find Included Services sub-procedure. If the last included service has not been reached,
* this must be called again with an updated handle range to continue the search.
*
* @events
* @event{@ref BLE_GATTC_EVT_REL_DISC_RSP}
* @endevents
*
* @mscs
* @mmsc{@ref BLE_GATTC_REL_DISC_MSC}
* @endmscs
*
* @param[in] conn_handle The connection handle identifying the connection to perform this procedure on.
* @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on.
*
* @retval ::NRF_SUCCESS Successfully started or resumed the Relationship Discovery procedure.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
* @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
* @retval ::NRF_ERROR_BUSY Client procedure already in progress.
*/
SVCALL(SD_BLE_GATTC_RELATIONSHIPS_DISCOVER, uint32_t, sd_ble_gattc_relationships_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range));
/**@brief Initiate or continue a GATT Characteristic Discovery procedure.
*
* @details This function initiates or resumes a Characteristic discovery procedure. If the last Characteristic has not been reached,
* this must be called again with an updated handle range to continue the discovery.
*
* @note If any of the discovered characteristics have 128-bit UUIDs which are not present in the table provided to ble_vs_uuids_assign, a UUID structure with
* type @ref BLE_UUID_TYPE_UNKNOWN will be received in the corresponding event.
*
* @events
* @event{@ref BLE_GATTC_EVT_CHAR_DISC_RSP}
* @endevents
*
* @mscs
* @mmsc{@ref BLE_GATTC_CHAR_DISC_MSC}
* @endmscs
*
* @param[in] conn_handle The connection handle identifying the connection to perform this procedure on.
* @param[in] p_handle_range A pointer to the range of handles of the Service to perform this procedure on.
*
* @retval ::NRF_SUCCESS Successfully started or resumed the Characteristic Discovery procedure.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
* @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::NRF_ERROR_BUSY Client procedure already in progress.
*/
SVCALL(SD_BLE_GATTC_CHARACTERISTICS_DISCOVER, uint32_t, sd_ble_gattc_characteristics_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range));
/**@brief Initiate or continue a GATT Characteristic Descriptor Discovery procedure.
*
* @details This function initiates or resumes a Characteristic Descriptor discovery procedure. If the last Descriptor has not been reached,
* this must be called again with an updated handle range to continue the discovery.
*
* @events
* @event{BLE_GATTC_EVT_DESC_DISC_RSP}
* @endevents
*
* @mscs
* @mmsc{@ref BLE_GATTC_DESC_DISC_MSC}
* @endmscs
*
* @param[in] conn_handle The connection handle identifying the connection to perform this procedure on.
* @param[in] p_handle_range A pointer to the range of handles of the Characteristic to perform this procedure on.
*
* @retval ::NRF_SUCCESS Successfully started or resumed the Descriptor Discovery procedure.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
* @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::NRF_ERROR_BUSY Client procedure already in progress.
*/
SVCALL(SD_BLE_GATTC_DESCRIPTORS_DISCOVER, uint32_t, sd_ble_gattc_descriptors_discover(uint16_t conn_handle, ble_gattc_handle_range_t const *p_handle_range));
/**@brief Initiate or continue a GATT Read using Characteristic UUID procedure.
*
* @details This function initiates or resumes a Read using Characteristic UUID procedure. If the last Characteristic has not been reached,
* this must be called again with an updated handle range to continue the discovery.
*
* @events
* @event{BLE_GATTC_EVT_DESC_DISC_RSP}
* @endevents
*
* @mscs
* @mmsc{@ref BLE_GATTC_READ_UUID_MSC}
* @endmscs
*
* @param[in] conn_handle The connection handle identifying the connection to perform this procedure on.
* @param[in] p_uuid Pointer to a Characteristic value UUID to read.
* @param[in] p_handle_range A pointer to the range of handles to perform this procedure on.
*
* @retval ::NRF_SUCCESS Successfully started or resumed the Read using Characteristic UUID procedure.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
* @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::NRF_ERROR_BUSY Client procedure already in progress.
*/
SVCALL(SD_BLE_GATTC_CHAR_VALUE_BY_UUID_READ, uint32_t, sd_ble_gattc_char_value_by_uuid_read(uint16_t conn_handle, ble_uuid_t const *p_uuid, ble_gattc_handle_range_t const *p_handle_range));
/**@brief Initiate or continue a GATT Read (Long) Characteristic or Descriptor procedure.
*
* @details This function initiates or resumes a GATT Read (Long) Characteristic or Descriptor procedure. If the Characteristic or Descriptor
* to be read is longer than ATT_MTU - 1, this function must be called multiple times with appropriate offset to read the
* complete value.
*
* @events
* @event{@ref BLE_GATTC_EVT_CHAR_VAL_BY_UUID_READ_RSP}
* @endevents
*
* @mscs
* @mmsc{@ref BLE_GATTC_VALUE_READ_MSC}
* @endmscs
*
* @param[in] conn_handle The connection handle identifying the connection to perform this procedure on.
* @param[in] handle The handle of the attribute to be read.
* @param[in] offset Offset into the attribute value to be read.
*
* @retval ::NRF_SUCCESS Successfully started or resumed the Read (Long) procedure.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
* @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State.
* @retval ::NRF_ERROR_BUSY Client procedure already in progress.
*/
SVCALL(SD_BLE_GATTC_READ, uint32_t, sd_ble_gattc_read(uint16_t conn_handle, uint16_t handle, uint16_t offset));
/**@brief Initiate a GATT Read Multiple Characteristic Values procedure.
*
* @details This function initiates a GATT Read Multiple Characteristic Values procedure.
*
* @events
* @event{@ref BLE_GATTC_EVT_CHAR_VALS_READ_RSP}
* @endevents
*
* @mscs
* @mmsc{@ref BLE_GATTC_READ_MULT_MSC}
* @endmscs
*
* @param[in] conn_handle The connection handle identifying the connection to perform this procedure on.
* @param[in] p_handles A pointer to the handle(s) of the attribute(s) to be read.
* @param[in] handle_count The number of handles in p_handles.
*
* @retval ::NRF_SUCCESS Successfully started the Read Multiple Characteristic Values procedure.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
* @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::NRF_ERROR_BUSY Client procedure already in progress.
*/
SVCALL(SD_BLE_GATTC_CHAR_VALUES_READ, uint32_t, sd_ble_gattc_char_values_read(uint16_t conn_handle, uint16_t const *p_handles, uint16_t handle_count));
/**@brief Perform a Write (Characteristic Value or Descriptor, with or without response, signed or not, long or reliable) procedure.
*
* @details This function can perform all write procedures described in GATT.
*
* @note It is important to note that a write without response will <b>consume an application buffer</b>, and will therefore
* generate a @ref BLE_EVT_TX_COMPLETE event when the packet has been transmitted. A write (with response) on the other hand will use the
* standard client internal buffer and thus will only generate a @ref BLE_GATTC_EVT_WRITE_RSP event as soon as the write response
* has been received from the peer. Please see the documentation of @ref sd_ble_tx_packet_count_get for more details.
*
* @events
* @event{@ref BLE_GATTC_EVT_WRITE_RSP, Generated when using write request or queued writes.}
* @endevents
*
* @mscs
* @mmsc{@ref BLE_GATTC_VALUE_WRITE_MSC}
* @mmsc{@ref BLE_GATTC_VALUE_LONG_WRITE_MSC}
* @mmsc{@ref BLE_GATTC_VALUE_RELIABLE_WRITE_MSC}
* @mmsc{@ref BLE_COMMON_APP_BUFF_MSC}
* @endmscs
*
* @param[in] conn_handle The connection handle identifying the connection to perform this procedure on.
* @param[in] p_write_params A pointer to a write parameters structure.
*
* @retval ::NRF_SUCCESS Successfully started the Write procedure.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
* @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
* @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied.
* @retval ::NRF_ERROR_BUSY Procedure already in progress.
* @retval ::BLE_ERROR_NO_TX_PACKETS No available application packets for this connection.
*/
SVCALL(SD_BLE_GATTC_WRITE, uint32_t, sd_ble_gattc_write(uint16_t conn_handle, ble_gattc_write_params_t const *p_write_params));
/**@brief Send a Handle Value Confirmation to the GATT Server.
*
* @mscs
* @mmsc{@ref BLE_GATTC_HVI_MSC}
* @endmscs
*
* @param[in] conn_handle The connection handle identifying the connection to perform this procedure on.
* @param[in] handle The handle of the attribute in the indication.
*
* @retval ::NRF_SUCCESS Successfully queued the Handle Value Confirmation for transmission.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
* @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no Indication pending to be confirmed.
* @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle.
*/
SVCALL(SD_BLE_GATTC_HV_CONFIRM, uint32_t, sd_ble_gattc_hv_confirm(uint16_t conn_handle, uint16_t handle));
/**@brief Discovers information about a range of attributes on a GATT server.
*
* @events
* @event{@ref BLE_GATTC_EVT_ATTR_INFO_DISC_RSP, Generated when information about a range of attributes has been received.}
* @endevents
*
* @param[in] conn_handle The connection handle identifying the connection to perform this procedure on.
* @param[in] p_handle_range The range of handles to request information about.
*
* @retval ::NRF_SUCCESS Successfully started an attribute information discovery procedure.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle.
* @retval ::NRF_ERROR_INVALID_STATE Invalid connection state
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::NRF_ERROR_BUSY Client procedure already in progress.
*/
SVCALL(SD_BLE_GATTC_ATTR_INFO_DISCOVER, uint32_t, sd_ble_gattc_attr_info_discover(uint16_t conn_handle, ble_gattc_handle_range_t const * p_handle_range));
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* NRF_BLE_GATTC_H__ */
/**
@}
@}
*/

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targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/nrf_ble_gatts.h
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@ -1,725 +0,0 @@
/*
* Copyright (c) 2000 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/**
@addtogroup BLE_GATTS Generic Attribute Profile (GATT) Server
@{
@brief Definitions and prototypes for the GATTS interface.
*/
#ifndef NRF_BLE_GATTS_H__
#define NRF_BLE_GATTS_H__
#include "nrf_ble_types.h"
#include "nrf_ble_ranges.h"
#include "nrf_ble_l2cap.h"
#include "nrf_ble_gap.h"
#include "nrf_ble_gatt.h"
#include "nrf_svc.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup BLE_GATTS_ENUMERATIONS Enumerations
* @{ */
/**
* @brief GATTS API SVC numbers.
*/
enum BLE_GATTS_SVCS
{
SD_BLE_GATTS_SERVICE_ADD = BLE_GATTS_SVC_BASE, /**< Add a service. */
SD_BLE_GATTS_INCLUDE_ADD, /**< Add an included service. */
SD_BLE_GATTS_CHARACTERISTIC_ADD, /**< Add a characteristic. */
SD_BLE_GATTS_DESCRIPTOR_ADD, /**< Add a generic attribute. */
SD_BLE_GATTS_VALUE_SET, /**< Set an attribute value. */
SD_BLE_GATTS_VALUE_GET, /**< Get an attribute value. */
SD_BLE_GATTS_HVX, /**< Handle Value Notification or Indication. */
SD_BLE_GATTS_SERVICE_CHANGED, /**< Perform a Service Changed Indication to one or more peers. */
SD_BLE_GATTS_RW_AUTHORIZE_REPLY, /**< Reply to an authorization request for a read or write operation on one or more attributes. */
SD_BLE_GATTS_SYS_ATTR_SET, /**< Set the persistent system attributes for a connection. */
SD_BLE_GATTS_SYS_ATTR_GET, /**< Retrieve the persistent system attributes. */
SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, /**< Retrieve the first valid user handle. */
SD_BLE_GATTS_ATTR_GET /**< Retrieve the UUID and/or metadata of an attribute. */
};
/**
* @brief GATT Server Event IDs.
*/
enum BLE_GATTS_EVTS
{
BLE_GATTS_EVT_WRITE = BLE_GATTS_EVT_BASE, /**< Write operation performed. \n See @ref ble_gatts_evt_write_t. */
BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST, /**< Read/Write Authorization request. \n Reply with @ref sd_ble_gatts_rw_authorize_reply. \n See @ref ble_gatts_evt_rw_authorize_request_t. */
BLE_GATTS_EVT_SYS_ATTR_MISSING, /**< A persistent system attribute access is pending. \n Respond with @ref sd_ble_gatts_sys_attr_set. \n See @ref ble_gatts_evt_sys_attr_missing_t. */
BLE_GATTS_EVT_HVC, /**< Handle Value Confirmation. \n See @ref ble_gatts_evt_hvc_t. */
BLE_GATTS_EVT_SC_CONFIRM, /**< Service Changed Confirmation. No additional event structure applies. */
BLE_GATTS_EVT_TIMEOUT /**< Peer failed to resonpond to an ATT request in time. \n See @ref ble_gatts_evt_timeout_t. */
};
/** @} */
/** @addtogroup BLE_GATTS_DEFINES Defines
* @{ */
/** @defgroup BLE_ERRORS_GATTS SVC return values specific to GATTS
* @{ */
#define BLE_ERROR_GATTS_INVALID_ATTR_TYPE (NRF_GATTS_ERR_BASE + 0x000) /**< Invalid attribute type. */
#define BLE_ERROR_GATTS_SYS_ATTR_MISSING (NRF_GATTS_ERR_BASE + 0x001) /**< System Attributes missing. */
/** @} */
/** @defgroup BLE_GATTS_ATTR_LENS_MAX Maximum attribute lengths
* @{ */
#define BLE_GATTS_FIX_ATTR_LEN_MAX (510) /**< Maximum length for fixed length Attribute Values. */
#define BLE_GATTS_VAR_ATTR_LEN_MAX (512) /**< Maximum length for variable length Attribute Values. */
/** @} */
/** @defgroup BLE_GATTS_SRVC_TYPES GATT Server Service Types
* @{ */
#define BLE_GATTS_SRVC_TYPE_INVALID 0x00 /**< Invalid Service Type. */
#define BLE_GATTS_SRVC_TYPE_PRIMARY 0x01 /**< Primary Service. */
#define BLE_GATTS_SRVC_TYPE_SECONDARY 0x02 /**< Secondary Type. */
/** @} */
/** @defgroup BLE_GATTS_ATTR_TYPES GATT Server Attribute Types
* @{ */
#define BLE_GATTS_ATTR_TYPE_INVALID 0x00 /**< Invalid Attribute Type. */
#define BLE_GATTS_ATTR_TYPE_PRIM_SRVC_DECL 0x01 /**< Primary Service Declaration. */
#define BLE_GATTS_ATTR_TYPE_SEC_SRVC_DECL 0x02 /**< Secondary Service Declaration. */
#define BLE_GATTS_ATTR_TYPE_INC_DECL 0x03 /**< Include Declaration. */
#define BLE_GATTS_ATTR_TYPE_CHAR_DECL 0x04 /**< Characteristic Declaration. */
#define BLE_GATTS_ATTR_TYPE_CHAR_VAL 0x05 /**< Characteristic Value. */
#define BLE_GATTS_ATTR_TYPE_DESC 0x06 /**< Descriptor. */
#define BLE_GATTS_ATTR_TYPE_OTHER 0x07 /**< Other, non-GATT specific type. */
/** @} */
/** @defgroup BLE_GATTS_OPS GATT Server Operations
* @{ */
#define BLE_GATTS_OP_INVALID 0x00 /**< Invalid Operation. */
#define BLE_GATTS_OP_WRITE_REQ 0x01 /**< Write Request. */
#define BLE_GATTS_OP_WRITE_CMD 0x02 /**< Write Command. */
#define BLE_GATTS_OP_SIGN_WRITE_CMD 0x03 /**< Signed Write Command. */
#define BLE_GATTS_OP_PREP_WRITE_REQ 0x04 /**< Prepare Write Request. */
#define BLE_GATTS_OP_EXEC_WRITE_REQ_CANCEL 0x05 /**< Execute Write Request: Cancel all prepared writes. */
#define BLE_GATTS_OP_EXEC_WRITE_REQ_NOW 0x06 /**< Execute Write Request: Immediately execute all prepared writes. */
/** @} */
/** @defgroup BLE_GATTS_VLOCS GATT Value Locations
* @{ */
#define BLE_GATTS_VLOC_INVALID 0x00 /**< Invalid Location. */
#define BLE_GATTS_VLOC_STACK 0x01 /**< Attribute Value is located in stack memory, no user memory is required. */
#define BLE_GATTS_VLOC_USER 0x02 /**< Attribute Value is located in user memory. This requires the user to maintain a valid buffer through the lifetime of the attribute, since the stack
will read and write directly to the memory using the pointer provided in the APIs. There are no alignment requirements for the buffer. */
/** @} */
/** @defgroup BLE_GATTS_AUTHORIZE_TYPES GATT Server Authorization Types
* @{ */
#define BLE_GATTS_AUTHORIZE_TYPE_INVALID 0x00 /**< Invalid Type. */
#define BLE_GATTS_AUTHORIZE_TYPE_READ 0x01 /**< Authorize a Read Operation. */
#define BLE_GATTS_AUTHORIZE_TYPE_WRITE 0x02 /**< Authorize a Write Request Operation. */
/** @} */
/** @defgroup BLE_GATTS_SYS_ATTR_FLAGS System Attribute Flags
* @{ */
#define BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS (1 << 0) /**< Restrict system attributes to system services only. */
#define BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS (1 << 1) /**< Restrict system attributes to user services only. */
/** @} */
/** @defgroup BLE_GATTS_ATTR_TAB_SIZE Attribute Table size
* @{
*/
#define BLE_GATTS_ATTR_TAB_SIZE_MIN 216 /**< Minimum Attribute Table size */
#define BLE_GATTS_ATTR_TAB_SIZE_DEFAULT 0x0000 /**< Default Attribute Table size (0x580 bytes for this version of the SoftDevice). */
/** @} */
/** @} */
/** @addtogroup BLE_GATTS_STRUCTURES Structures
* @{ */
/**
* @brief BLE GATTS initialization parameters.
*/
typedef struct
{
uint8_t service_changed:1; /**< Include the Service Changed characteristic in the Attribute Table. */
uint32_t attr_tab_size; /**< Attribute Table size in bytes. The size must be a multiple of 4. @ref BLE_GATTS_ATTR_TAB_SIZE_DEFAULT is used to set the default size. */
} ble_gatts_enable_params_t;
/**@brief Attribute metadata. */
typedef struct
{
ble_gap_conn_sec_mode_t read_perm; /**< Read permissions. */
ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */
uint8_t vlen :1; /**< Variable length attribute. */
uint8_t vloc :2; /**< Value location, see @ref BLE_GATTS_VLOCS.*/
uint8_t rd_auth :1; /**< Read authorization and value will be requested from the application on every read operation. */
uint8_t wr_auth :1; /**< Write authorization will be requested from the application on every Write Request operation (but not Write Command). */
} ble_gatts_attr_md_t;
/**@brief GATT Attribute. */
typedef struct
{
ble_uuid_t *p_uuid; /**< Pointer to the attribute UUID. */
ble_gatts_attr_md_t *p_attr_md; /**< Pointer to the attribute metadata structure. */
uint16_t init_len; /**< Initial attribute value length in bytes. */
uint16_t init_offs; /**< Initial attribute value offset in bytes. If different from zero, the first init_offs bytes of the attribute value will be left uninitialized. */
uint16_t max_len; /**< Maximum attribute value length in bytes, see @ref BLE_GATTS_ATTR_LENS_MAX for maximum values. */
uint8_t* p_value; /**< Pointer to the attribute data. Please note that if the @ref BLE_GATTS_VLOC_USER value location is selected in the attribute metadata, this will have to point to a buffer
that remains valid through the lifetime of the attribute. This excludes usage of automatic variables that may go out of scope or any other temporary location.
The stack may access that memory directly without the application's knowledge. For writable characteristics, this value must not be a location in flash memory.*/
} ble_gatts_attr_t;
/**@brief GATT Attribute Value. */
typedef struct
{
uint16_t len; /**< Length in bytes to be written or read. Length in bytes written or read after successful return.*/
uint16_t offset; /**< Attribute value offset. */
uint8_t *p_value; /**< Pointer to where value is stored or will be stored.
If value is stored in user memory, only the attribute length is updated when p_value == NULL.
Set to NULL when reading to obtain the complete length of the attribute value */
} ble_gatts_value_t;
/**@brief GATT Characteristic Presentation Format. */
typedef struct
{
uint8_t format; /**< Format of the value, see @ref BLE_GATT_CPF_FORMATS. */
int8_t exponent; /**< Exponent for integer data types. */
uint16_t unit; /**< Unit from Bluetooth Assigned Numbers. */
uint8_t name_space; /**< Namespace from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */
uint16_t desc; /**< Namespace description from Bluetooth Assigned Numbers, see @ref BLE_GATT_CPF_NAMESPACES. */
} ble_gatts_char_pf_t;
/**@brief GATT Characteristic metadata. */
typedef struct
{
ble_gatt_char_props_t char_props; /**< Characteristic Properties. */
ble_gatt_char_ext_props_t char_ext_props; /**< Characteristic Extended Properties. */
uint8_t *p_char_user_desc; /**< Pointer to a UTF-8 encoded string (non-NULL terminated), NULL if the descriptor is not required. */
uint16_t char_user_desc_max_size; /**< The maximum size in bytes of the user description descriptor. */
uint16_t char_user_desc_size; /**< The size of the user description, must be smaller or equal to char_user_desc_max_size. */
ble_gatts_char_pf_t* p_char_pf; /**< Pointer to a presentation format structure or NULL if the CPF descriptor is not required. */
ble_gatts_attr_md_t* p_user_desc_md; /**< Attribute metadata for the User Description descriptor, or NULL for default values. */
ble_gatts_attr_md_t* p_cccd_md; /**< Attribute metadata for the Client Characteristic Configuration Descriptor, or NULL for default values. */
ble_gatts_attr_md_t* p_sccd_md; /**< Attribute metadata for the Server Characteristic Configuration Descriptor, or NULL for default values. */
} ble_gatts_char_md_t;
/**@brief GATT Characteristic Definition Handles. */
typedef struct
{
uint16_t value_handle; /**< Handle to the characteristic value. */
uint16_t user_desc_handle; /**< Handle to the User Description descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */
uint16_t cccd_handle; /**< Handle to the Client Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */
uint16_t sccd_handle; /**< Handle to the Server Characteristic Configuration Descriptor, or @ref BLE_GATT_HANDLE_INVALID if not present. */
} ble_gatts_char_handles_t;
/**@brief GATT HVx parameters. */
typedef struct
{
uint16_t handle; /**< Characteristic Value Handle. */
uint8_t type; /**< Indication or Notification, see @ref BLE_GATT_HVX_TYPES. */
uint16_t offset; /**< Offset within the attribute value. */
uint16_t *p_len; /**< Length in bytes to be written, length in bytes written after successful return. */
uint8_t *p_data; /**< Actual data content, use NULL to use the current attribute value. */
} ble_gatts_hvx_params_t;
/**@brief GATT Authorization parameters. */
typedef struct
{
uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */
uint8_t update : 1; /**< If set, data supplied in p_data will be used to update the attribute value.
Please note that for @ref BLE_GATTS_OP_WRITE_REQ operations this bit must always be set,
as the data to be written needs to be stored and later provided by the application. */
uint16_t offset; /**< Offset of the attribute value being updated. */
uint16_t len; /**< Length in bytes of the value in p_data pointer, see @ref BLE_GATTS_ATTR_LENS_MAX. */
const uint8_t *p_data; /**< Pointer to new value used to update the attribute value. */
} ble_gatts_authorize_params_t;
/**@brief GATT Read or Write Authorize Reply parameters. */
typedef struct
{
uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */
union {
ble_gatts_authorize_params_t read; /**< Read authorization parameters. */
ble_gatts_authorize_params_t write; /**< Write authorization parameters. */
} params; /**< Reply Parameters. */
} ble_gatts_rw_authorize_reply_params_t;
/**@brief Event structure for @ref BLE_GATTS_EVT_WRITE. */
typedef struct
{
uint16_t handle; /**< Attribute Handle. */
ble_uuid_t uuid; /**< Attribute UUID. */
uint8_t op; /**< Type of write operation, see @ref BLE_GATTS_OPS. */
uint8_t auth_required; /**< Writing operation deferred due to authorization requirement. Application may use @ref sd_ble_gatts_value_set to finalise the writing operation. */
uint16_t offset; /**< Offset for the write operation. */
uint16_t len; /**< Length of the received data. */
uint8_t data[1]; /**< Received data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation.
See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */
} ble_gatts_evt_write_t;
/**@brief Event substructure for authorized read requests, see @ref ble_gatts_evt_rw_authorize_request_t. */
typedef struct
{
uint16_t handle; /**< Attribute Handle. */
ble_uuid_t uuid; /**< Attribute UUID. */
uint16_t offset; /**< Offset for the read operation. */
} ble_gatts_evt_read_t;
/**@brief Event structure for @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST. */
typedef struct
{
uint8_t type; /**< Type of authorize operation, see @ref BLE_GATTS_AUTHORIZE_TYPES. */
union {
ble_gatts_evt_read_t read; /**< Attribute Read Parameters. */
ble_gatts_evt_write_t write; /**< Attribute Write Parameters. */
} request; /**< Request Parameters. */
} ble_gatts_evt_rw_authorize_request_t;
/**@brief Event structure for @ref BLE_GATTS_EVT_SYS_ATTR_MISSING. */
typedef struct
{
uint8_t hint; /**< Hint (currently unused). */
} ble_gatts_evt_sys_attr_missing_t;
/**@brief Event structure for @ref BLE_GATTS_EVT_HVC. */
typedef struct
{
uint16_t handle; /**< Attribute Handle. */
} ble_gatts_evt_hvc_t;
/**@brief Event structure for @ref BLE_GATTS_EVT_TIMEOUT. */
typedef struct
{
uint8_t src; /**< Timeout source, see @ref BLE_GATT_TIMEOUT_SOURCES. */
} ble_gatts_evt_timeout_t;
/**@brief GATT Server event callback event structure. */
typedef struct
{
uint16_t conn_handle; /**< Connection Handle on which the event occurred. */
union
{
ble_gatts_evt_write_t write; /**< Write Event Parameters. */
ble_gatts_evt_rw_authorize_request_t authorize_request; /**< Read or Write Authorize Request Parameters. */
ble_gatts_evt_sys_attr_missing_t sys_attr_missing; /**< System attributes missing. */
ble_gatts_evt_hvc_t hvc; /**< Handle Value Confirmation Event Parameters. */
ble_gatts_evt_timeout_t timeout; /**< Timeout Event. */
} params; /**< Event Parameters. */
} ble_gatts_evt_t;
/** @} */
/** @addtogroup BLE_GATTS_FUNCTIONS Functions
* @{ */
/**@brief Add a service declaration to the Attribute Table.
*
* @note Secondary Services are only relevant in the context of the entity that references them, it is therefore forbidden to
* add a secondary service declaration that is not referenced by another service later in the Attribute Table.
*
* @mscs
* @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC}
* @endmscs
*
* @param[in] type Toggles between primary and secondary services, see @ref BLE_GATTS_SRVC_TYPES.
* @param[in] p_uuid Pointer to service UUID.
* @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored.
*
* @retval ::NRF_SUCCESS Successfully added a service declaration.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, Vendor Specific UUIDs need to be present in the table.
* @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack.
* @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation.
*/
SVCALL(SD_BLE_GATTS_SERVICE_ADD, uint32_t, sd_ble_gatts_service_add(uint8_t type, ble_uuid_t const *p_uuid, uint16_t *p_handle));
/**@brief Add an include declaration to the Attribute Table.
*
* @note It is currently only possible to add an include declaration to the last added service (i.e. only sequential population is supported at this time).
*
* @note The included service must already be present in the Attribute Table prior to this call.
*
* @mscs
* @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC}
* @endmscs
*
* @param[in] service_handle Handle of the service where the included service is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially.
* @param[in] inc_srvc_handle Handle of the included service.
* @param[out] p_include_handle Pointer to a 16-bit word where the assigned handle will be stored.
*
* @retval ::NRF_SUCCESS Successfully added an include declaration.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, handle values need to match previously added services.
* @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation.
* @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, self inclusions are not allowed.
* @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation.
* @retval ::NRF_ERROR_NOT_FOUND Attribute not found.
*/
SVCALL(SD_BLE_GATTS_INCLUDE_ADD, uint32_t, sd_ble_gatts_include_add(uint16_t service_handle, uint16_t inc_srvc_handle, uint16_t *p_include_handle));
/**@brief Add a characteristic declaration, a characteristic value declaration and optional characteristic descriptor declarations to the Attribute Table.
*
* @note It is currently only possible to add a characteristic to the last added service (i.e. only sequential population is supported at this time).
*
* @note Several restrictions apply to the parameters, such as matching permissions between the user description descriptor and the writeable auxiliaries bits,
* readable (no security) and writeable (selectable) CCCDs and SCCDs and valid presentation format values.
*
* @note If no metadata is provided for the optional descriptors, their permissions will be derived from the characteristic permissions.
*
* @mscs
* @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC}
* @endmscs
*
* @param[in] service_handle Handle of the service where the characteristic is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially.
* @param[in] p_char_md Characteristic metadata.
* @param[in] p_attr_char_value Pointer to the attribute structure corresponding to the characteristic value.
* @param[out] p_handles Pointer to the structure where the assigned handles will be stored.
*
* @retval ::NRF_SUCCESS Successfully added a characteristic.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, service handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints.
* @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a service context is required.
* @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack.
* @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation.
* @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX.
*/
SVCALL(SD_BLE_GATTS_CHARACTERISTIC_ADD, uint32_t, sd_ble_gatts_characteristic_add(uint16_t service_handle, ble_gatts_char_md_t const *p_char_md, ble_gatts_attr_t const *p_attr_char_value, ble_gatts_char_handles_t *p_handles));
/**@brief Add a descriptor to the Attribute Table.
*
* @note It is currently only possible to add a descriptor to the last added characteristic (i.e. only sequential population is supported at this time).
*
* @mscs
* @mmsc{@ref BLE_GATTS_ATT_TABLE_POP_MSC}
* @endmscs
*
* @param[in] char_handle Handle of the characteristic where the descriptor is to be placed, if @ref BLE_GATT_HANDLE_INVALID is used, it will be placed sequentially.
* @param[in] p_attr Pointer to the attribute structure.
* @param[out] p_handle Pointer to a 16-bit word where the assigned handle will be stored.
*
* @retval ::NRF_SUCCESS Successfully added a descriptor.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, characteristic handle, Vendor Specific UUIDs, lengths, and permissions need to adhere to the constraints.
* @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation, a characteristic context is required.
* @retval ::NRF_ERROR_FORBIDDEN Forbidden value supplied, certain UUIDs are reserved for the stack.
* @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation.
* @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX.
*/
SVCALL(SD_BLE_GATTS_DESCRIPTOR_ADD, uint32_t, sd_ble_gatts_descriptor_add(uint16_t char_handle, ble_gatts_attr_t const *p_attr, uint16_t *p_handle));
/**@brief Set the value of a given attribute.
*
* @note Values other than system attributes can be set at any time, regardless of wheter any active connections exist.
*
* @mscs
* @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC}
* @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC}
* @endmscs
*
* @param[in] conn_handle Connection handle. If the value does not belong to a system attribute then @ref BLE_CONN_HANDLE_INVALID can be used.
* @param[in] handle Attribute handle.
* @param[in,out] p_value Attribute value information.
*
* @retval ::NRF_SUCCESS Successfully set the value of the attribute.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
* @retval ::NRF_ERROR_NOT_FOUND Attribute not found.
* @retval ::NRF_ERROR_FORBIDDEN Forbidden handle supplied, certain attributes are not modifiable by the application.
* @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, attribute lengths are restricted by @ref BLE_GATTS_ATTR_LENS_MAX.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied.
* @retval ::BLE_ERROR_GATTS_INVALID_ATTR_TYPE @ref BLE_CONN_HANDLE_INVALID supplied on a system attribute.
*/
SVCALL(SD_BLE_GATTS_VALUE_SET, uint32_t, sd_ble_gatts_value_set(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value));
/**@brief Get the value of a given attribute.
*
* @note If the attribute value is longer than the size of the supplied buffer,
* p_len will return the total attribute value length (excluding offset),
* and not the number of bytes actually returned in p_data.
* The application may use this information to allocate a suitable buffer size.
*
* @note When retrieving system attribute values with this function, the connection handle
* may refer to an already disconnected connection. Refer to the documentation of
* @ref sd_ble_gatts_sys_attr_get for further information.
*
* @param[in] conn_handle Connection handle. If the value does not belong to a system attribute then @ref BLE_CONN_HANDLE_INVALID can be used.
* @param[in] handle Attribute handle.
* @param[in,out] p_value Attribute value information.
*
* @retval ::NRF_SUCCESS Successfully retrieved the value of the attribute.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::NRF_ERROR_NOT_FOUND Attribute not found.
* @retval ::NRF_ERROR_INVALID_PARAM Invalid attribute offset supplied.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied.
* @retval ::BLE_ERROR_GATTS_INVALID_ATTR_TYPE @ref BLE_CONN_HANDLE_INVALID supplied on a system attribute.
*/
SVCALL(SD_BLE_GATTS_VALUE_GET, uint32_t, sd_ble_gatts_value_get(uint16_t conn_handle, uint16_t handle, ble_gatts_value_t *p_value));
/**@brief Notify or Indicate an attribute value.
*
* @details This function checks for the relevant Client Characteristic Configuration descriptor value to verify that the relevant operation
* (notification or indication) has been enabled by the client. It is also able to update the attribute value before issuing the PDU, so that
* the application can atomically perform a value update and a server initiated transaction with a single API call.
* If the application chooses to indicate an attribute value, a @ref BLE_GATTS_EVT_HVC event will be issued as soon as the confirmation arrives from
* the peer.
*
* @note The local attribute value may be updated even if an outgoing packet is not sent to the peer due to an error during execution.
* When receiveing the error codes @ref NRF_ERROR_INVALID_STATE, @ref NRF_ERROR_BUSY, @ref BLE_ERROR_GATTS_SYS_ATTR_MISSING and
* @ref BLE_ERROR_NO_TX_PACKETS the Attribute Table has been updated.
* The caller can check whether the value has been updated by looking at the contents of *(p_hvx_params->p_len).
*
* @note It is important to note that a notification will <b>consume an application buffer</b>, and will therefore
* generate a @ref BLE_EVT_TX_COMPLETE event when the packet has been transmitted. An indication on the other hand will use the
* standard server internal buffer and thus will only generate a @ref BLE_GATTS_EVT_HVC event as soon as the confirmation
* has been received from the peer. Please see the documentation of @ref sd_ble_tx_packet_count_get for more details.
*
* @events
* @event{@ref BLE_EVT_TX_COMPLETE, Transmission complete.}
* @event{@ref BLE_GATTS_EVT_HVC, Confirmation received from peer.}
* @endevents
*
* @mscs
* @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC}
* @mmsc{@ref BLE_GATTS_HVN_MSC}
* @mmsc{@ref BLE_GATTS_HVI_MSC}
* @mmsc{@ref BLE_GATTS_HVX_DISABLED_MSC}
* @mmsc{@ref BLE_COMMON_APP_BUFF_MSC}
* @endmscs
*
* @param[in] conn_handle Connection handle.
* @param[in] p_hvx_params Pointer to an HVx parameters structure. If the p_data member contains a non-NULL pointer the attribute value will be updated with
* the contents pointed by it before sending the notification or indication.
*
* @retval ::NRF_SUCCESS Successfully queued a notification or indication for transmission, and optionally updated the attribute value.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
* @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or notifications and/or indications not enabled in the CCCD.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
* @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied. Only attributes added directly by the application are available to notify and indicate.
* @retval ::BLE_ERROR_GATTS_INVALID_ATTR_TYPE Invalid attribute type(s) supplied, only characteristic values may be notified and indicated.
* @retval ::NRF_ERROR_NOT_FOUND Attribute not found.
* @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied.
* @retval ::NRF_ERROR_BUSY Procedure already in progress.
* @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value.
* @retval ::BLE_ERROR_NO_TX_PACKETS No available application packets for this connection, applies only to notifications.
*/
SVCALL(SD_BLE_GATTS_HVX, uint32_t, sd_ble_gatts_hvx(uint16_t conn_handle, ble_gatts_hvx_params_t const *p_hvx_params));
/**@brief Indicate the Service Changed attribute value.
*
* @details This call will send a Handle Value Indication to one or more peers connected to inform them that the Attribute
* Table layout has changed. As soon as the peer has confirmed the indication, a @ref BLE_GATTS_EVT_SC_CONFIRM event will
* be issued.
*
* @note Some of the restrictions and limitations that apply to @ref sd_ble_gatts_hvx also apply here.
*
* @events
* @event{@ref BLE_GATTS_EVT_SC_CONFIRM, Confirmation of attribute table change received from peer.}
* @endevents
*
* @mscs
* @mmsc{@ref BLE_GATTS_SC_MSC}
* @endmscs
*
* @param[in] conn_handle Connection handle.
* @param[in] start_handle Start of affected attribute handle range.
* @param[in] end_handle End of affected attribute handle range.
*
* @retval ::NRF_SUCCESS Successfully queued the Service Changed indication for transmission.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
* @retval ::NRF_ERROR_NOT_SUPPORTED Service Changed not enabled at initialization. See @ref sd_ble_enable and @ref ble_gatts_enable_params_t.
* @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or notifications and/or indications not enabled in the CCCD.
* @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
* @retval ::BLE_ERROR_INVALID_ATTR_HANDLE Invalid attribute handle(s) supplied, handles must be in the range populated by the application.
* @retval ::NRF_ERROR_BUSY Procedure already in progress.
* @retval ::BLE_ERROR_GATTS_SYS_ATTR_MISSING System attributes missing, use @ref sd_ble_gatts_sys_attr_set to set them to a known value.
*/
SVCALL(SD_BLE_GATTS_SERVICE_CHANGED, uint32_t, sd_ble_gatts_service_changed(uint16_t conn_handle, uint16_t start_handle, uint16_t end_handle));
/**@brief Respond to a Read/Write authorization request.
*
* @note This call should only be used as a response to a @ref BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST event issued to the application.
*
* @mscs
* @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_AUTH_MSC}
* @mmsc{@ref BLE_GATTS_QUEUED_WRITE_BUF_AUTH_MSC}
* @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_NOAUTH_MSC}
* @mmsc{@ref BLE_GATTS_READ_REQ_AUTH_MSC}
* @mmsc{@ref BLE_GATTS_WRITE_REQ_AUTH_MSC}
* @mmsc{@ref BLE_GATTS_QUEUED_WRITE_QUEUE_FULL_MSC}
* @mmsc{@ref BLE_GATTS_QUEUED_WRITE_NOBUF_PEER_CANCEL_MSC}
* @endmscs
*
* @param[in] conn_handle Connection handle.
* @param[in] p_rw_authorize_reply_params Pointer to a structure with the attribute provided by the application.
*
* @retval ::NRF_SUCCESS Successfully queued a response to the peer, and in the case of a write operation, Attribute Table updated.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State or no authorization request pending.
* @retval ::NRF_ERROR_INVALID_PARAM Authorization op invalid,
* handle supplied does not match requested handle,
* or invalid data to be written provided by the application.
* @retval ::NRF_ERROR_BUSY The stack is busy. Retry at later time.
*/
SVCALL(SD_BLE_GATTS_RW_AUTHORIZE_REPLY, uint32_t, sd_ble_gatts_rw_authorize_reply(uint16_t conn_handle, ble_gatts_rw_authorize_reply_params_t const *p_rw_authorize_reply_params));
/**@brief Update persistent system attribute information.
*
* @details Supply information about persistent system attributes to the stack,
* previously obtained using @ref sd_ble_gatts_sys_attr_get.
* This call is only allowed for active connections, and is usually
* made immediately after a connection is established with an known bonded device,
* often as a response to a @ref BLE_GATTS_EVT_SYS_ATTR_MISSING.
*
* p_sysattrs may point directly to the application's stored copy of the system attributes
* obtained using @ref sd_ble_gatts_sys_attr_get.
* If the pointer is NULL, the system attribute info is initialized, assuming that
* the application does not have any previously saved system attribute data for this device.
*
* @note The state of persistent system attributes is reset upon connection establishment and then remembered for its duration.
*
* @note If this call returns with an error code different from @ref NRF_SUCCESS, the storage of persistent system attributes may have been completed only partially.
* This means that the state of the attribute table is undefined, and the application should either provide a new set of attributes using this same call or
* reset the SoftDevice to return to a known state.
*
* @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be modified.
* @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be modified.
*
* @mscs
* @mmsc{@ref BLE_GATTS_HVX_SYS_ATTRS_MISSING_MSC}
* @mmsc{@ref BLE_GATTS_SYS_ATTRS_UNK_PEER_MSC}
* @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC}
* @endmscs
*
* @param[in] conn_handle Connection handle.
* @param[in] p_sys_attr_data Pointer to a saved copy of system attributes supplied to the stack, or NULL.
* @param[in] len Size of data pointed by p_sys_attr_data, in octets.
* @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS
*
* @retval ::NRF_SUCCESS Successfully set the system attribute information.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::NRF_ERROR_INVALID_STATE Invalid Connection State.
* @retval ::NRF_ERROR_INVALID_DATA Invalid data supplied, the data should be exactly the same as retrieved with @ref sd_ble_gatts_sys_attr_get.
* @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation.
* @retval ::NRF_ERROR_BUSY The stack is busy. Retry at later time.
*/
SVCALL(SD_BLE_GATTS_SYS_ATTR_SET, uint32_t, sd_ble_gatts_sys_attr_set(uint16_t conn_handle, uint8_t const *p_sys_attr_data, uint16_t len, uint32_t flags));
/**@brief Retrieve persistent system attribute information from the stack.
*
* @details This call is used to retrieve information about values to be stored perisistently by the application
* during the lifetime of a connection or after it has been terminated. When a new connection is established with the same bonded device,
* the system attribute information retrieved with this function should be restored using using @ref sd_ble_gatts_sys_attr_set.
* If retrieved after disconnection, the data should be read before a new connection established. The connection handle for
* the previous, now disconnected, connection will remain valid until a new one is created to allow this API call to refer to it.
* Connection handles belonging to active connections can be used as well, but care should be taken since the system attributes
* may be written to at any time by the peer during a connection's lifetime.
*
* @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS is used with this function, only the system attributes included in system services will be returned.
* @note When the @ref BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS is used with this function, only the system attributes included in user services will be returned.
*
* @mscs
* @mmsc{@ref BLE_GATTS_SYS_ATTRS_BONDED_PEER_MSC}
* @endmscs
*
* @param[in] conn_handle Connection handle of the recently terminated connection.
* @param[out] p_sys_attr_data Pointer to a buffer where updated information about system attributes will be filled in. The format of the data is described
* in @ref BLE_GATTS_SYS_ATTRS_FORMAT. NULL can be provided to obtain the length of the data.
* @param[in,out] p_len Size of application buffer if p_sys_attr_data is not NULL. Unconditially updated to actual length of system attribute data.
* @param[in] flags Optional additional flags, see @ref BLE_GATTS_SYS_ATTR_FLAGS
*
* @retval ::NRF_SUCCESS Successfully retrieved the system attribute information.
* @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid Connection Handle.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::NRF_ERROR_DATA_SIZE The system attribute information did not fit into the provided buffer.
* @retval ::NRF_ERROR_NOT_FOUND No system attributes found.
*/
SVCALL(SD_BLE_GATTS_SYS_ATTR_GET, uint32_t, sd_ble_gatts_sys_attr_get(uint16_t conn_handle, uint8_t *p_sys_attr_data, uint16_t *p_len, uint32_t flags));
/**@brief Retrieve the first valid user attribute handle.
*
* @param[out] p_handle Pointer to an integer where the handle will be stored.
*
* @retval ::NRF_SUCCESS Successfully retrieved the handle.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
*/
SVCALL(SD_BLE_GATTS_INITIAL_USER_HANDLE_GET, uint32_t, sd_ble_gatts_initial_user_handle_get(uint16_t *p_handle));
/**@brief Retrieve the attribute UUID and/or metadata.
*
* @param[in] handle Attribute handle
* @param[out] p_uuid UUID of the attribute. Use NULL to omit this field.
* @param[out] p_md Metadata of the attribute. Use NULL to omit this field.
*
* @retval ::NRF_SUCCESS Successfully retrieved the attribute metadata,
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::NRF_ERROR_INVALID_PARAM Invalid parameters supplied. Returned when both @c p_uuid and @c p_md are NULL.
* @retval ::NRF_ERROR_NOT_FOUND Attribute was not found.
*/
SVCALL(SD_BLE_GATTS_ATTR_GET, uint32_t, sd_ble_gatts_attr_get(uint16_t handle, ble_uuid_t * p_uuid, ble_gatts_attr_md_t * p_md));
/** @} */
#ifdef __cplusplus
}
#endif
#endif // NRF_BLE_GATTS_H__
/**
@}
*/

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/*
* Copyright (c) 2000 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/**
@addtogroup BLE_COMMON
@{
*/
#ifndef NRF_BLE_HCI_H__
#define NRF_BLE_HCI_H__
#ifdef __cplusplus
extern "C" {
#endif
/** @defgroup BLE_HCI_STATUS_CODES Bluetooth status codes
* @{ */
#define BLE_HCI_STATUS_CODE_SUCCESS 0x00 /**< Success. */
#define BLE_HCI_STATUS_CODE_UNKNOWN_BTLE_COMMAND 0x01 /**< Unknown BLE Command. */
#define BLE_HCI_STATUS_CODE_UNKNOWN_CONNECTION_IDENTIFIER 0x02 /**< Unknown Connection Identifier. */
/*0x03 Hardware Failure
0x04 Page Timeout
*/
#define BLE_HCI_AUTHENTICATION_FAILURE 0x05 /**< Authentication Failure. */
#define BLE_HCI_STATUS_CODE_PIN_OR_KEY_MISSING 0x06 /**< Pin or Key missing. */
#define BLE_HCI_MEMORY_CAPACITY_EXCEEDED 0x07 /**< Memory Capacity Exceeded. */
#define BLE_HCI_CONNECTION_TIMEOUT 0x08 /**< Connection Timeout. */
/*0x09 Connection Limit Exceeded
0x0A Synchronous Connection Limit To A Device Exceeded
0x0B ACL Connection Already Exists*/
#define BLE_HCI_STATUS_CODE_COMMAND_DISALLOWED 0x0C /**< Command Disallowed. */
/*0x0D Connection Rejected due to Limited Resources
0x0E Connection Rejected Due To Security Reasons
0x0F Connection Rejected due to Unacceptable BD_ADDR
0x10 Connection Accept Timeout Exceeded
0x11 Unsupported Feature or Parameter Value*/
#define BLE_HCI_STATUS_CODE_INVALID_BTLE_COMMAND_PARAMETERS 0x12 /**< Invalid BLE Command Parameters. */
#define BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION 0x13 /**< Remote User Terminated Connection. */
#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_LOW_RESOURCES 0x14 /**< Remote Device Terminated Connection due to low resources.*/
#define BLE_HCI_REMOTE_DEV_TERMINATION_DUE_TO_POWER_OFF 0x15 /**< Remote Device Terminated Connection due to power off. */
#define BLE_HCI_LOCAL_HOST_TERMINATED_CONNECTION 0x16 /**< Local Host Terminated Connection. */
/*
0x17 Repeated Attempts
0x18 Pairing Not Allowed
0x19 Unknown LMP PDU
*/
#define BLE_HCI_UNSUPPORTED_REMOTE_FEATURE 0x1A /**< Unsupported Remote Feature. */
/*
0x1B SCO Offset Rejected
0x1C SCO Interval Rejected
0x1D SCO Air Mode Rejected*/
#define BLE_HCI_STATUS_CODE_INVALID_LMP_PARAMETERS 0x1E /**< Invalid LMP Parameters. */
#define BLE_HCI_STATUS_CODE_UNSPECIFIED_ERROR 0x1F /**< Unspecified Error. */
/*0x20 Unsupported LMP Parameter Value
0x21 Role Change Not Allowed
*/
#define BLE_HCI_STATUS_CODE_LMP_RESPONSE_TIMEOUT 0x22 /**< LMP Response Timeout. */
/*0x23 LMP Error Transaction Collision*/
#define BLE_HCI_STATUS_CODE_LMP_PDU_NOT_ALLOWED 0x24 /**< LMP PDU Not Allowed. */
/*0x25 Encryption Mode Not Acceptable
0x26 Link Key Can Not be Changed
0x27 Requested QoS Not Supported
*/
#define BLE_HCI_INSTANT_PASSED 0x28 /**< Instant Passed. */
#define BLE_HCI_PAIRING_WITH_UNIT_KEY_UNSUPPORTED 0x29 /**< Pairing with Unit Key Unsupported. */
#define BLE_HCI_DIFFERENT_TRANSACTION_COLLISION 0x2A /**< Different Transaction Collision. */
/*
0x2B Reserved
0x2C QoS Unacceptable Parameter
0x2D QoS Rejected
0x2E Channel Classification Not Supported
0x2F Insufficient Security
0x30 Parameter Out Of Mandatory Range
0x31 Reserved
0x32 Role Switch Pending
0x33 Reserved
0x34 Reserved Slot Violation
0x35 Role Switch Failed
0x36 Extended Inquiry Response Too Large
0x37 Secure Simple Pairing Not Supported By Host.
0x38 Host Busy - Pairing
0x39 Connection Rejected due to No Suitable Channel Found*/
#define BLE_HCI_CONTROLLER_BUSY 0x3A /**< Controller Busy. */
#define BLE_HCI_CONN_INTERVAL_UNACCEPTABLE 0x3B /**< Connection Interval Unacceptable. */
#define BLE_HCI_DIRECTED_ADVERTISER_TIMEOUT 0x3C /**< Directed Adverisement Timeout. */
#define BLE_HCI_CONN_TERMINATED_DUE_TO_MIC_FAILURE 0x3D /**< Connection Terminated due to MIC Failure. */
#define BLE_HCI_CONN_FAILED_TO_BE_ESTABLISHED 0x3E /**< Connection Failed to be Established. */
/** @} */
#ifdef __cplusplus
}
#endif
#endif // NRF_BLE_HCI_H__
/** @} */

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/*
* Copyright (c) 2000 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/**
@addtogroup BLE_L2CAP Logical Link Control and Adaptation Protocol (L2CAP)
@{
@brief Definitions and prototypes for the L2CAP interface.
*/
#ifndef NRF_BLE_L2CAP_H__
#define NRF_BLE_L2CAP_H__
#include "nrf_ble_types.h"
#include "nrf_ble_ranges.h"
#include "nrf_ble_err.h"
#include "nrf_svc.h"
#ifdef __cplusplus
extern "C" {
#endif
/**@addtogroup BLE_L2CAP_ENUMERATIONS Enumerations
* @{ */
/**@brief L2CAP API SVC numbers. */
enum BLE_L2CAP_SVCS
{
SD_BLE_L2CAP_CID_REGISTER = BLE_L2CAP_SVC_BASE, /**< Register a CID. */
SD_BLE_L2CAP_CID_UNREGISTER, /**< Unregister a CID. */
SD_BLE_L2CAP_TX /**< Transmit a packet. */
};
/**@brief L2CAP Event IDs. */
enum BLE_L2CAP_EVTS
{
BLE_L2CAP_EVT_RX = BLE_L2CAP_EVT_BASE /**< L2CAP packet received. */
};
/** @} */
/**@addtogroup BLE_L2CAP_DEFINES Defines
* @{ */
/**@defgroup BLE_ERRORS_L2CAP SVC return values specific to L2CAP
* @{ */
#define BLE_ERROR_L2CAP_CID_IN_USE (NRF_L2CAP_ERR_BASE + 0x000) /**< CID already in use. */
/** @} */
/**@brief Default L2CAP MTU. */
#define BLE_L2CAP_MTU_DEF (23)
/**@brief Invalid Channel Identifier. */
#define BLE_L2CAP_CID_INVALID (0x0000)
/**@brief Dynamic Channel Identifier base. */
#define BLE_L2CAP_CID_DYN_BASE (0x0040)
/**@brief Maximum amount of dynamic CIDs. */
#define BLE_L2CAP_CID_DYN_MAX (8)
/** @} */
/**@addtogroup BLE_L2CAP_STRUCTURES Structures
* @{ */
/**@brief Packet header format for L2CAP transmission. */
typedef struct
{
uint16_t len; /**< Length of valid info in data member. */
uint16_t cid; /**< Channel ID on which packet is transmitted. */
} ble_l2cap_header_t;
/**@brief L2CAP Received packet event report. */
typedef struct
{
ble_l2cap_header_t header; /**< L2CAP packet header. */
uint8_t data[1]; /**< Packet data. @note This is a variable length array. The size of 1 indicated is only a placeholder for compilation.
See @ref sd_ble_evt_get for more information on how to use event structures with variable length array members. */
} ble_l2cap_evt_rx_t;
/**@brief L2CAP event callback event structure. */
typedef struct
{
uint16_t conn_handle; /**< Connection Handle on which event occured. */
union
{
ble_l2cap_evt_rx_t rx; /**< RX Event parameters. */
} params; /**< Event Parameters. */
} ble_l2cap_evt_t;
/** @} */
/**@addtogroup BLE_L2CAP_FUNCTIONS Functions
* @{ */
/**@brief Register a CID with L2CAP.
*
* @details This registers a higher protocol layer with the L2CAP multiplexer, and is requried prior to all operations on the CID.
*
* @mscs
* @mmsc{@ref BLE_L2CAP_API_MSC}
* @endmscs
*
* @param[in] cid L2CAP CID.
*
* @retval ::NRF_SUCCESS Successfully registered a CID with the L2CAP layer.
* @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, CID must be above @ref BLE_L2CAP_CID_DYN_BASE.
* @retval ::BLE_ERROR_L2CAP_CID_IN_USE L2CAP CID already in use.
* @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation.
*/
SVCALL(SD_BLE_L2CAP_CID_REGISTER, uint32_t, sd_ble_l2cap_cid_register(uint16_t cid));
/**@brief Unregister a CID with L2CAP.
*
* @details This unregisters a previously registerd higher protocol layer with the L2CAP multiplexer.
*
* @mscs
* @mmsc{@ref BLE_L2CAP_API_MSC}
* @endmscs
*
* @param[in] cid L2CAP CID.
*
* @retval ::NRF_SUCCESS Successfully unregistered the CID.
* @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied.
* @retval ::NRF_ERROR_NOT_FOUND CID not previously registered.
*/
SVCALL(SD_BLE_L2CAP_CID_UNREGISTER, uint32_t, sd_ble_l2cap_cid_unregister(uint16_t cid));
/**@brief Transmit an L2CAP packet.
*
* @note It is important to note that a call to this function will <b>consume an application packet</b>, and will therefore
* generate a @ref BLE_EVT_TX_COMPLETE event when the packet has been transmitted.
* Please see the documentation of @ref sd_ble_tx_packet_count_get for more details.
*
* @events
* @event{@ref BLE_EVT_TX_COMPLETE}
* @event{@ref BLE_L2CAP_EVT_RX}
* @endevents
*
* @mscs
* @mmsc{@ref BLE_L2CAP_API_MSC}
* @endmscs
*
* @param[in] conn_handle Connection Handle.
* @param[in] p_header Pointer to a packet header containing length and CID.
* @param[in] p_data Pointer to the data to be transmitted.
*
* @retval ::NRF_SUCCESS Successfully queued an L2CAP packet for transmission.
* @retval ::NRF_ERROR_INVALID_ADDR Invalid pointer supplied.
* @retval ::NRF_ERROR_INVALID_PARAM Invalid parameter(s) supplied, CIDs must be registered beforehand with @ref sd_ble_l2cap_cid_register.
* @retval ::NRF_ERROR_NOT_FOUND CID not found.
* @retval ::NRF_ERROR_NO_MEM Not enough memory to complete operation.
* @retval ::BLE_ERROR_NO_TX_PACKETS Not enough application packets available.
* @retval ::NRF_ERROR_DATA_SIZE Invalid data size(s) supplied, see @ref BLE_L2CAP_MTU_DEF.
*/
SVCALL(SD_BLE_L2CAP_TX, uint32_t, sd_ble_l2cap_tx(uint16_t conn_handle, ble_l2cap_header_t const *p_header, uint8_t const *p_data));
/** @} */
#ifdef __cplusplus
}
#endif
#endif // NRF_BLE_L2CAP_H__
/**
@}
*/

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/*
* Copyright (c) 2000 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/**
@addtogroup BLE_COMMON
@{
@defgroup ble_ranges Module specific SVC, event and option number subranges
@{
@brief Definition of SVC, event and option number subranges for each API module.
@note
SVCs, event and option numbers are split into subranges for each API module.
Each module receives its entire allocated range of SVC calls, whether implemented or not,
but return BLE_ERROR_NOT_SUPPORTED for unimplemented or undefined calls in its range.
Note that the symbols BLE_<module>_SVC_LAST is the end of the allocated SVC range,
rather than the last SVC function call actually defined and implemented.
Specific SVC, event and option values are defined in each module's ble_<module>.h file,
which defines names of each individual SVC code based on the range start value.
*/
#ifndef NRF_BLE_RANGES_H__
#define NRF_BLE_RANGES_H__
#ifdef __cplusplus
extern "C" {
#endif
#define BLE_SVC_BASE 0x60 /**< Common BLE SVC base. */
#define BLE_SVC_LAST 0x6B /**< Total: 12. */
#define BLE_RESERVED_SVC_BASE 0x6C /**< Reserved BLE SVC base. */
#define BLE_RESERVED_SVC_LAST 0x6F /**< Total: 4. */
#define BLE_GAP_SVC_BASE 0x70 /**< GAP BLE SVC base. */
#define BLE_GAP_SVC_LAST 0x8F /**< Total: 32. */
#define BLE_GATTC_SVC_BASE 0x90 /**< GATTC BLE SVC base. */
#define BLE_GATTC_SVC_LAST 0x9F /**< Total: 32. */
#define BLE_GATTS_SVC_BASE 0xA0 /**< GATTS BLE SVC base. */
#define BLE_GATTS_SVC_LAST 0xAF /**< Total: 16. */
#define BLE_L2CAP_SVC_BASE 0xB0 /**< L2CAP BLE SVC base. */
#define BLE_L2CAP_SVC_LAST 0xBF /**< Total: 16. */
#define BLE_EVT_INVALID 0x00 /**< Invalid BLE Event. */
#define BLE_EVT_BASE 0x01 /**< Common BLE Event base. */
#define BLE_EVT_LAST 0x0F /**< Total: 15. */
#define BLE_GAP_EVT_BASE 0x10 /**< GAP BLE Event base. */
#define BLE_GAP_EVT_LAST 0x2F /**< Total: 32. */
#define BLE_GATTC_EVT_BASE 0x30 /**< GATTC BLE Event base. */
#define BLE_GATTC_EVT_LAST 0x4F /**< Total: 32. */
#define BLE_GATTS_EVT_BASE 0x50 /**< GATTS BLE Event base. */
#define BLE_GATTS_EVT_LAST 0x6F /**< Total: 32. */
#define BLE_L2CAP_EVT_BASE 0x70 /**< L2CAP BLE Event base. */
#define BLE_L2CAP_EVT_LAST 0x8F /**< Total: 32. */
#define BLE_OPT_INVALID 0x00 /**< Invalid BLE Option. */
#define BLE_OPT_BASE 0x01 /**< Common BLE Option base. */
#define BLE_OPT_LAST 0x1F /**< Total: 31. */
#define BLE_GAP_OPT_BASE 0x20 /**< GAP BLE Option base. */
#define BLE_GAP_OPT_LAST 0x3F /**< Total: 32. */
#define BLE_GATTC_OPT_BASE 0x40 /**< GATTC BLE Option base. */
#define BLE_GATTC_OPT_LAST 0x5F /**< Total: 32. */
#define BLE_GATTS_OPT_BASE 0x60 /**< GATTS BLE Option base. */
#define BLE_GATTS_OPT_LAST 0x7F /**< Total: 32. */
#define BLE_L2CAP_OPT_BASE 0x80 /**< L2CAP BLE Option base. */
#define BLE_L2CAP_OPT_LAST 0x9F /**< Total: 32. */
#ifdef __cplusplus
}
#endif
#endif /* NRF_BLE_RANGES_H__ */
/**
@}
@}
*/

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/*
* Copyright (c) 2000 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/**
@addtogroup BLE_COMMON
@{
@defgroup ble_types Common types and macro definitions
@{
@brief Common types and macro definitions for the BLE SoftDevice.
*/
#ifndef NRF_BLE_TYPES_H__
#define NRF_BLE_TYPES_H__
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup BLE_TYPES_DEFINES Defines
* @{ */
/** @defgroup BLE_CONN_HANDLES BLE Connection Handles
* @{ */
#define BLE_CONN_HANDLE_INVALID 0xFFFF /**< Invalid Connection Handle. */
#define BLE_CONN_HANDLE_ALL 0xFFFE /**< Applies to all Connection Handles. */
/** @} */
/** @defgroup BLE_UUID_VALUES Assigned Values for BLE UUIDs
* @{ */
/* Generic UUIDs, applicable to all services */
#define BLE_UUID_UNKNOWN 0x0000 /**< Reserved UUID. */
#define BLE_UUID_SERVICE_PRIMARY 0x2800 /**< Primary Service. */
#define BLE_UUID_SERVICE_SECONDARY 0x2801 /**< Secondary Service. */
#define BLE_UUID_SERVICE_INCLUDE 0x2802 /**< Include. */
#define BLE_UUID_CHARACTERISTIC 0x2803 /**< Characteristic. */
#define BLE_UUID_DESCRIPTOR_CHAR_EXT_PROP 0x2900 /**< Characteristic Extended Properties Descriptor. */
#define BLE_UUID_DESCRIPTOR_CHAR_USER_DESC 0x2901 /**< Characteristic User Description Descriptor. */
#define BLE_UUID_DESCRIPTOR_CLIENT_CHAR_CONFIG 0x2902 /**< Client Characteristic Configuration Descriptor. */
#define BLE_UUID_DESCRIPTOR_SERVER_CHAR_CONFIG 0x2903 /**< Server Characteristic Configuration Descriptor. */
#define BLE_UUID_DESCRIPTOR_CHAR_PRESENTATION_FORMAT 0x2904 /**< Characteristic Presentation Format Descriptor. */
#define BLE_UUID_DESCRIPTOR_CHAR_AGGREGATE_FORMAT 0x2905 /**< Characteristic Aggregate Format Descriptor. */
/* GATT specific UUIDs */
#define BLE_UUID_GATT 0x1801 /**< Generic Attribute Profile. */
#define BLE_UUID_GATT_CHARACTERISTIC_SERVICE_CHANGED 0x2A05 /**< Service Changed Characteristic. */
/* GAP specific UUIDs */
#define BLE_UUID_GAP 0x1800 /**< Generic Access Profile. */
#define BLE_UUID_GAP_CHARACTERISTIC_DEVICE_NAME 0x2A00 /**< Device Name Characteristic. */
#define BLE_UUID_GAP_CHARACTERISTIC_APPEARANCE 0x2A01 /**< Appearance Characteristic. */
#define BLE_UUID_GAP_CHARACTERISTIC_PPF 0x2A02 /**< Peripheral Privacy Flag Characteristic. */
#define BLE_UUID_GAP_CHARACTERISTIC_RECONN_ADDR 0x2A03 /**< Reconnection Address Characteristic. */
#define BLE_UUID_GAP_CHARACTERISTIC_PPCP 0x2A04 /**< Peripheral Preferred Connection Parameters Characteristic. */
/** @} */
/** @defgroup BLE_UUID_TYPES Types of UUID
* @{ */
#define BLE_UUID_TYPE_UNKNOWN 0x00 /**< Invalid UUID type. */
#define BLE_UUID_TYPE_BLE 0x01 /**< Bluetooth SIG UUID (16-bit). */
#define BLE_UUID_TYPE_VENDOR_BEGIN 0x02 /**< Vendor UUID types start at this index (128-bit). */
/** @} */
/** @defgroup BLE_APPEARANCES Bluetooth Appearance values
* @note Retrieved from http://developer.bluetooth.org/gatt/characteristics/Pages/CharacteristicViewer.aspx?u=org.bluetooth.characteristic.gap.appearance.xml
* @{ */
#define BLE_APPEARANCE_UNKNOWN 0 /**< Unknown. */
#define BLE_APPEARANCE_GENERIC_PHONE 64 /**< Generic Phone. */
#define BLE_APPEARANCE_GENERIC_COMPUTER 128 /**< Generic Computer. */
#define BLE_APPEARANCE_GENERIC_WATCH 192 /**< Generic Watch. */
#define BLE_APPEARANCE_WATCH_SPORTS_WATCH 193 /**< Watch: Sports Watch. */
#define BLE_APPEARANCE_GENERIC_CLOCK 256 /**< Generic Clock. */
#define BLE_APPEARANCE_GENERIC_DISPLAY 320 /**< Generic Display. */
#define BLE_APPEARANCE_GENERIC_REMOTE_CONTROL 384 /**< Generic Remote Control. */
#define BLE_APPEARANCE_GENERIC_EYE_GLASSES 448 /**< Generic Eye-glasses. */
#define BLE_APPEARANCE_GENERIC_TAG 512 /**< Generic Tag. */
#define BLE_APPEARANCE_GENERIC_KEYRING 576 /**< Generic Keyring. */
#define BLE_APPEARANCE_GENERIC_MEDIA_PLAYER 640 /**< Generic Media Player. */
#define BLE_APPEARANCE_GENERIC_BARCODE_SCANNER 704 /**< Generic Barcode Scanner. */
#define BLE_APPEARANCE_GENERIC_THERMOMETER 768 /**< Generic Thermometer. */
#define BLE_APPEARANCE_THERMOMETER_EAR 769 /**< Thermometer: Ear. */
#define BLE_APPEARANCE_GENERIC_HEART_RATE_SENSOR 832 /**< Generic Heart rate Sensor. */
#define BLE_APPEARANCE_HEART_RATE_SENSOR_HEART_RATE_BELT 833 /**< Heart Rate Sensor: Heart Rate Belt. */
#define BLE_APPEARANCE_GENERIC_BLOOD_PRESSURE 896 /**< Generic Blood Pressure. */
#define BLE_APPEARANCE_BLOOD_PRESSURE_ARM 897 /**< Blood Pressure: Arm. */
#define BLE_APPEARANCE_BLOOD_PRESSURE_WRIST 898 /**< Blood Pressure: Wrist. */
#define BLE_APPEARANCE_GENERIC_HID 960 /**< Human Interface Device (HID). */
#define BLE_APPEARANCE_HID_KEYBOARD 961 /**< Keyboard (HID Subtype). */
#define BLE_APPEARANCE_HID_MOUSE 962 /**< Mouse (HID Subtype). */
#define BLE_APPEARANCE_HID_JOYSTICK 963 /**< Joystiq (HID Subtype). */
#define BLE_APPEARANCE_HID_GAMEPAD 964 /**< Gamepad (HID Subtype). */
#define BLE_APPEARANCE_HID_DIGITIZERSUBTYPE 965 /**< Digitizer Tablet (HID Subtype). */
#define BLE_APPEARANCE_HID_CARD_READER 966 /**< Card Reader (HID Subtype). */
#define BLE_APPEARANCE_HID_DIGITAL_PEN 967 /**< Digital Pen (HID Subtype). */
#define BLE_APPEARANCE_HID_BARCODE 968 /**< Barcode Scanner (HID Subtype). */
#define BLE_APPEARANCE_GENERIC_GLUCOSE_METER 1024 /**< Generic Glucose Meter. */
#define BLE_APPEARANCE_GENERIC_RUNNING_WALKING_SENSOR 1088 /**< Generic Running Walking Sensor. */
#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_IN_SHOE 1089 /**< Running Walking Sensor: In-Shoe. */
#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_SHOE 1090 /**< Running Walking Sensor: On-Shoe. */
#define BLE_APPEARANCE_RUNNING_WALKING_SENSOR_ON_HIP 1091 /**< Running Walking Sensor: On-Hip. */
#define BLE_APPEARANCE_GENERIC_CYCLING 1152 /**< Generic Cycling. */
#define BLE_APPEARANCE_CYCLING_CYCLING_COMPUTER 1153 /**< Cycling: Cycling Computer. */
#define BLE_APPEARANCE_CYCLING_SPEED_SENSOR 1154 /**< Cycling: Speed Sensor. */
#define BLE_APPEARANCE_CYCLING_CADENCE_SENSOR 1155 /**< Cycling: Cadence Sensor. */
#define BLE_APPEARANCE_CYCLING_POWER_SENSOR 1156 /**< Cycling: Power Sensor. */
#define BLE_APPEARANCE_CYCLING_SPEED_CADENCE_SENSOR 1157 /**< Cycling: Speed and Cadence Sensor. */
#define BLE_APPEARANCE_GENERIC_PULSE_OXIMETER 3136 /**< Generic Pulse Oximeter. */
#define BLE_APPEARANCE_PULSE_OXIMETER_FINGERTIP 3137 /**< Fingertip (Pulse Oximeter subtype). */
#define BLE_APPEARANCE_PULSE_OXIMETER_WRIST_WORN 3138 /**< Wrist Worn(Pulse Oximeter subtype). */
#define BLE_APPEARANCE_GENERIC_WEIGHT_SCALE 3200 /**< Generic Weight Scale. */
#define BLE_APPEARANCE_GENERIC_OUTDOOR_SPORTS_ACT 5184 /**< Generic Outdoor Sports Activity. */
#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_DISP 5185 /**< Location Display Device (Outdoor Sports Activity subtype). */
#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_DISP 5186 /**< Location and Navigation Display Device (Outdoor Sports Activity subtype). */
#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_POD 5187 /**< Location Pod (Outdoor Sports Activity subtype). */
#define BLE_APPEARANCE_OUTDOOR_SPORTS_ACT_LOC_AND_NAV_POD 5188 /**< Location and Navigation Pod (Outdoor Sports Activity subtype). */
/** @} */
/** @brief Set .type and .uuid fields of ble_uuid_struct to specified uuid value. */
#define BLE_UUID_BLE_ASSIGN(instance, value) do {\
instance.type = BLE_UUID_TYPE_BLE; \
instance.uuid = value;} while(0)
/** @brief Copy type and uuid members from src to dst ble_uuid_t pointer. Both pointers must be valid/non-null. */
#define BLE_UUID_COPY_PTR(dst, src) do {\
(dst)->type = (src)->type; \
(dst)->uuid = (src)->uuid;} while(0)
/** @brief Copy type and uuid members from src to dst ble_uuid_t struct. */
#define BLE_UUID_COPY_INST(dst, src) do {\
(dst).type = (src).type; \
(dst).uuid = (src).uuid;} while(0)
/** @brief Compare for equality both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */
#define BLE_UUID_EQ(p_uuid1, p_uuid2) \
(((p_uuid1)->type == (p_uuid2)->type) && ((p_uuid1)->uuid == (p_uuid2)->uuid))
/** @brief Compare for difference both type and uuid members of two (valid, non-null) ble_uuid_t pointers. */
#define BLE_UUID_NEQ(p_uuid1, p_uuid2) \
(((p_uuid1)->type != (p_uuid2)->type) || ((p_uuid1)->uuid != (p_uuid2)->uuid))
/** @} */
/** @addtogroup BLE_TYPES_STRUCTURES Structures
* @{ */
/** @brief 128 bit UUID values. */
typedef struct
{
uint8_t uuid128[16]; /**< Little-Endian UUID bytes. */
} ble_uuid128_t;
/** @brief Bluetooth Low Energy UUID type, encapsulates both 16-bit and 128-bit UUIDs. */
typedef struct
{
uint16_t uuid; /**< 16-bit UUID value or octets 12-13 of 128-bit UUID. */
uint8_t type; /**< UUID type, see @ref BLE_UUID_TYPES. If type is @ref BLE_UUID_TYPE_UNKNOWN, the value of uuid is undefined. */
} ble_uuid_t;
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* NRF_BLE_TYPES_H__ */
/**
@}
@}
*/

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