On mask being zero, it means any match, not exact match.
NOTE: This fix only targets CAN (M453/M487), not CAN-FD (M467).
NOTE: NUC472 CAN doesn't support filter.
1. The same Message Object number cannot use for both Tx and Rx simultaneously.
For Tx, Message Object number 31 is reserved instead of 0.
For Rx, Message Object numbers 0~30 are used and for filters.
2. NewDat bit (CAN_IsNewDataReceived()) isn't exclusive to Rx.
Recognize Rx interrupt by Message Object number other than 31.
NOTE: This fix only targets CAN (NUC472/M453/M487), not CAN-FD (M467).
Major modifications:
1. Handle Rx interrupt based on Message Object interrupt (CAN_IIDR=0x0001~0x0020) instead of CAN_STATUS.RxOK
2. Also handle Tx interrupt following above for consistency
Other related modifications:
1. Fix signature type error in CAN_CLR_INT_PENDING_BIT()
2. Add CAN_CLR_INT_PENDING_ONLY_BIT() which doesn't clear NewDat flag so that user can fetch received message in thread context
NOTE: This fix only targets CAN (NUC472/M453/M487), not CAN-FD (M467).
The HAL can_api stores an array of IDs in order to dispatch interrupts
to the correct CAN object. The drivers level CAN Class casts a pointer
to itself to an uint32_t, which is stored as the ID and then cast back
to a CAN * in order to call the correct handler. This results in
compilation failure when the size of an object pointer is greater than
uint32_t, for example when building on a PC for unit testing.
In order to allow Unit Testing of the CAN Class, we replace the use of
uint32_t with uintptr_t (type capable of holding a pointer), which
allows portability and expresses intentions more clearly. In aid of this
latter goal, we also replace the use of the name "id" with "context",
to improve clarity. These are addresses of the context related to that
callback.
Relevant modifications:
1. Support degrading QSPI0/1 to SPI4/5 for normal SPI transfer
2. Fix with BSP crypto driver API change
3. Fix with BSP PDMA driver API change
4. Make necessary modifications to pass FPGA CI Test Shield tests
5. Don't distinguish pinmap among parts e.g. M480 LG. Application users must take care.
Without free-up of peripheral pins, peripheral pins of the same peripheral may
share by multiple ports after port iteration, and this peripheral may fail with
pin interference.
Better IP initialization sequence:
1. Configure IP pins
2. Select IP clock source and then enable it
3. Reset the IP (SYS_ResetModule)
NOTE1: IP reset takes effect regardless of IP clock. So it doesn't matter if
IP clock enable is before IP reset.
NOTE2: Non-configured pins may disturb IP's state, so IP pinout first and then
IP reset.
NOTE3: IP reset at the end of IP initialization sequence can cover unexpected
situation.
Chun-Chieh Li
Hari Limaye
cyliangtw
Russ Butler