Commit Graph

46 Commits (feature-sdio)

Author SHA1 Message Date
jeromecoutant 7847ad79fb STM32F7 HAL CRYPT patch to add missing UNLOCK 2019-11-05 11:46:13 +01:00
jeromecoutant 4f788adeb9 STM32F7 refactor common files 2019-10-31 17:46:10 +01:00
jeromecoutant 8ac918975f F7 ST CUBE V1.10.0 => V1.15.0
https://www.st.com/en/embedded-software/stm32cubef7.html
2019-10-31 17:43:18 +01:00
Alexandre Bourdiol 7647b39adc TARGET_STM: I2C sequential communication revert PR #3324 to original cube HAL 2019-08-22 10:44:20 +02:00
Ireneusz Gaicki b9c4076741 STM32F7: Do not generate redundant IN tokens
When STM32F746-DISCO board was being used in (unsupported) USBHost mode,
the communication was unreliable. Our investigation revealed that the
problem lied in redundant IN tokens that the host generated even though
it shouldn't. This could lead to endless high-frequency NAKs being
received from device, which caused watchdog reset as USBHost spent all
time in interrupt handlers.

In our application the clocks frequencies are:
  * HCLK = 48 MHz
  * APB1 = 6 MHz
  * APB2 = 12 MHz

We have captured the raw USB High-Speed traffic using OpenVizsla.
Without this change, when USB MSD device connected to the system
responded to IN with NAK, there were excessive IN tokens generated about
667 ns after the NAK. With this commit the IN tokens are generated no
sooner than 10 us after the NAK.

The high frequency of the IN/NAK pairs is not the biggest problem.
The biggest problem is that the USB Host did continue to send the IN token
after DATA and ACK packets were received from device - *without* any request
from upper layer (USB MSD).

The USB MSD devices won't have extra data available on Bulk IN endpoint
after the expected data was received by Host. In such case IN/NAK cycle
time is only houndreds of nanoseconds, the MCU has no time for anything else.

The problem manifested not only on Bulk endpoints, but also during
Control transfers. Example correct scenario (when this fix is applied):
  * SETUP stage
    * SETUP [host -> address 0 endpoint 0]
    * DATA0 [80 06 00 01 00 00 08 00] [CRC16: EB 94]
    * ACK
  * DATA stage
    * IN
    * NAK
    ... the IN/NAK repeated multiple time until device was ready
    * IN
    * DATA1 [12 01 10 02 00 00 00 40] [CRC16: 55 41]
    * ACK
  * STATUS stage
    * OUT
    * DATA1 ZLP
    * ACK

Without this commit, in DATA stage, after the ACK was received, the host
did send extra IN to which device responded with STALL. On bus it was:
  * DATA stage
    ...
    * IN
    * DATA1 [12 01 10 02 00 00 00 40] [CRC16: 55 41]
    * IN
    * STALL
    * IN
    * STALL
  * STATUS stage
    * OUT
    * DATA1 ZLP
    * STALL

In the fault case the next SETUP was sent only after 510 ms, which
indicates timeout in upper layer.

With this commit the next SETUP is sent 120 us after the STATUS stage ACK.
2019-07-24 11:40:49 +02:00
Martin Kojtal ccb63d771e
Merge pull request #10857 from ARMmbed/feature-watchdog
Add Watchdog and ResetReason
2019-07-03 11:43:52 +01:00
jeromecoutant 7d05f22b31 STM32F7 warning compilation
[-Wparentheses-equality]
[-Wsign-compare]
2019-06-07 18:10:03 +02:00
jeromecoutant 570e9b0bf4 STM32 WATCHDOG : increase timeout value 2019-05-24 11:35:42 +02:00
Vincent Veron 9856e86897 TARGET_STM32F7: Reset QSPI in default mode on abort for all versions.
This patch is missing in F7 HAL.
Fix #10049

Signed-off-by: Vincent Veron <vincent.veron@st.com>
2019-04-08 11:47:15 +02:00
bcostm 28462d476a STM32F7 USB: add patch in CubeF7 hal driver 2019-02-22 10:53:22 -06:00
Martin Kojtal 723236f855
Merge pull request #9307 from mtomczykmobica/ONME-3949
Configuration options for STM_EMAC buffer counts
2019-02-19 14:09:24 +01:00
Marcin Tomczyk a5f93e0b07 ONME-3949 Configuration options for STM_EMAC buffer counts 2019-02-19 08:18:18 +01:00
jeromecoutant 6b226ffcef STM32 RTC update for easy maintenance 2018-12-04 11:08:30 +01:00
jeromecoutant baec3b9e90 STM32 remove html release notes files 2018-11-22 16:27:59 +01:00
bcostm b5a8dc513c fix hash alignment of F2, F7, L4 2018-06-13 11:51:24 +02:00
Cruz Monrreal 3d61cb59ab
Merge pull request #6948 from jeromecoutant/PR_ETHER
STM32 ETH : remove TX RX locking interrupt perforation
2018-06-11 09:02:21 -05:00
jeromecoutant 06bca28268 STM32F7 ADC internal channels update 2018-05-22 13:16:37 +02:00
jeromecoutant c31554f618 STM32 ETH : remove TX RX locking interrupt perforation 2018-05-18 10:53:02 +02:00
Cruz Monrreal 0f51ea031e
Merge pull request #6610 from pauluap/stm32_eth_remove_tx_rx_locking_interrupt_perforation
Stm32 eth remove tx rx locking interrupt perforation
2018-05-07 10:51:03 -05:00
Cruz Monrreal e2567e5dad
Merge pull request #6599 from jeromecoutant/PR_WARNING
STM32 compilation warning issues
2018-04-16 10:41:36 -05:00
Paul Thompson b45d4233e1 Make the atomic_clr_u32 conditional use raw values rather than computed, remove need for guards 2018-04-13 04:44:43 -07:00
Paul Thompson 2211a27f53 Drop usage of ilen, just use len and cast it to int32_t as appropriate 2018-04-13 00:27:00 -07:00
Paul Thompson 8f4a5e2093 Revert to original fix concentrating on type correctness 2018-04-12 10:09:53 -07:00
Paul Thompson 430784b084 Initial work was for unsigned-signed comparison fix. Current work fixes negative number issues
Compile: stm32f7xx_hal_pcd.c
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c: In function 'PCD_WriteEmptyTxFifo':
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c:1310:11: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
   if (len > ep->maxpacket)
           ^
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c:1325:13: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
     if (len > ep->maxpacket)
             ^
2018-04-12 09:43:18 -07:00
Paul Thompson c67f535fb3 Drop locking around TX and RX. The DMA channels are independent of each other 2018-04-12 09:42:28 -07:00
jeromecoutant 2d0dce1db5 STM32F7 : correct compilation warnings 2018-04-12 10:55:02 +02:00
bcostm 118073a9c5 Add missing can legacy file 2018-02-12 10:37:03 +01:00
bcostm 58c4a5f83e F7 ST CUBE V1.10.0
F7 HAL driver V1.2.5
2018-02-12 10:37:03 +01:00
jeromecoutant 703df3b6f9 STM32F7 SPI - add missing HAL files
ST_INTERNAL_REF 43358
2018-02-05 11:06:14 +01:00
Kevin Bracey 05e2ae7a70 Add memory barriers to STM32F7xx Ethernet
Pending official update from STM, add memory barriers to the Ethernet
HAL code for the STM32F7xx family.

Cortex-M7 has a merging write buffer that is not automatically flushed
by accesses to devices, so without these DMBs, we sometimes lose synch
with the transmitter.

The DMBs are architecturally needed in every version of this HAL, but
adding just to the STM32F7 version for now to clear test, as the
problem has only been observed on Cortex-M7-based devices.

Fixes #5622.
2017-12-20 15:05:29 +02:00
Bartek Szatkowski c5a5438256 Update params in calls to LD/STREXW to be uint32_t 2017-11-10 09:53:42 +00:00
jeromecoutant 1e36eb6fc9 STM32F7 : RTC Wake Up Timer issue 2017-09-26 17:04:29 +02:00
jeromecoutant 26cd51f42a STM32F7 : json clock source configuration
- default value is the same as before patch
- system_stm32f7xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
2017-07-19 16:23:43 +02:00
adustm 8058e04238 F7 ST CUBE V1.7.0 2017-06-23 09:49:31 +02:00
Laurent MEUNIER 8576993a1a Introduce stm32_assert.h for MBED port
When we want to activate USE_FULL_ASSERT macro in STM32 CUBE, there is a
need to have the assert map to MBED.

The easiest way to have this definition in a single place for all STM32
HAL and LL files using it, is to add a specific header file where the
porting to MBED is done.
2017-05-29 13:48:29 +02:00
Michel Jaouen c581230cd3 USBHOST: TARGET_STM fix in hal for hub support 2017-05-09 16:18:33 +02:00
Laurent MEUNIER 4eea8fa863 STM32 Fixed warning related to __packed redefinition
Before this patch, many warnings like below were generated
during compilation with ArmCC
[Warning] lwip_ethernet.h@57,0:  #3135-D: attribute does not apply to any entity

This happens here as ``--gnu`` option of ArmCC is being used, which
enables the GNU compiler extensions that the ARM compiler supports.

This is solve by adding a extra check on __CCARM .
2017-04-27 10:32:00 +02:00
jeromecoutant b77533dd51 STM32Cube_FW_F7_V1.6.0
CMSIS v1.1.2 => v1.2.0
    STM32F7 HAL v1.1.2 => v1.2.0
2017-03-06 16:48:23 +01:00
jeromecoutant 565ad777b0 STM32F7 : remove multiple HSE_VALUE define value 2017-02-10 13:06:41 +01:00
jeromecoutant f5b62208f4 STM32Cube_FW_F7_V1.5.1
CMSIS v1.1.0 => v1.1.2
    STM32F7 HAL v1.1.0 => v1.1.2
2017-01-13 13:29:45 +01:00
Michel Jaouen 8af69dcbd6 STM32 HAL HCD : USBHOST changes for f4,f2,l4,f7
- reset toggle_out , toggle_in at init
-  in/out toggle in on ctrl endpoint
- remove call back when transmission restarted
2017-01-02 09:48:15 +01:00
Sam Grove 4c2b84a865 Merge pull request #3408 from jeromecoutant/PR_ST_F7_ASSERT
STM32F7 : map ST HAL assert into MBED assert
2016-12-15 10:29:34 -06:00
jeromecoutant 9dc5cd1266 STM32F7 : refactor stm32f7xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-08 15:54:38 +01:00
Laurent MEUNIER 23926a2418 [STM32] HAL I2C (V2) sequential transmit / receive
In case of sequential transmit / receive, there is a need to:
- not use the reload option
- generate a new START on each new transaction

This applies to all HAL supporting the IP version V2.
2016-11-30 08:23:13 +01:00
Michel Jaouen 182c311fbd TARGET_STM : USB FS STM HAL changes 2016-11-09 12:08:45 +01:00
Christopher Haster 26ced98734 restructure - Restructured cmsis directory
targets/cmsis -> cmsis
targets/cmsis/TARGET_* -> targets/TARGET_*/device
targets/cmsis/TARGET_*/mbed_rtx.h -> targets/TARGET_*/mbed_rtx.h
2016-10-04 17:51:44 -05:00