mirror of https://github.com/ARMmbed/mbed-os.git
778d6822bf
uVisor doesn't set the PSP of the target thread. The RTOS sets the PSP of the target thread from the target thread's TCB. However, when interrupts of higher priority than PendSV happen between the call to uVisor to switch boxes, and the RTOS setting PSP, the uVisor vIRQ interrupt handler will attempt to use an invalid PSP (the PSP from before the box and thread switch). This leads to a crash. Make box and thread switching atomic by disabling interrupts immediately before the box switching until immediately after the new PSP is set. |
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| TOOLCHAIN_ARM | ||
| TOOLCHAIN_GCC | ||
| TOOLCHAIN_IAR | ||