jhokajar 0dfca1ad86 SiLabs Pearl: More SPI fixes for 9-16 bit frames ... spi_buffer_tx_write fixed to work correctly with 9-16 bit frames, if transfer length > 1. If frame is 9-16 bit client can use uint16_t or uint32_t buffer for data storage, spi_api's default is to use uint16_t. Added precompiler condition USE_UINT16_BUFFER to change assumption for DMA and IRQ -transfers.		2016-01-12 17:21:18 +01:00
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TARGET_ARM_SSG/TARGET_MPS2	fixes to review comments	2015-07-02 14:30:55 +01:00
TARGET_Atmel	Reverted temp rename	2015-11-04 16:04:30 +05:30
TARGET_Freescale	Update i2c_api.c	2015-11-27 19:41:30 +00:00
TARGET_Maxim	[MAXWSNENV] Adding exactLE BLE stack library.	2015-12-01 08:38:43 -06:00
TARGET_NORDIC/TARGET_MCU_NRF51822	Fix nRF51 baud table size	2015-12-21 23:59:55 -06:00
TARGET_NXP	maintain support for micromint bambino and lpcxpresso boards	2015-12-28 00:18:59 -06:00
TARGET_RENESAS/TARGET_RZ_A1H	Modify the register setting method in the pin setting configuration.	2015-08-26 12:58:32 +09:00
TARGET_STM	[STM all] Fix #1480: change location of check for RTC already initialised	2016-01-12 09:30:33 +00:00
TARGET_Silicon_Labs/TARGET_EFM32	SiLabs Pearl: More SPI fixes for 9-16 bit frames	2016-01-12 17:21:18 +01:00
TARGET_WIZNET/TARGET_W7500x	Modified LED definition error when test singletest.py.	2015-09-30 12:17:52 +09:00