Commit Graph

553 Commits (mbed-os-5.15.5)

Author SHA1 Message Date
Chun-Chieh Li de982dbf58 M2354: Get around LDRB last byte of flash in non-secure
On test chip, byte-read (LDRB) last byte of flash in non-secure world always gets 0xFF.
Get around it. Recover back on MP chips.
2020-07-10 09:45:21 +08:00
Chun-Chieh Li 3dd967426d M2354: Add pre-built secure image/lib for non-PSA 2020-07-10 09:45:21 +08:00
Chun-Chieh Li d1ea81e991 M2354: Initial support 2020-07-07 17:09:57 +08:00
Martin Kojtal 8e5976898f
Merge pull request #12969 from OpenNuvoton/nuvoton_5.15_watchdog_hardfault
Nuvoton: Fix watchdog reset failure on meeting Hard Fault (5.15)
2020-06-09 11:09:06 +02:00
Martin Kojtal 1dd5069fe7
Merge pull request #12986 from OpenNuvoton/nuvoton_5.15_m2351_npsa_secure-minimal-build
M2351: Enable non-PSA minimal secure build (5.15)
2020-06-08 13:23:16 +02:00
Chun-Chieh Li e0bd07f649 M2351: Enable non-PSA minimal secure build
In this new memory partition, secure program is most simplified and non-secure program can make most use of memory for its large application like Pelion:

-   Flash (512KiB in total): 64KiB for secure and 448KiB for nonsecure.
-   SRAM (96KiB in total): 8KiB for secure and 88KiB for nonsecure.

Besides, to make secure program fit into 8KiB:

-   Decrease boot stack size to 0x600 bytes
-   Remove serial support
-   Remove LPTICKER

Re-build default secure image/gateway library to favor Pelion client application
2020-05-18 11:12:19 +08:00
Chun-Chieh Li 3d1fd6ae0d Nuvoton: Change WDT clock source to LXT
LIRC has 40%~50% error rate, so change WDT clock source to LXT from LIRC.

NOTE: NANO100 series just supports LIRC-clocked WDT.
2020-05-14 11:45:38 +08:00
Chun-Chieh Li 572bae3ad6 Nuvoton: Fix failure to change WDT clock source
WDT clock source selection and its enablement bits are protected. Add unlock sequence before write to them.
2020-05-14 11:45:34 +08:00
Chun-Chieh Li 2162aaaea3 Nuvoton: Fix WDT feature report with clock frequency 2020-05-14 11:45:31 +08:00
Chun-Chieh Li b70b65c1b5 Nuvoton: Enlarge WDT reset delay to avoid premature WDT reset
Consider the following factors to define WDT reset delay:
1. Cannot be too small. This is to avoid premature WDT reset in pieces of timeout cascading.
2. Cannot be too large. This is to pass Greentea reset_reason/watchdog_reset tests, which have e.g. 50~100 reset delay tolerance.
2020-05-14 11:45:27 +08:00
Chun-Chieh Li 9c59bd0bb9 Nuvoton: Fix watchdog reset failure on meeting Hard Fault
Original implementation doesn't enable watchdog reset in pieces of cascaded timeout, except the last one. This is to guarantee re-configuration can be in time, but in interrupt disabled scenario e.g. Hard Fault, watchdog reset can cease to be effective.

This change enables watchdog reset all the way of cascaded timeout. With trade-off, guaranteed watchdog reset function is more significant than re-configuration in time.
2020-05-14 11:42:51 +08:00
Chun-Chieh Li 18c39983f7 NANO130: Decrease heap to 2.75KiB to spare SRAM for static allocation
This adjustment is to pass compile on IAR on which heap configuration is hard-coded and cannot be adjusted according to staic SRAM usage.
2019-12-11 10:45:56 +00:00
Chun-Chieh Li 829efa291c NANO130: Fix OOM with packing algorithm at IAR linking
At IAR linking, the default method of 'initialize by copy' is 'auto', which will estimate
different packing algorithms, including complex 'lz77', for smallest memory footprint. But
the algorithm itself can consume some SRAM and cause OOM at linking time for NANO130, which
just has 16KiB SRAM. To avoid this error, always choose 'none' packing algorithm.
2019-12-11 10:45:56 +00:00
Chun-Chieh Li aae04b2516 Nuvoton: Remove TRNG support
These targets below just support PRNG, not real TRNG. They cannot annouce TRNG.

-   NUMAKER_PFM_NUC472
-   NUMAKER_PFM_M487
-   NUMAKER_IOT_M487

On targets without TRNG, to run mbedtls applications which require entropy source,
there are two alternatives to TRNG:

-   Custom entropy source:
    Define MBEDTLS_ENTROPY_HARDWARE_ALT and provide custom mbedtls_hardware_poll(...)
-   NV seed:
    1.  Define MBEDTLS_ENTROPY_NV_SEED
    2.  Define MBEDTLS_PLATFORM_NV_SEED_READ_MACRO/MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO and provide custom mbedtls_nv_seed_read(...)/mbedtls_nv_seed_write(...).
    3.  Don't define MBEDTLS_PSA_INJECT_ENTROPY. Meet mbedtls_psa_inject_entropy(...) undefined and then provide custom one, which must be compatible with mbedtls_nv_seed_read(...)/mbedtls_nv_seed_write(...) above.
    4.  For development, simulating partial provision process, inject entropy seed via mbedtls_psa_inject_entropy(...) pre-main.
2019-11-13 18:01:24 +08:00
Martin Kojtal 5a1ccc0f2f
Merge pull request #11780 from OpenNuvoton/nuvoton_fpga_perif_free
Nuvoton: Add implementations of HAL API i2c_free and analogin_free
2019-11-04 09:49:36 +01:00
Martin Kojtal eea83007be
Merge pull request #11203 from Tharazi97/Watchdog_lower_limit_timeout_test
Add watchdog lower limit timeout test
2019-10-31 14:25:52 +01:00
Chun-Chieh Li 0260f1b3df NANO130: Remove unnecessary synchronization in analog-in HAL
Driver AnalogIn has done with it, so remove synchronization in analog-in HAL.
2019-10-31 15:23:57 +08:00
Chun-Chieh Li 72ea613a12 Nuvoton: Add i2c_free
1.  Disable interrupt
2.  Disable IP clock
3.  Free up pins

Support targets:

-   NUMAKER_PFM_NANO130
-   NUMAKER_PFM_NUC472
-   NUMAKER_PFM_M453
-   NUMAKER_PFM_M487/NUMAKER_IOT_M487
-   NU_PFM_M2351*
-   NUMAKER_IOT_M263A
-   NUMAKER_M252KG
2019-10-31 15:22:57 +08:00
Chun-Chieh Li 3abd02614a Nuvoton: Add analogin_free
1.  Deal with channel-wise and module-wise
2.  Disable IP clock
3.  Free up pin

Support targets:

-   NUMAKER_PFM_NANO130
-   NUMAKER_PFM_NUC472
-   NUMAKER_PFM_M453
-   NUMAKER_PFM_M487/NUMAKER_IOT_M487
-   NU_PFM_M2351*
-   NUMAKER_IOT_M263A
-   NUMAKER_M252KG
2019-10-31 15:19:15 +08:00
Chun-Chieh Li 8161386268 M2351: Update default secure image/gateway library
Update for change of TRNG security attribute
2019-10-24 10:55:24 +08:00
Chun-Chieh Li 4cd0332ada NUVOTON: Re-implement TRNG HAL with TRNG H/W
Targets supporting TRNG H/W:

-   NU_PFM_M2351_*
-   NUMAKER_IOT_M263A
2019-10-24 10:55:03 +08:00
Chun-Chieh Li 3f9ba9e61f NUVOTON: Fix BSP/MKROM header
Related targets:
-   NU_PFM_M2351_*
-   NUMAKER_IOT_M263A
2019-10-24 09:36:25 +08:00
Chun-Chieh Li d993c5a108 NUVOTON: Re-implement __PC() with toolchain built-in
Re-implement __PC() by replacing BSP assembly with toolchain built-in.
2019-10-24 09:36:25 +08:00
Chun-Chieh Li 3548d38a98 M2351: Change TRNG security attribute to secure 2019-10-24 09:36:24 +08:00
Chun-Chieh Li c326e07eb1 M2351: Update BSP/crypto driver 2019-10-24 09:36:24 +08:00
int_szyk d68a802f07 Add watchdog clock accuracy to Nuvoton targets. 2019-09-30 08:10:25 +02:00
Chun-Chieh Li f45ca72f11 [M252KG] Remove TRNG support
Reasons to remove TRNG support:
1.  M252 just has 32KiB SRAM and cannot afford mbedtls application.
2.  Implementing TRNG HAL with PRNG H/W has security concern.
2019-09-27 17:50:48 +08:00
Chun-Chieh Li 0168304e5b [M252KG] Add BSD-3-Clause license for BSP files 2019-09-27 17:45:57 +08:00
Chun-Chieh Li 967effe59f [M252KG] Free up peripheral pins in peripheral free-up HAL API
Without free-up of peripheral pins, peripheral pins of the same peripheral may
share by multiple ports after port iteration, and this peripheral may fail with
pin interference.
2019-09-27 17:45:56 +08:00
Chun-Chieh Li 38aaee0c1a [M252KG] Support GPIO input pull-high/pull-low
In Nuvoton, only new-design chips support GPIO input pull-high/pull-low modes.
Targets not supporting this feature are listed below:

- NUMAKER_PFM_NANO130
- NUMAKER_PFM_NUC472
- NUMAKER_PFM_M453
2019-09-27 17:45:56 +08:00
Chun-Chieh Li 1447d9049f [M252KG] Fix redundant call to UART IRQ handler
Honor RxIrq/TxIrq to avoid redundant call to UART IRQ handler.

This is also to fix FPGA CI test mbed_hal_fpga_ci_test_shield-uart.
2019-09-27 17:45:55 +08:00
Chun-Chieh Li d9217ed77a [M252KG] Fix redundant SPI clock generation
Fix SPI clocks are generated redundantly at the end of transfer.

This is also to fix FPGA CI test mbed_hal_fpga_ci_test_shield-spi/
SPI - async mode.
2019-09-27 17:45:55 +08:00
Chun-Chieh Li c68af32a4c [M252KG] Fix I2C NACK error
Fix logic error on replying NACK at the end of transfer.

This is also to fix FPGA CI test mbed_hal_fpga_ci_test_shield-i2c/
i2c - test single byte read i2c API.
2019-09-27 17:45:55 +08:00
Chun-Chieh Li 0917a0d5a6 [M252KG] Fix IP initialization sequence
Better IP initialization sequence:
1. Configure IP pins
2. Select IP clock source and then enable it
3. Reset the IP (SYS_ResetModule)

NOTE1: IP reset takes effect regardless of IP clock. So it doesn't matter if
       IP clock enable is before IP reset.
NOTE2: Non-configured pins may disturb IP's state, so IP pinout first and then
       IP reset.
NOTE3: IP reset at the end of IP initialization sequence can cover unexpected
       situation.
2019-09-27 17:45:54 +08:00
Chun-Chieh Li 4bb7fde6b5 [M252KG] Exclude USB UART from testing
USB UART is dedicated to USB COM and so must exclude from FPGA CI testing.
2019-09-27 17:45:54 +08:00
Chun-Chieh Li cd73422345 [M252KG] Force enum PinName to 32-bit
NU_PINNAME_BIND(...) requires enum PinName to be 32-bit to encode module
binding information in it.
2019-09-27 17:45:54 +08:00
Chun-Chieh Li 36278618ad Support Nuvoton's NUMAKER_M252KG target 2019-09-27 17:45:52 +08:00
Chun-Chieh Li 85bb65cd56 M2351: Add pre-built secure image for non-PSA 2019-09-16 11:01:34 +08:00
Chun-Chieh Li 2471c9ea10 M2351: Remove pre-built non-PSA secure image temporarily
This will add back immediately after target renaming is done.
2019-09-16 10:20:30 +08:00
Chun-Chieh Li 254866eac1 M263: Remove redundant SPI I2S pins from pinmap
The pins suffixed with 'I2SMCLK' are for SPI I2S and cannot be used in normal SPI.

This is also to fix FPGA CI test mbed_hal_fpga_ci_test_shield-spi.
2019-08-30 11:33:56 +08:00
Chun-Chieh Li c67a0d8bd0 M263: Free up peripheral pins in peripheral free-up HAL API
Without free-up of peripheral pins, peripheral pins of the same peripheral may
share by multiple ports after port iteration, and this peripheral may fail with
pin interference.
2019-08-30 11:33:55 +08:00
Chun-Chieh Li 78ae1e0c73 M263: Support GPIO input pull-high/pull-low
In Nuvoton, only new-design chips support GPIO input pull-high/pull-low modes.
Targets not supporting this feature are listed below:

- NUMAKER_PFM_NANO130
- NUMAKER_PFM_NUC472
- NUMAKER_PFM_M453
2019-08-30 11:33:54 +08:00
Chun-Chieh Li 5b7beab9da M263: Fix redundant call to UART IRQ handler
Honor RxIrq/TxIrq to avoid redundant call to UART IRQ handler.

This is also to fix FPGA CI test mbed_hal_fpga_ci_test_shield-uart.
2019-08-30 11:33:52 +08:00
Chun-Chieh Li eb435b7da0 M263: Fix redundant SPI clock generation
Fix SPI clocks are generated redundantly at the end of transfer.

This is also to fix FPGA CI test mbed_hal_fpga_ci_test_shield-spi/
SPI - async mode.
2019-08-30 11:33:51 +08:00
Chun-Chieh Li d15abe5171 M263: Fix I2C NACK error
Fix logic error on replying NACK at the end of transfer.

This is also to fix FPGA CI test mbed_hal_fpga_ci_test_shield-i2c/
i2c - test single byte read i2c API.
2019-08-30 11:33:49 +08:00
Chun-Chieh Li 9d4d99cf34 M263: Fix IP initialization sequence
Better IP initialization sequence:
1. Configure IP pins
2. Select IP clock source and then enable it
3. Reset the IP (SYS_ResetModule)

NOTE1: IP reset takes effect regardless of IP clock. So it doesn't matter if
       IP clock enable is before IP reset.
NOTE2: Non-configured pins may disturb IP's state, so IP pinout first and then
       IP reset.
NOTE3: IP reset at the end of IP initialization sequence can cover unexpected
       situation.
2019-08-30 11:33:48 +08:00
Chun-Chieh Li 9aa69d03bf M263: Exclude USB UART from testing
USB UART is dedicated to USB COM and so must exclude from FPGA CI testing.
2019-08-30 11:33:47 +08:00
Chun-Chieh Li 3cb95a8baf M263: Force enum PinName to 32-bit
NU_PINNAME_BIND(...) requires enum PinName to be 32-bit to encode module
binding information in it.
2019-08-30 11:33:45 +08:00
cyliangtw e57ed04252 modify acceptable license term of SDK drivres 2019-08-23 18:12:23 +08:00
cyliangtw 23267ba229 re-license files of M261 device folder to be Apache 2019-08-23 18:12:19 +08:00