- default value is the same as before patch
- system_stm32f0xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
In this commit, the analogin_s structure is moved to commonn_objects.h file
to limit the duplicaion.
The ADC handle is moved from a global variable to a struct member of the
analogin object. This allows multiple ADC instances to work correctly.
Note that State needs to be explicitely set to HAL_ADC_STATE_RESET
because the object is not zero initialized.
Moving some code in common to be able to manage several ADC instances,
or several channels of an instance.
The change involves:
- moving dac_s structure definition to common_object.h
- create TARGET_STM/analogout_api.c and move fully common analog_out
functions in there
- rename analogout_api.c of each target family into analogout_device.c
to keep platform specific code
- update analogout_device.c to rely on obj->handle and obj->channel
- align analogout_init function as much as possible between families in
analogout_device.c files
Remove HAL_Init and related code from SystemInit and move it to
mbed_sdk_init. The function SystemInit is called early in the boot
sequence before RAM is initialized or the VTOR is setup, so it should
not be used to perform the HAL initialization.
This fixes crashes due the vector table being used before it has been
relocated.
Restore cmsis_nvic (cmsis_nvic.c and cmsis_nvic.h) files for the
implementations which use a mechanism other than the VTOR to set
interrupts. These are vendor specific and were done for M0 devices
which do not have a VTOR.
Note - There were two cmsis_nvic files which did not use the VTOR that
which not restored in this patch. This is because these targets were
not M0 devices and could use the new unified implementation instead.
These files are:
targets\TARGET_ARM_SSG\TARGET_MPS2\TARGET_MPS2_M0P\device\cmsis_nvic.c
targets\TARGET_ONSEMI\TARGET_NCS36510\device\cmsis_nvic.c
Note - cmsis_nvic.c and cmsis_nvic.h were initial removed in
(and restored from) the commit:
b97ffe8fdc -
"CMSIS5: Replace target defined NVIC_Set/GetVector with CMSIS implementation"
For STM32 targets using a 32-bit timer for the microsecond ticker, the
driver did not properly handle timestamps that are in the past. It
would just blindly set the compare register to the requested timestamp,
resulting in the interrupt being serviced up to 4295 seconds late
(i.e. after the 32-bit timer counts all the way around to hit the
timestamp again).
This problem can easily be reproduced by creating a Timeout object
then calling the timeout's attach_us() member function to attach a
callback with a timeout of 0 us. The callback will not get called for
over 2147 seconds, and possibly up to 4295 seconds late if no other
microsecond ticker events are getting scheduled in the meantime.
Now, after the compare register has been set, the timestamp is checked
against the current time to see if the timestamp is in the past, and
if so, the compare event is manually set.
NOTE: By checking if the timestamp is in the past after configuring the
capture register, we ensure proper handling in the case where the timer
updates past the timestamp while setting the capture register.
Revert HRM1017 file source deletion
Added in small comment next to additions
Added mapping to BTN-labelled switches
Added mapping to USER_BUTTON-labelled switches
Undo incorrect mapping to SWIO pin in NORDIC target
Only one point of attention:
STM_MODE_ANALOG_ADC_CONTROL is a specific mode that is only supported on L4.
So STM_MODE_ANALOG_ADC_CONTROL was moved to index 13 (last entry)
of gpio_mode table so that all the other modes are common and only the last
one is specific.
Since most of the code in i2c_api.c is now relying on STM32 HAL, there
is now a possibility to make a common usage of this code accross families.
The IP version definition is introduced per family, to allow a switch of
functionnalities, especially the frequency management which differs.
BTw, we fix the F0 frequency settings at the same time.
F1 is managed for now as an exception as the HAL API for sequential transmit
/receive is not yet available (coming soon)
the SPI_ASYNCH feature has been already activated for STM32F4.
This patchset makes it supported on all STM32 families by:
- moving spi_s structure at family level instead of board level
- using the F4 spi_api.c reference implementation and making it a common
stm_spi_api.c file which makes maintenance a lot easier.
- the only part that needs to be implemented for each family is the computation
of the clock frequency input to the spi peripheral which is not the same
accross families. So this is what remains in the spi_api.c of each family.
Because of the introduction of the common file, all the above modifications
needs to be done at once.
jeromecoutant
Cruz Monrreal
Jimmy Brisson
bcostm
Laurent MEUNIER
Russ Butler
Sam Grove
Bradley Scott
Bartek Szatkowski
Kevin Gilbert
Martin Kojtal
Michel Jaouen
Laurent MEUNIER
Christopher Haster