Commit Graph

3814 Commits (fbbda73faa72ed811225a5bbf9a74b28da33fa93)

Author SHA1 Message Date
Bartosz Szczepanski aa2ecad0b2 [STM32F0xx] Move CAN API to new directory structure
We need to remove *can_api.c* file accordingly to new directory structure.
Without that we can't compile any CAN mBed test.

Change-Id: I3d4f798ad75ec1b4c4a1d7ed877e71b7db6bf60f
2016-05-23 16:30:25 +02:00
0xc0170 c70aedc044 Merge branch 'can-devel-f0' of https://github.com/BartSX/mbed into BartSX-can-devel-f0 2016-05-23 10:37:22 +01:00
Mihail Stoyanov d5ad8cb949 Rename .mbedignore to .buildignore 2016-05-23 09:14:03 +01:00
Mihail Stoyanov d9734e5a32 Simplify layout:
* /libraries/mbed -> /hal
* /libraries/rtos -> /rtos
2016-05-23 09:13:59 +01:00
Martin Kojtal bd78f98496 Merge pull request #1750 from NXPmicro/dev_ksdk_2.0
Fix for Issue#1740.
2016-05-22 16:47:45 +01:00
Bartosz Szczepanski fad2190225 [NUCLEO_F042K6] Added CAN support
Added CAN API support for NUCLEO_F042K6 target.

"stm32f042x6.h" file was changed to avoid compilation errors.

Change-Id: I9622a233775fc6834201a322740bf5026244d50e
2016-05-20 13:27:58 +02:00
Bartosz Szczepanski d140e9959a [NUCLEO_F072RB] Added CAN support
Added CAN API support for NUCLEO_F072RB target.

*stm32f072xb.h* file was changed to avoid compilation errors.

Change-Id: I9da75fde29fd19f0326d554acc1dbb5386b08317
2016-05-20 11:48:34 +02:00
Bartosz Szczepanski 8577163ca3 [NUCLEO_F091RC] Added CAN support
Added CAN API suport for NUCLEO_F091RC target.

*stm32f091xc.h* file was changed to avoid compilation errors.

Change-Id: I9207575a0e2ad0f8e3a4bb78eb23d1e7b4a94171
2016-05-20 11:48:33 +02:00
Bartosz Szczepanski f04377d889 Added CAN API for STM32F0xx family
* STM32F0xx family have only one CAN bus

Change-Id: Id17fbfb825fabe04725a829a121300290f074919
2016-05-20 11:26:55 +02:00
Mahadevan Mahesh e6e1f73599 Fix for Issue#1740. The latest SDK drivers for FTM & TPM has the fix for this issue
This fixes issues seen when running FTM and TPM demos in certain modes

Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2016-05-17 12:03:14 -05:00
Martin Kojtal a1914e17f3 Merge pull request #1742 from ohagendorf/STM32F4xx_PR1707_bugfix
[STM32F4xx] bugfix for PR #1707
2016-05-17 14:42:31 +01:00
Martin Kojtal b77f84df32 Merge pull request #1747 from TomoYamanaka/master_branch
Fixed a problem that can not be the task generation in Cortex-A9.
2016-05-17 12:56:08 +01:00
TomoYamanaka 909c76f36c In IAR compile, change the sequence of the ROM section. (#1722)
we changed the sequence of ROM section to "<ro code> <ro data>" when compiled with the IAR.

When the ROM area is large, PC could not jump properly in the program area.
The other development environment of this sequence ("ro code, ro data").
2016-05-17 12:39:47 +01:00
tomoyuki yamanaka d0250bb09e Fixed a problem that can not be the task generation in Cortex-A9.
https://github.com/mbedmicro/mbed/pull/1702
    In this PR, rtx has updated, the macro into the code were changed.
    However, by this macro, the process of task generation in Cortex-A9 can no longer be run.
    So, we solve the task generation problem by changing the macro into Tread.cpp again.
2016-05-17 20:18:10 +09:00
ohagendorf 1be302b1b6 [STM32F4xx] bugfix for PR #1707 - more typos
I found and corrected some more typos.
2016-05-16 19:05:57 +02:00
Bartosz Szczepanski 1d1f7ab133 [STM32F4] Clock and interrupt fixes (#1735)
* [STM32F4] Get PCLK1 clock and set initial CAN frequency

CAN bus opperates on APB1 peripheral clock due to that we need to get PCLK1 freq
in *can_frequency()* function to properly calculate CAN speed and reconfigure
BS1, BS2, SJW bits.

Also to fully communicate with other ST platform we set the initical CAN
frequency to 100kb/s to be able to work with the slowest platform which supports
CAN, which is NUCLEO_F303K8 (APB1 is 32MHz).

Change-Id: I10af3aa8d715dd61c9d1b216ef813193449fecbd

* [STM32F4] Fix for CAN2 interrupt index

CAN2 interrupt index was wrong leading to not properly registering interrupt.
Having this fix allow us to pass MBED_30 test.

Change-Id: I33f9ca7c81286f7746a8f8352619e213bdf9756a
2016-05-16 11:55:59 +01:00
ohagendorf 97d282eae1 [STM32F4xx] bugfix for PR #1707
With PR #1707 all STM32F4 targets with UART4 and UART5 are broken, a several typos in function definition.
Seems to be a bug in STM32Fcube HAL, not only in the (older) mbed versin but also in current version
2016-05-15 19:24:23 +02:00
adustm 7bd986845c [STM32F1 F4] Fix #1705 MBED_37 (#1707)
* [STM32F1 F4] Fix #1705 MBED_37

The transmit data register needs to be flushed at the initialisation of
the uart.
In case previous transmission was interrupted by a uart init, uart may
contain a char that will be transmitted at the next start.

This is the case in MBED_37 test (serial_auto_nc_rx).
The MCU is writting {{start}}\n
At the moment of the \n the main program is handling 'new serial'. The
next time the main program is handling a printf, the previous \n is
still present in the uart->DR register and is transmitted.
This cannot happen anymore with this commit

* [STM32_F1] Fix #1705 MBED_37 by resetting the uart
2016-05-13 15:50:13 +01:00
bcostm 13f0c1ff6f [NUCLEO_F746ZG] Add RTOS and MBED_A8 tests (#1728)
* Add RTOS, MBED_A8 tests

* [NUCLEO_F746ZG] Add pins for MBED_A8 test
2016-05-13 15:46:03 +01:00
svastm 62aca7515d [STM32F7] Fix end of analogin conversion 2016-05-12 10:09:54 +02:00
0xc0170 3d988623d4 mbed lib revision - 120 2016-05-10 10:21:13 -05:00
Martin Kojtal 7b4f4fc40d Merge pull request #1715 from helmut64/L4heapsize
Changed the heap size to the correct MCU heap size for SRAM1
2016-05-09 12:35:10 -05:00
Martin Kojtal a97cf280f3 Merge pull request #1713 from BartSX/stm32f4_can
[STM32F4 family] Assign CAN filter number properly
2016-05-09 12:31:39 -05:00
Martin Kojtal 8ea1244a2e Merge pull request #1712 from BartSX/iar
[STM32L4] Fix IAR section placement failed error
2016-05-09 12:30:47 -05:00
Martin Kojtal ad75bdcde3 Merge pull request #1704 from adustm/stm32f1_cube_update
[STMF1] Stm32f1_hal_cube update
2016-05-09 12:26:22 -05:00
0xc0170 9aee702b11 RTX - pull cmsis_os into rt_Timer
This causing a warning in the rt_cmsis.c, as they use preprocessor
to redefine a type. A fix is to move the macro above, as it should not
change anything else. This should be removed, and use a cast, however I am
not fully familiar why they do this macro trick.
2016-05-06 12:27:25 -05:00
0xc0170 def841979a RTOS - fix Cortex-M version - add macros required for new kernel
2 new macros were introduced to capture changes in the kernel. We used toolchains/__init__
script to capture those, which is not in the sync with actual sources. This fix introduces
those macros in the source, rather than a script.

We will further eliminate those macros to be used outside of RTX kernel (c++ API).
2016-05-06 11:50:21 -05:00
neilt6 a484830587 [RTOS] Improved Error Functions
Added error message to sysThreadError(), and improved os_error().
2016-05-05 14:43:56 -06:00
Helmut Tschemernjak 324dd06216 Changed the heap size to the correct MCU heap size for SRAM1 2016-05-05 22:14:30 +02:00
Martin Kojtal 53b54323ba Merge pull request #1706 from LMESTM/fix_pwmout
Fix pwmout for STM32F3
2016-05-05 14:46:07 -05:00
0xc0170 cacf085e73 rtx - set task id prior rt_init_context
This is a bugfix, which caused LPC1549 to fail (os_error). There was a fix
introduced to rtx mbed sources. For more information:
461403989c
2016-05-05 13:49:47 -05:00
0xc0170 239c40eb62 RTX - os_error invokes mbed error() 2016-05-05 12:11:11 -05:00
0xc0170 bc270f1fe2 RTX - expose rt_tid2ptcb() function to get TCB
This enables the stack info methods to be supported for Cortex-M
targets. The rt_TypeDef required one small change - rename new structure
member as this is a reserved keyword in C++.

We need to ask for tid everytime we need to use tcb, do not expose internal
RTX details, we keep it within Thread.cpp file.
2016-05-05 12:11:09 -05:00
0xc0170 9d06547135 lwip - fix size of sys mutex for RTX 4.79
The size was increased to 4 bytes. Thanks @c1728p9 for spotting this.
2016-05-05 12:11:08 -05:00
Russ Butler ab3c1e3a16 RTX: Support stacks larger than 64k
Cherry pick commit d587474778 -
"RTX: Support stacks larger than 64k"

This allows the latest version of the RTOS to run mbed client over
ethernet without crashing.
2016-05-05 12:11:06 -05:00
Martin Kojtal 007223c954 RTX - fix missing header guards for Cortex-M4 (GCC ARM)
The HAL CM4 is valid only for FPU present. These guards were added
to mbed SDK, as there are targets Cortex-M4.
2016-05-05 12:11:04 -05:00
Martin Kojtal aa6f0b8df1 RTOS - update for RTX v4.79 for Cortex-M
Thread - stack methods are not available for now, as tcb pointer was removed from
internal structure. To obtain it, we could get it from the kernel, but this should be
reconsidered. Either RTOS should provide it, or these methods will become deprecated.
2016-05-05 12:11:02 -05:00
Martin Kojtal 9a68561b69 RTX - update to v4.79 for Cortex-M
Changes to the original kernel:

Cortex-M requires to define __CMSIS_OS_RTX, and __MBED_CMSIS_RTOS_CM. The macro __MBED_CMSIS_RTOS_CM
is mbed specific macro, to track changes to the kernel. This should keep us aware what has changed. For instance,
one breaking change was thread adding instances variable, which were not in mbed. This can be find as
it's protected via __MBED_CMSIS_RTOS_CM ifdef.

```
// added for mbed compatibility
// original RTX code
```

Startup for toolchains - mbed defines own stack pointer (set_main_stack()), therefore it should be called in the startup.
IAR added low level init calls and dynamic intialization to the IAR startup. All defined in RTX_CM_lib.h.

The timer thread has task id 0x01, main task 0x02. There are exception for main task not to check for
overflows. This is mbed specific, was reapplied from mbed code base.

IAR fixed SVC calls, this fix had to be reapplied (repo mbed PR 736 for more information).
2016-05-05 12:11:00 -05:00
Bartosz Szczepanski 1244d1504f [STM32F4 family] Assign CAN filter number properly
There are 28 filter banks which are shared between CAN1 and CAN2. By default
they are divided in half:

    * CAN1 -> 0  ... 13
    * CAN2 -> 14 ... 27

that's why we need to decied which filter number has to be chosen.

Change-Id: If5f0da035c1435c61d4748b12d6617e9005cfd83
2016-05-05 11:26:39 +02:00
Bartosz Szczepanski d76bdde5a0 [STM32L4] Fix IAR section placement failed error
For some reason STACKHEAP block was placed in SRAM2 section which lead to
*Error[Lp011]: section placement failed - unable to allocate space for sections/
block* error. This patch modifies the STM32L4 linker script and places STACKHEAP
into SRAM1 section which was previously unused.

Change-Id: Ibe6ca52a9fe7af232a3eade2f6b1f2ce28c9bd49
2016-05-05 10:37:40 +02:00
Mahadevan Mahesh df4c79cd74 Fix build warnings
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2016-05-04 15:01:24 -05:00
Laurent Meunier c5c95d11f3 Use runtime error detection
Rather than MBED_ASSERT, let's use error() function to detect out of range
parameters during runtime execution
2016-05-04 09:25:40 +02:00
Laurent Meunier 731148eb72 Back to 10ms period
As suggested in review comments, let's keep default 10ms period
2016-05-04 08:59:57 +02:00
Laurent Meunier c9350f8e5a Update ARDUINO test to allow period change 2016-05-03 18:05:43 +02:00
Laurent Meunier 7c657ad5c9 [STM32F3] Increase the supported period range (#1682)
Introducing the prescaler management allows a wider period range support,
from about 65ms before now up to about 32s. We're also introducing
asserts in case the period or prescaler is truncated as the HW registers
are 16 bits large.
2016-05-03 18:05:43 +02:00
Mahadevan Mahesh fef9bc3961 USB support for KL27
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2016-05-02 14:52:31 -05:00
adustm 2b5364d87d [STM32F1] Update Toolchain files 2016-05-02 17:39:27 +02:00
adustm 9e21fcc816 [STM32F1] update CMSIS files from last Cube_HAL release 2016-05-02 17:38:59 +02:00
adustm 318da5419b [STM32F1] Cube_hal driver update 2016-05-02 17:37:48 +02:00
Mahadevan Mahesh da0924f95c Networking update for FRDM K64 platform
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2016-04-29 15:54:01 -05:00