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20 Commits (d61e4f0e95cadd585603bfe67f199345c72944b0)

Author SHA1 Message Date
Martino Facchin be2201393c STM32H7: dual core: handle interrupts on CM4 2020-12-11 10:11:52 +01:00
jeromecoutant c1386cf52d STM32L5 : update generic STM files for L5 2020-01-23 17:54:55 +01:00
Anna Bridge bef36f5f3e
Merge pull request #12093 from ABOSTM/SUPPORT_NUCLEO_G071RB 
TARGET_STM: add support of board NUCLEO_G071RB
 2019-12-19 15:26:08 +00:00
Alexandre Bourdiol 7c52aa59ec TARGET_STM: add support of board NUCLEO_G071RB 2019-12-12 14:00:04 +01:00
jeromecoutant 9317bea756 STM32 GPIO INIT in critical section 
critical section added in gpio_irq init and free functions
to protect shared code structures

Note that other functions are protected in API level in InterruptIn
 2019-12-10 15:59:56 +01:00
jeromecoutant 5d80f9e98f STM32: remove compilation warning 2019-06-07 18:08:39 +02:00
Laurent Meunier 5aa609b4db STM: fix minor warnings 2019-03-29 16:21:40 +01:00
bcostm beab69704a NUCLEO_WB55RG: update STM common files 
- Include RTC ll file from hal as in other families
- STM32WB: update Flash API driver
 2019-03-29 16:21:38 +01:00
jeromecoutant 675a7f915d STM32 InterruptIn protection 2019-02-26 16:58:47 +01:00
mattbrown015 792cec773e STM32: Disabling of IRQs shared by multiple events 
Discern if an IRQ is being shared by multiple events and only disable the IRQ if no events are using it.
 2018-09-07 14:48:02 +01:00
mattbrown015 7ef70223fb Improve GPIO IRQ edge detection when waking from deepsleep 2018-07-13 16:02:31 +01:00
jeromecoutant 433ba46132 TARGET_STM astyle 2018-06-27 14:21:07 +02:00
Laurent MEUNIER 61648a53f5 Fix alignement 2017-07-07 17:27:46 +02:00
Laurent MEUNIER cea91306de STM32: Raise error in case of spurious interrupt 
In case we've run through the entire GPIOs loop, withouth finding a
matching interrupt, we're in the case of a spurious interrupt, let's
raise an error to track it down.
 2017-06-30 13:26:09 +02:00
Laurent MEUNIER ade981dc9e STM32: Store and restore rising falling config of gpio_irq 
Now that rising / falling edge detection is disabled in the
gpio_irq_disable function, we also need to restore it when gpio_irq_enable
gets called.
 2017-06-30 13:26:09 +02:00
Laurent MEUNIER 88770528bd STM32 Fuly disable GPIO irq settings 
When disabling GPIO irq, also the falling / rising edge settings need
to be reset (EXTI_RTSR and EXTI_FTSR registers).

If not reset, the same EXTI line can be later enabled again with a wrong
Rising / Falling configuration. This was especially seen and reported in
ci-test tests-api-interruptin on NUCLEO_F446RE target where DIO2=PA_10 and
DIO6=PB_10 were successively tested: as they are sharing the same EXTI_LINE
(EXTI_10), this resulted in calling the irq_handler with wrong
IRQ_FALL/IRQ_RAISE parameter and donothing being called in loop.
 2017-06-30 13:26:09 +02:00
Laurent MEUNIER 18abfdb604 STM32: gpio: style consistency 2017-02-16 19:34:08 +01:00
Laurent MEUNIER 3517eb108e STM32: Change Set_GPIO_Clock return type 
Directly return a GPIO_TypeDef pointer to avoid extra casts.
Also move it to GPIO file.
 2017-02-16 18:55:44 +01:00
Laurent MEUNIER 6bd488db4d STM32: gpio irq: Use LL registers access 
Instead of using HAL_GPIO_Init / Deinit which makes a lot of registers
being written and re-written, and which creates extra gpio / pin / irq
dependencies, we directly set the IRQ related registers thanks for the
STM32 LL layers which provides APIs to modify registers.
 2017-02-16 18:55:36 +01:00
Laurent MEUNIER 74774f9424 STM32 Make gpio_irq_api.c a common files 
This requires the creation of gpio_irq_device.h file, where
family specific EXTI IRQ mapping is defined
 2017-02-16 18:55:28 +01:00