Commit Graph

257 Commits (d2c73f2bcde10dd96e366e52ab3d9a21b3af25cb)

Author SHA1 Message Date
Martin Kojtal 85c477c1dc
Merge pull request #10609 from kjbracey-arm/us_ticker_optimise
wait_us optimization
2019-06-28 14:29:00 +01:00
Martin Kojtal a2c9152441
Merge pull request #10700 from LMESTM/hal_sleep_manager_test_update
Update HAL Sleep manager test to cope with STM32 LPTIM HW
2019-06-28 13:19:10 +01:00
Filip Jagodzinski 8d8383b23c Tests: SleepManager: Fix test_check for NRF5X
Add missing `lp_ticker_clear_interrupt()` in the interrput handler used
in `test_lock_unlock_test_check()` test.
Remove redefined `us_to_ticks()`.
2019-06-24 18:24:01 +02:00
Laurent Meunier 8476be6285 Update test_lock_unlock_test_check() assertion to cope with new timings
With the DEEP_SLEEP_TEST_CHECK_WAIT_DELTA_US increased,
we now have TEST_ASSERT_UINT64_WITHIN(delta=1000, expected=1000, actual=1000)
so this assertion needed to be updated.

What we need is the deep sleep to be enabled after the programed interrupt
has fired and before a 2ms timeout expiration, which means >= 1000 and < 2000.
2019-06-19 15:33:34 +02:00
Anna Bridge d8c17b5fab
Merge pull request #10536 from mprse/stm_lptim_issue
Changes required by the ST low power ticker wrapper.
2019-06-19 12:08:21 +01:00
Laurent Meunier d6c3d79a9d Increase DEEP_SLEEP_TEST_CHECK_WAIT_DELTA_US
now that sleep_manager_can_deep_sleep_test_check() is based on wait_ns
2019-06-19 11:00:33 +02:00
Przemyslaw Stekiel d577e7f186 Further modifications in Sleep Manager test.
Changes:
- restore the original form of setup/teardown handlers,
- test_lock_unlock_test_check(): do not use common ticker layer (Timer, Timeout). Use only ticker HAL layer.
- Increase DEEP_SLEEP_TEST_CHECK_WAIT_DELTA_US delta.
2019-06-18 18:06:02 +02:00
Kevin Bracey 57310729d4 wait_us optimization
As the timer code became more generic, coping with initialization on
demand, and variable width and speed us_ticker_api implementations,
wait_us has gradually gotten slower and slower.

Some platforms have reportedly seen overhead of wait_us() increase from
10µs to 30µs. These changes should fully reverse that drop, and even
make it better than ever.

Add fast paths for platforms that provide compile-time information about
us_ticker. Speed and code size is improved further if:

* Timer has >= 2^32 microsecond range, or better still is 32-bit 1MHz.
* Platform implements us_ticker_read() as a macro
* Timer is initialised at boot, rather than first use

The latter initialisation option is the default for STM, as this has
always been the case.
2019-06-14 10:22:08 +03:00
Laurent Meunier 83e274a82c Remove unused variable
and avoid associated warning ...
2019-06-13 16:47:02 +02:00
Martin Kojtal fbcae489a0
Merge pull request #10762 from mprse/reenable_tests
Disable only time drifting test cases and fix GREENTEA_SETUP() call in tests
2019-06-11 07:35:41 +01:00
Laurent Meunier 24203fc42b Fix compilation issue for targets without LPTICKER or USTICKER 2019-06-10 18:03:04 +02:00
Martin Kojtal dc77c40fe9
Merge pull request #10709 from LDong-Arm/nrf52_cordio
Default to Cordio BLE stack for NRF52* targets
2019-06-09 18:03:34 +01:00
Martin Kojtal a2c029404b
Merge pull request #10437 from OpenNuvoton/nuvoton_psa_exclude_test
PSA: Exclude mbed-hal-spm test for M23 target
2019-06-07 17:19:27 +01:00
Laurent Meunier d4db0f30c7 Update HAL Sleep manager test to cope with STM32 LPTIM HW
In particular and as kindly suggested by Przemec S. :
1. Add setup/teardown handler’s for all cases. This disables sys-tick,
so there should be no unexpected lp ticker interrupt scheduling.
2. Modify setup/teardown handler’s: remove suspension of lp/us tickers,
so they can count as this is required by test_lock_unlock_test_check test
case.
3. Use TEST_ASSERT_TRUE(sleep_manager_can_deep_sleep_test_check()) after
setting interrupt to cope with STM specific handling (CMPOK interrupt with
deep-sleep locked). This performs wait only if needed and will not affect
other targets which do not need extra wait.
4. Move sleep_manager_lock_deep_sleep() after TEST_ASSERT_TRUE(sleep_manager_can_deep_sleep_test_check())
5. Use TEST_ASSERT_TRUE(sleep_manager_can_deep_sleep_test_check()) in
test_lock_unlock_test_check to let lower layers manage deep sleep.
2019-06-07 16:37:44 +02:00
Przemyslaw Stekiel 86dab2f9fa Disable time drifting test cases.
Time drifting test cases use serial communication with the host and are unstable on CI.
Skip time-drifting test cases if SKIP_TIME_DRIFT_TESTS macro is defined.
The idea for the future is to use FPGA test shield for timing tests instead of host scripts.

Also remove `__ARM_FM` macro which in most cases was used to disable time drifting tests. In other cases replace `__ARM_FM` with `TARGET_ARM_FM` which is more suitable.
2019-06-06 21:48:04 +02:00
Przemyslaw Stekiel c325dbc695 Fix GREENTEA_SETUP() call in not time drifting tests.
In these tests GREENTEA_SETUP() is incorrectly called with "timing_drift_auto" instead of "default_auto".
2019-06-05 13:32:13 +02:00
Lingkai Dong 977eea4447 critical_section tests: do not check APP interrupts on NRF52
APP interrupts are masked on SoftDevice BLE stack only, but we
have switched to Cordio stack on NRF52 targets.
2019-06-05 09:53:53 +01:00
Maciej Bocianski 90fbab0419 hal_qspi_test: undo buggy code
Remove some buggy code introduced to hal_qspi_test by PR #10435
Added support for QSPI to Cypress Boards
a8570ffe6c
2019-06-04 14:14:21 +02:00
Przemyslaw Stekiel 874ff1fe22 tests-mbed_hal-sleep: add exception for STM LPTIM targets.
On some targets like STM family boards with LPTIM enabled an interrupt is triggered on counter rollover.
We need special handling for cases when next_match_timestamp < start_timestamp (interrupt is to be fired after rollover).
In such case after first wake-up we need to reset interrupt and go back to sleep waiting for the valid one.

On some targets like STM family boards with LPTIM enabled there is a required delay (~100 us) before we are able to reprogram LPTIM_COMPARE register back to back.
This is handled by the low level lp ticker wrapper which uses LPTIM_CMPOK interrupt. CMPOK fires when LPTIM_COMPARE register can be safely reprogrammed again.
This means that on these platforms we have additional interrupt (CMPOK) fired always ~100 us after programming lp ticker.
Since this interrupt wake-ups the board from the sleep we need to go to sleep after CMPOK is handled.

Background:
There is an errata in LPTIM specification that explains that CMP Flag
condition is not an exact match (COUNTER = MATCH) but rather a
comparison (COUNTER >= MATCH).

As a consequence the interrupt is firing early than expected when
programing a timestamp after the 0xFFFF wrap-around.

In order to
work-around this issue, we implement the below work-around.
In case timestamp is after the work-around, let's decide to program the
CMP value to 0xFFFF, which is the wrap-around value. There would anyway be
a wake-up at the time of wrap-around to let the OS update the system time.
When the wrap-around interrupt happen, OS will check the current time and
program again the timestamp to the proper value.
2019-05-31 14:16:34 +02:00
ccli8 b4e5a53f48 Exclude mbed-hal-spm test for TrustZone chips
This is because for TrustZone chips like M23/M33, SecureFault is implemented in
secure-side and cannot pass on to non-secure side.
2019-05-29 16:09:03 +08:00
Martin Kojtal ab82f1fca6
Merge pull request #10627 from devran01/remove_future_sequana_target
Remove targets FUTURE_SEQUANA_M0_PSA and FUTURE_SEQUANA_PSA
2019-05-24 12:16:10 +01:00
Devaraj Ranganna 7765d39283 The targets FUTURE_SEQUANA_M0_PSA and FUTURE_SEQUANA_PSA are removed
due to partial implementation. Having FUTURE_SEQUANA_M0 and
FUTURE_SEQUANA PSA targets is misleading.

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
2019-05-21 15:00:31 +01:00
Martin Kojtal f859289634
Merge pull request #10489 from kjbracey-arm/gpio_api_nc
gpio_api.h: Clarify desired behaviour for NC
2019-05-21 14:36:49 +01:00
Guillermo Alonso 70bc390410 added QSPI support to target RHOMBIO_L476DMW1K 2019-05-07 15:44:09 +02:00
Kevin Bracey 66f446b9a9 Add GPIO NC test
Check two items of defined behaviour - that you can initialise a
gpio_t with NC, and you can detect that state with gpio_is_connected().
2019-05-02 16:12:21 +03:00
Ryan Morse a8570ffe6c Added support for QSPI to Cypress Boards 2019-05-01 07:09:58 -07:00
Cruz Monrreal II e7c2e66543 Added missing astyle corrections for TESTS/mbed_hal/* 2019-03-20 12:57:36 -05:00
Oren Cohen fc97a75632 Remove #ifndef NO_GREENTEA from tests 2019-03-14 11:16:44 +02:00
Oren Cohen 577d286639 Skip test on Cortex M33 devices
On platforms using coretx m33 accessing the secure memory will cause SecureFault instead of Hardfault.
SecureFault is implemented in the secure image and cannot be changed in runtime.
2019-03-03 18:43:04 +00:00
Ron Eldor 22bf92bb7e Initialize platform in trng test
Add calls to `mbedtls_platform_setup()` and
`mbedtls_platform_terminate()` to the trng greentea test, to
initialize the hardware acceleration engines, in some platforms.
2019-02-18 11:43:32 +02:00
Russ Butler d5892ce312 Add a sanity check test for pinmaps
Add a test which sanity checks all pinmaps.
2019-02-08 09:10:50 -06:00
Martin Kojtal 27cce81580
Merge pull request #9258 from jeromecoutant/PR_FLASHSKIP
FLASH test: skip test if test region overlaps code
2019-01-21 13:15:51 +01:00
Przemyslaw Stekiel ef681bf18d Add SPDX-License-Identifier and Copyright in new files 2019-01-08 15:32:08 +01:00
Przemyslaw Stekiel 01ca8443a8 Add stack size unification test
Test checks stack sizes:
 - ISR stack: exactly 1KB (with exception for NORDIC - 2KB and RENESAS - Cortex A targets not supported for this test)
 - Main thread stack: exactly 4KB (with some exceptions - 3KB)
 - Thread stack: exactly 4KB
2019-01-08 15:32:01 +01:00
jeromecoutant 482396ce7d FLASH test: skip test if test region overlaps code 2019-01-04 16:50:54 +01:00
Martin Kojtal acd69ae7e1
Merge pull request #9229 from maciejbocianski/qspi_hal_test_k82f_fix
hal-qspi_test: move frequency setting before flash init
2019-01-04 08:56:54 +00:00
Maciej Bocianski fc593d2d6f hal-qspi_test: move frequency setting before flash init
Frequency setting just after erase operation was causing some data
inconsistencies during write/read operations on some targets (frdm-k82f).
To fix this, frequency setting was moved before flash memory init.
2019-01-03 12:17:23 +01:00
Martin Kojtal d7497a82dd
Merge pull request #9128 from orenc17/spm_hal_test_fix
Fix SPM HAL test
2019-01-02 09:18:02 +00:00
Alexander Zilberkant b409267883
Update TESTS/mbed_hal/spm/main.cpp
Use r3 instead of r4

Co-Authored-By: orenc17 <oren.cohen@arm.com>
2018-12-23 11:37:29 +02:00
Alastair D'Silva 2617c5d55b Don't use define checks on DEVICE_FOO macros (mbed code)
The DEVICE_FOO macros are always defined (either 0 or 1).

This patch replaces any instances of a define check on a DEVICE_FOO
macro with value test instead.

Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
2018-12-20 10:16:42 +11:00
Oren Cohen 9b573acfa4 Run the non-secure cases first 2018-12-17 16:43:09 +02:00
Oren Cohen 6a9de3178e Fix SPM HAL test
When accessing non-secure ram and flash r1 was actually used by the calling function.
Change to a callee saved register.
2018-12-17 16:38:13 +02:00
jeromecoutant 84ee55bfe0 QSPI tests: update STM32 boards configuration
NB: STM directory removed in flash_configs as there is no STM memory
2018-12-13 10:56:35 +01:00
jeromecoutant 0af1ecd305 STM32 DISCO : enable QSPI tests when available 2018-12-13 10:56:27 +01:00
Kevin Bracey 13a24bc0bd Test MPU is enabled by init 2018-12-10 16:45:30 +02:00
Oren Cohen 2df2fc7d29
Fix PSA-HAL, TRNG, TLS tests 2018-12-06 01:22:50 +02:00
Martin Kojtal 52822cb8af
Merge pull request #8871 from c1728p9/mpu
MPU API (Reopened)
2018-11-28 10:28:32 +01:00
Russ Butler 7cdfbee28b Fix asyle problems
Run astyle to fix CI failures.
2018-11-27 09:29:33 +00:00
Russ Butler caa7b93921 Rename lock functions and classes
Invert the name of the lock functions and classes so you are not
locking a negative.
2018-11-27 09:29:32 +00:00
Russ Butler a7bf312106 Skip MPU fault tests for ARMv8-M
For enhanced security ARMv8-M firmware doesn't allow the hardfault
handler to be hooked by non-secure code. Because of this there is no
way to recover from the MPU fault tests. This PR disables those tests
until hardfault recovery is supported by secure firmware.
2018-11-27 09:29:32 +00:00