Workaround a bug where the boot stack size configuration option is not
passed on to armlink, the Arm Compiler's linker. Prefer
MBED_CONF_TARGET_BOOT_STACK_SIZE if present, as this is what the
configuration system should provide. Fall back to MBED_BOOT_STACK_SIZE
if MBED_CONF_TARGET_BOOT_STACK_SIZE is not defined, as in the case of
buggy tools. If both MBED_CONF_TARGET_BOOT_STACK_SIZE and
MBED_BOOT_STACK_SIZE are not defined, then we fall back to a hard-coded
value provided by the linkerscript. See
https://github.com/ARMmbed/mbed-os/issues/13474 for more information.
To allow overriding of the boot stack size from the Mbed configuration
system, consistently use MBED_CONF_TARGET_BOOT_STACK_SIZE rather than
MBED_BOOT_STACK_SIZE.
Fixes#10319
In most cases, we can control degraded QSPI H/W to standard through BSP SPI driver directly as if it is just SPI H/W.
However, BSP SPI driver distinguishes among SPI H/W instances in below functions:
- SPI_Open
- SPI_Close
- SPI_SetBusClock
- SPI_GetBusClock
In these cases, we must change to QSPI version instead for QSPI H/W.
Change target:
- NUMAKER_PFM_M487
- NUMAKER_IOT_M487
- NU_PFM_M2351*
This caused a conflict. As CMSIS update introduced low level init, lets use the types
from CMSIS. We could potentionally use __cmsis_start but as I saw for some targets,
the init routine is slightly different. So rather keep what we have in targets, and just
use types already defined in CMSIS.
Consider the following factors to define WDT reset delay:
1. Cannot be too small. This is to avoid premature WDT reset in pieces of timeout cascading.
2. Cannot be too large. This is to pass Greentea reset_reason/watchdog_reset tests, which have e.g. 50~100 reset delay tolerance.
Original implementation doesn't enable watchdog reset in pieces of cascaded timeout, except the last one. This is to guarantee re-configuration can be in time, but in interrupt disabled scenario e.g. Hard Fault, watchdog reset can cease to be effective.
This change enables watchdog reset all the way of cascaded timeout. With trade-off, guaranteed watchdog reset function is more significant than re-configuration in time.
Relevant modifications:
1. Support degrading QSPI0/1 to SPI4/5 for normal SPI transfer
2. Fix with BSP crypto driver API change
3. Fix with BSP PDMA driver API change
4. Make necessary modifications to pass FPGA CI Test Shield tests
5. Don't distinguish pinmap among parts e.g. M480 LG. Application users must take care.
Most code doesn't check return code of CLK_WaitClockReady(...). Enlarge timeout to meet most cases.
lp_ticker initialization fails with this issue. Steps for reproducing:
1. System runs in tickless from lp_ticker mode.
2. Arm WDT reset.
3. In next reset cycle, lp_ticker initialization fails (active flag doesn't become active).
cyliangtw
Martin Kojtal
Jaeden Amero
Chun-Chieh Li
talorion