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pwmout - NUC472 - add read methods for period and pulsewidth

pull/13492/head
talorion 2020-08-25 23:44:41 +02:00 committed by Gregor Mayramhof
parent 20dce73257
commit a6f9c5b84f
1 changed files with 38 additions and 29 deletions
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67
targets/TARGET_NUVOTON/TARGET_NUC472/pwmout_api.c
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@ -13,7 +13,7 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "pwmout_api.h"
#if DEVICE_PWMOUT
@ -47,20 +47,20 @@ static const struct nu_modinit_s pwm_modinit_tab[] = {
{PWM_0_3, PWM0CH23_MODULE, CLK_CLKSEL2_PWM0CH23SEL_HIRC, 0, PWM0_RST, PWM0CH3_IRQn, &pwm0_var},
{PWM_0_4, PWM0CH45_MODULE, CLK_CLKSEL2_PWM0CH45SEL_HIRC, 0, PWM0_RST, PWM0CH4_IRQn, &pwm0_var},
{PWM_0_5, PWM0CH45_MODULE, CLK_CLKSEL2_PWM0CH45SEL_HIRC, 0, PWM0_RST, PWM0CH5_IRQn, &pwm0_var},
{PWM_1_0, PWM1CH01_MODULE, CLK_CLKSEL2_PWM1CH01SEL_HIRC, 0, PWM1_RST, PWM1CH0_IRQn, &pwm1_var},
{PWM_1_1, PWM1CH01_MODULE, CLK_CLKSEL2_PWM1CH01SEL_HIRC, 0, PWM1_RST, PWM1CH1_IRQn, &pwm1_var},
{PWM_1_2, PWM1CH23_MODULE, CLK_CLKSEL2_PWM1CH23SEL_HIRC, 0, PWM1_RST, PWM1CH2_IRQn, &pwm1_var},
{PWM_1_3, PWM1CH23_MODULE, CLK_CLKSEL2_PWM1CH23SEL_HIRC, 0, PWM1_RST, PWM1CH3_IRQn, &pwm1_var},
{PWM_1_4, PWM1CH45_MODULE, CLK_CLKSEL2_PWM1CH45SEL_HIRC, 0, PWM1_RST, PWM1CH4_IRQn, &pwm1_var},
{PWM_1_5, PWM1CH45_MODULE, CLK_CLKSEL2_PWM1CH45SEL_HIRC, 0, PWM1_RST, PWM1CH5_IRQn, &pwm1_var},
{NC, 0, 0, 0, 0, (IRQn_Type) 0, NULL}
};
static void pwmout_config(pwmout_t* obj);
static void pwmout_config(pwmout_t *obj);
void pwmout_init(pwmout_t* obj, PinName pin)
void pwmout_init(pwmout_t *obj, PinName pin)
{
obj->pwm = (PWMName) pinmap_peripheral(pin, PinMap_PWM);
MBED_ASSERT((int) obj->pwm != NC);
@ -83,7 +83,7 @@ void pwmout_init(pwmout_t* obj, PinName pin)
// Enable clock of paired channels
CLK_EnableModuleClock(modinit->clkidx);
// FIXME: PWM_1_2/3 design bug. PWM_1_2/3 also require PWM_1_0/1 clock enabled.
if (obj->pwm == PWM_1_2 || obj->pwm == PWM_1_3) {
CLK_EnableModuleClock(PWM1CH01_MODULE);
@ -91,7 +91,7 @@ void pwmout_init(pwmout_t* obj, PinName pin)
}
// NOTE: All channels (identified by PWMName) share a PWM module. This reset will also affect other channels of the same PWM module.
if (! ((struct nu_pwm_var *) modinit->var)->en_msk) {
if (!((struct nu_pwm_var *) modinit->var)->en_msk) {
// Reset this module if no channel enabled
SYS_ResetModule(modinit->rsetidx);
}
@ -102,30 +102,30 @@ void pwmout_init(pwmout_t* obj, PinName pin)
obj->period_us = 1000 * 10;
obj->pulsewidth_us = 0;
pwmout_config(obj);
// Enable output of the specified PWM channel
PWM_EnableOutput(pwm_base, 1 << chn);
PWM_Start(pwm_base, 1 << chn);
((struct nu_pwm_var *) modinit->var)->en_msk |= 1 << chn;
// Mark this module to be inited.
int i = modinit - pwm_modinit_tab;
pwm_modinit_mask |= 1 << i;
}
void pwmout_free(pwmout_t* obj)
void pwmout_free(pwmout_t *obj)
{
PWM_T *pwm_base = (PWM_T *) NU_MODBASE(obj->pwm);
uint32_t chn = NU_MODSUBINDEX(obj->pwm);
PWM_ForceStop(pwm_base, 1 << chn);
const struct nu_modinit_s *modinit = get_modinit(obj->pwm, pwm_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->pwm);
((struct nu_pwm_var *) modinit->var)->en_msk &= ~(1 << chn);
if ((((struct nu_pwm_var *) modinit->var)->en_msk & (0x3 << (chn / 2 * 2))) == 0) {
// FIXME: PWM_1_2/3 design bug. PWM_1_2/3 also require PWM_1_0/1 clock enabled.
switch (obj->pwm) {
@ -134,51 +134,51 @@ void pwmout_free(pwmout_t* obj)
if (pwm1_var.en_msk & 0xC) {
break;
}
case PWM_1_2:
case PWM_1_3:
if (! (pwm1_var.en_msk & 0x3)) {
if (!(pwm1_var.en_msk & 0x3)) {
CLK_DisableModuleClock(PWM1CH01_MODULE);
}
default:
// Disable clock of paired channels
CLK_DisableModuleClock(modinit->clkidx);
}
}
// Mark this module to be deinited.
int i = modinit - pwm_modinit_tab;
pwm_modinit_mask &= ~(1 << i);
// Free up pins
gpio_set(obj->pin);
obj->pin = NC;
}
void pwmout_write(pwmout_t* obj, float value)
void pwmout_write(pwmout_t *obj, float value)
{
obj->pulsewidth_us = NU_CLAMP((uint32_t) (value * obj->period_us), 0, obj->period_us);
obj->pulsewidth_us = NU_CLAMP((uint32_t)(value * obj->period_us), 0, obj->period_us);
pwmout_config(obj);
}
float pwmout_read(pwmout_t* obj)
float pwmout_read(pwmout_t *obj)
{
return NU_CLAMP((((float) obj->pulsewidth_us) / obj->period_us), 0.0f, 1.0f);
}
void pwmout_period(pwmout_t* obj, float seconds)
void pwmout_period(pwmout_t *obj, float seconds)
{
pwmout_period_us(obj, seconds * 1000000.0f);
}
void pwmout_period_ms(pwmout_t* obj, int ms)
void pwmout_period_ms(pwmout_t *obj, int ms)
{
pwmout_period_us(obj, ms * 1000);
}
// Set the PWM period, keeping the duty cycle the same.
void pwmout_period_us(pwmout_t* obj, int us)
void pwmout_period_us(pwmout_t *obj, int us)
{
uint32_t period_us_old = obj->period_us;
uint32_t pulsewidth_us_old = obj->pulsewidth_us;
@ -187,23 +187,32 @@ void pwmout_period_us(pwmout_t* obj, int us)
pwmout_config(obj);
}
void pwmout_pulsewidth(pwmout_t* obj, float seconds)
int pwmout_read_period_us(pwmout_t *obj)
{
return obj->period_us;
}
void pwmout_pulsewidth(pwmout_t *obj, float seconds)
{
pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
}
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms)
void pwmout_pulsewidth_ms(pwmout_t *obj, int ms)
{
pwmout_pulsewidth_us(obj, ms * 1000);
}
void pwmout_pulsewidth_us(pwmout_t* obj, int us)
void pwmout_pulsewidth_us(pwmout_t *obj, int us)
{
obj->pulsewidth_us = NU_CLAMP(us, 0, obj->period_us);
pwmout_config(obj);
}
static void pwmout_config(pwmout_t* obj)
int pwmout_read_pulsewidth_us(pwmout_t *obj {
return obj->pulsewidth_us;
}
static void pwmout_config(pwmout_t *obj)
{
PWM_T *pwm_base = (PWM_T *) NU_MODBASE(obj->pwm);
uint32_t chn = NU_MODSUBINDEX(obj->pwm);