The QSPI spec allows alt to be any size that is a multiple of the
number of data lines. For example, Micron's N25Q128A uses only a
single alt cycle for all read modes (1, 2, or 4 bits depending on
how many data lines are in use).
- code refactoring and preparation for enabling DPI/QPI tests
- reduced multiple test count to 4
- use common flash config header for all MX25RXX35F chips
- fix sector erase max time on N25Q128A
Main idea of introduced changes is to ease adding support for new flash chips
Major changes:
- move implementation of all memory chip specific functions to memory config file (no weak functions)
- add support for 1-2-2 write