131379aa0c
reserved topmost 32 bytes of RAM used by IAP functions
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NXP LPC176x/5x User Manual UM10360 Rev 4.1:
32.3.2.8 RAM used by IAP command handler
Flash programming commands use the top 32 bytes of on-chip RAM. The maximum stack
usage in the user allocated stack space is 128 bytes and it grows downwards.
2017-04-30 14:13:05 +02:00
83a510751b
Added mapping to BTN-labelled switches
2017-04-28 11:31:48 -05:00
29c7b34dfa
LPC176X flash_api.h implementation
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For LPC176X (LPC1768/LPC1769) the flash driver has been implemented according to the CMSIS-PACK Keil.LPC1700_DFP.2.3.0 driver with the following changes in FlashPrg.c:
1. EraseChip() function removed (not used by flash_api)
2. Clock reconfiguration removed and clock value taken from function parameter to avoid unexpected behavior.
Full patch of FlashPrg.c:
--- Keil.LPC1700_DFP.2.3.0\Flash\LPC_IAP\FlashPrg_orig.c 2016-12-08 13:10:10.000000000 +0200
+++ Keil.LPC1700_DFP.2.3.0\Flash\LPC_IAP\FlashPrg.c 2017-04-11 20:02:37.000000000 +0200
@@ -191,90 +191,15 @@
* fnc: Function Code (1 - Erase, 2 - Program, 3 - Verify)
* Return Value: 0 - OK, 1 - Failed
*/
int Init (unsigned long adr, unsigned long clk, unsigned long fnc) {
-#if defined LPC1XXX || defined LPC11U6X
- CCLK = 12000; // 12MHz Internal RC Oscillator
+ CCLK = clk / 1000; // CCLK value is in kHz, clk in Hz
- MAINCLKSEL = 0; // Select Internal RC Oscillator
- MAINCLKUEN = 1; // Update Main Clock Source
- MAINCLKUEN = 0; // Toggle Update Register
- MAINCLKUEN = 1;
-// while (!(MAINCLKUEN & 1)); // Wait until updated
- MAINCLKDIV = 1; // Set Main Clock divider to 1
-
- MEMMAP = 0x02; // User Flash Mode
-#endif
-
-#ifdef LPC17XX
- IAP.stat = 0; // Note: Some Bootloader versions don't set the status if this command is executed
- IAP.cmd = 54; // Read Part ID
- IAP_Call (&IAP.cmd, &IAP.stat); // Call IAP Command
- if (IAP.stat) return (1); // Command Failed
-
- switch ((IAP.res[0] >> 24) & 0xFF) {
- case 0x25:
- // Part ID LPC1759 = 0x25113737
- // Part ID LPC1758 = 0x25013F37
- // Part ID LPC1756 = 0x25011723
- // Part ID LPC1754 = 0x25011722
- // Part ID LPC1752 = 0x25001121
- // Part ID LPC1751 = 0x25001118 / 0x25001110
- case 0x26:
- // Part ID LPC1769 = 0x26113F37
- // Part ID LPC1768 = 0x26013F37
- // Part ID LPC1767 = 0x26012837
- // Part ID LPC1766 = 0x26013F33
- // Part ID LPC1765 = 0x26013733
- // Part ID LPC1764 = 0x26011922
- CCLK = 4000; // 4MHz Internal RC Oscillator
- break;
- case 0x27:
- // Part ID LPC1778 = 0x27193F47
- // Part ID LPC1777 = 0x27193747
- // Part ID LPC1776 = 0x27191F43
- // Part ID LPC1774 = 0x27011132
- // Part ID LPC1772 = 0x27011121
- case 0x20: // found out during test
- case 0x28:
- // Part ID LPC1788 = 0x281D3F47
- // Part ID LPC1787 = 0x281D3747
- // Part ID LPC1786 = 0x281D1F43
- // Part ID LPC1785 = 0x281D1743
- case 0x48: // Part ID LPC4088 = 0x481D3F47
- case 0x47: // Part ID LPC4078 = 0x47193F47
- // Part ID LPC4076 = 0x47191F43
- // Part ID LPC4074 = 0x47011132
- CCLK = 12000; // 12MHz Internal RC Oscillator
- break;
- default:
- CCLK = 4000; // 4MHz Internal RC Oscillator
- }
-
- CLKSRCSEL = 0x00; // sysclk = IRC
-
- PLL0CON = 0x00; // Disable PLL (use Oscillator)
- PLL0FEED = 0xAA; // Feed Sequence Part #1
- PLL0FEED = 0x55; // Feed Sequence Part #2
-
- switch ((IAP.res[0] >> 24) & 0xFF) {
- case 0x27: // LPC177x
- case 0x20: // LPC178x
- case 0x28: // LPC178x
- case 0x48: // LPC407x
- case 0x47: // LPC408x
- CCLKSEL = 0x01; // use Sysclk devided by 1 for CPU
- break;
- default:
- CCLKSEL = 0x00; // CPU clk divider is 1
- }
-
MEMMAP = 0x01; // User Flash Mode
-#endif
return (0);
}
/*
@@ -283,37 +208,12 @@
* Return Value: 0 - OK, 1 - Failed
*/
int UnInit (unsigned long fnc) {
return (0);
}
-
-
-/*
- * Erase complete Flash Memory
- * Return Value: 0 - OK, 1 - Failed
- */
-
-int EraseChip (void) {
-
- IAP.cmd = 50; // Prepare Sector for Erase
- IAP.par[0] = 0; // Start Sector
- IAP.par[1] = END_SECTOR; // End Sector
- IAP_Call (&IAP.cmd, &IAP.stat); // Call IAP Command
- if (IAP.stat) return (1); // Command Failed
-
- IAP.cmd = 52; // Erase Sector
- IAP.par[0] = 0; // Start Sector
- IAP.par[1] = END_SECTOR; // End Sector
- IAP.par[2] = CCLK; // CCLK in kHz
- IAP_Call (&IAP.cmd, &IAP.stat); // Call IAP Command
- if (IAP.stat) return (1); // Command Failed
-
- return (0); // Finished without Errors
-}
-
/*
* Erase Sector in Flash Memory
* Parameter: adr: Sector Address
* Return Value: 0 - OK, 1 - Failed
*/
2017-04-11 21:03:45 +02:00
ad074b5a22
Add SCL and SDA defs for I2C[0-2]; redefine I2C_[SCL,SDA] to I2C2
2017-03-31 16:32:45 -04:00
965404c09e
Construct a ticker-based wait, rather than calling wait_ms(), in the C027 board startup code since, for mbed 5, wait_ms() is an RTOS function and the RTOS is not initialised at this stage in start-up.
2017-03-22 15:15:06 +00:00
aff49d8d1e
Renamed files in platform to match source names
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critical.h -> mbed_critical.h
sleep.h -> mbed_sleep.h
toolchain.h -> mbed_toolchain.h
rtc_time.h -> mbed_rtc_time.h
semihost_api.h -> mbed_semihost_api.h
wait_api.h -> mbed_wait_api.h
2017-02-22 18:17:54 -06:00
15cbf6628e
Merge pull request #3621 from JojoS62/fix-lpcxpresso-clock
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Fix for #2884 , LPC824: export to LPCXpresso, target running with wron…
2017-02-09 09:30:05 -06:00
9b8ac9b4e5
Fix for #2884 , LPC824: export to LPCXpresso, target running with wrong clock speed
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SystemInit() was called condititionally, but necessary defines were not
set in mbed. Calling SystemInit() unconditional now.
Removed also conditiional calls to legacy CodeRed lib.
2017-01-20 17:04:27 +01:00
6a045a49a9
Platform: Add sleep/deepsleep user facing functions
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Add sleep/deepsleep functions to platform layer which are replacing HAL
functions with the same name, rename existing symbols in HAL layer
to hal_sleep/hal_deepsleep. This way sleep functions
are always available, even if target doesn't implement them, which makes
the code using sleep clearer. It also enables us to make decision on in
which builds (debug/release) the sleep will be enabled.
2017-01-19 09:39:29 +00:00
10b6dbf839
Merge pull request #3504 from CalSol/canfixes
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[LPC15xx] CAN implementation improvements
2017-01-09 10:18:43 -06:00
14d579ad50
Fix && -> & typo
2017-01-02 01:47:43 -08:00
9a8cd059f8
Ensure that PWM=1 is resolved correctly
2016-12-24 23:20:56 -08:00
fd24700c50
Add TX, EW, EP, BO interrupts; allow reset to clear a bus-off condition
2016-12-24 01:51:55 -08:00
aede0fc6f3
Fix default polarity on LPC43XX PWM driver
2016-11-10 13:00:34 -04:00
b3e5c97244
Fix wrong index at LPC43xx tx end ring assignment
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NUM_TX_FRAG should be used instead of NUM_RX_FRAG
2016-10-28 22:48:37 +08:00
26ced98734
restructure - Restructured cmsis directory
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targets/cmsis -> cmsis
targets/cmsis/TARGET_* -> targets/TARGET_*/device
targets/cmsis/TARGET_*/mbed_rtx.h -> targets/TARGET_*/mbed_rtx.h
2016-10-04 17:51:44 -05:00
0bad622a16
restructure - Moved targets out to top level
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hal/targets -> targets
hal/targets.json -> targets/targets.json
2016-09-30 19:18:09 -05:00
0x6d61726b
Kevin Gilbert
Willie Walker
Rob Meades
Christopher Haster
Sam Grove
JojoS
Bartek Szatkowski
Richard Lin
micromint
Peter Harliman Liem