With this patch in place, tests.py uses targets names instead of target
instances, which makes it possible to use application defined targets
with tests.
With this change, custom targets defined by the application being
tested in its mbed_app.json file can be used with tests. Note that
`build_project` already accepts both target names and instances, so the
call to `build_project` inside `build_tests` will still work.
The configuration object is now created early in the build_project
function. This way, if there's a mbed_app.json that contains a custom
target, that target is taken into account. This is useful (for example)
when compiling tests for an application that defines a custom target.
- removing redundancy as discussed in PR #2087:
- in target.json the core option can have only this values : "Cortex-M0", "Cortex-M0+", "Cortex-M1", "Cortex-M3", "Cortex-M4", "Cortex-M7", "Cortex-A9" - Cortex-M4F and Cortex-M7F removed
- in target.json an additional fpu option with values: "single" and "double" can be used
- build and export scripts are changed to handle this
- tested (compiling, running on hardware) with nucleo_f767 (cortex-m7 with double precision fpu), nucleo_f746 (cortex-m7 with single precision fpu), nucleo_f446 and nucleo_l467 (cortex-m4 with single precision fpu), teensy31 (cortex-m4 without fpu - only build test), nucleo_l073 (cortex-m0)
- singletest results are added to PR #2087 comments
- creating new core name Cortex_M7F_DP for a target with a double precision fpu
- adding new core name to arm.py to set compiler/linker flags to a double precision fpu when configured in target.json
- up to now: gcc wrote flag for a double precision fpu -> target with STM32F746 didn't run when using double variables - mcu has only single precision fpu
- changing gcc.py to use single precision for Cortex-M7 und double precision for Cortex_M7F_DP
tested with NUCLEO_F746, NUCLEO_F767 and build.py+make.py and exporting with project.py + compiling/flashing
- iar.py need a similar extention - I didn't change that yet because
- did not run at the moment - python exception
- currently worked on in PR #1948
The host-test resets the target by sending a UART break. After this, it takes some
time for the target to come back up. Without this timeout, the __sync packet
sent by greentea would not be retransmitted by the interface chip (i.e. it would never
reach the target). Testing on different devices indicates that 2 seconds delay
is sufficient for the device to reset and the __sync packet to reach the target.
Prevent mismatch between _owner and peripheral configuration. In the previous
implementation, the following code would leave the peripheral in an inconsistent
state:
```
SPI spi1(...); // _owner is NULL, peripheral config is 1
spi1.transfer(...); // _owner is 1, config is 1
SPI spi2(...); // _owner is 1, config is 2
spi1.transfer(...) // 1 thinks it still owns peripheral, doesn't reconfigure
```
This patch adds BLE Cordio support into MBED HAL. It contains:
* Cordio and TRIM object files
* The Cordio stack header file
* The Cordio library for Beetle Systems precompiled for GCC and ARMCC
The BLE implementation will be provided in a future patch in the mbed-os
repository.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
In Beetle systems eFlash and Cache Flash are always enabled by default.
This patch updates the Mbed SDK Init procedure to reflect the changes in
the eFlash and Cache Flash Drivers provided in a previous patch.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
This patch adds BLE Cordio support into CMSIS. It provides:
* A modification for the linker scripts for both ARMCC and GCC
compilers that adds the cordio specific sections.
* A method to access the Flash stored MAC Address.
The CORDIO_RO_2.1.o and TRIM_2.1.o objects that rappresent the Cordio
firmware will be added by a future patch.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
In Beetle systems eFlash and Cache Flash are always enabled by default.
This patch refines the interface of these drivers to match the
functionalities exposed by the platform.
This patch renames also writel/readl in these drivers to uppercase to follow
acros code convention.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Bogdan Marinescu
Martin Kojtal
Brian Daniels
Michel Jaouen
Bogdan Marinescu
Michel JAOUEN
Olaf Hagendorf
Erwan GOURIOU
Erwan Gouriou
Laurent Meunier
Aksel Skauge Mellbye
Steven Cooreman
Vincenzo Frascino