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412 Commits (b46aa6108d5a04895ab79634bedf9c5d65087ff2)

Author SHA1 Message Date
Brendan McDonnell b2480d6281 fix comment copy/paste error 2018-07-31 18:14:31 -04:00
Cruz Monrreal 41bd4c48b9
Merge pull request #7628 from SenRamakri/sen_RtxEvrOptimization 
Optimize the configuration for RTX evr events
 2018-07-31 11:40:03 -05:00
Cruz Monrreal b8a2a461cf
Merge pull request #7545 from SenRamakri/sen_StackMaxStackIssue 
Fix for Thread::max_stack not returning right value when OS_STACK_WATERMARK is enabled
 2018-07-31 11:37:15 -05:00
Senthil Ramakrishnan 6221e6fa23 Optimize the configuration for RTX evr events to disable the ones not in use 2018-07-27 13:05:16 -05:00
Senthil Ramakrishnan 577844d3d3 Fix spelling in error message in fault handler 2018-07-19 10:31:34 -05:00
Senthil Ramakrishnan 481285a324 Fix for max_stack not returning right value when OS_STACK_WATERMARK is enabled 2018-07-18 15:05:39 -05:00
ccli8 0b00d0ce11 Allow non-secure main thread to call secure functions 2018-07-12 18:01:32 +08:00
Jimmy Brisson 0222ca4976 Add _RTX_ define where it's needed and used 2018-07-11 13:49:57 +01:00
Cruz Monrreal 93233c4f5d
Merge pull request #7364 from 0xc0170/fix_storage_rtos 
Fix storage rtos types - remove including internal header file
 2018-07-05 14:29:46 -05:00
Martin Kojtal 97a3ca193e boot: fix libspace num macro 
RTX Config header file is internal and not exposed. With latest fixes to use
only public header files from RTX, we need to add these 2 new macros for
RTX ARMC lib configuration.
 2018-06-29 11:43:17 +01:00
Martin Kojtal 2be3c13534
Merge pull request #7355 from deepikabhavnani/rtx_header_fix 
Remove semicolon at the end of #6897 

Upstream fix https://github.com/ARM-software/CMSIS_5/pull/384
 2018-06-29 08:43:06 +02:00
Martin Kojtal e91ab9c1a1 Thread: fix rtx thread type 2018-06-28 14:40:08 +01:00
Martin Kojtal 5c0f1b5db3 rtos: use RTX identifier 
os_thread_t and family are internal and should not be used (thus we included
internal header file). Instead, use those that are exposed via rtx_os.h file.
 2018-06-28 14:12:16 +01:00
Deepika 357138468a Remove semicolon at the end of #define 2018-06-27 15:47:49 -05:00
Cruz Monrreal ea47342f81
Merge pull request #7214 from SenRamakri/sen_ErrorOptimAndConfig 
Error handling configuration updates and Optimization for exception handling
 2018-06-25 10:10:49 -05:00
Deepika bc65153a4d Add names to idle/timer thread 2018-06-21 18:32:43 -05:00
ccli8 8071409963 Move RTX_NO_MULTITHREAD_CLIB from RTX_Config.h to mbed_rtx_conf.h 
This is to avoid change to RTX code base.
 2018-06-21 09:57:21 +08:00
ccli8 f055c2a700 Add comment with RTX_NO_MULTITHREAD_CLIB movement 2018-06-21 09:54:47 +08:00
Senthil Ramakrishnan baa44eb3f2 Limit error filename capture to 64 chars, wrapping tests with right configs and astyle fixes. 2018-06-20 11:56:32 -05:00
Senthil Ramakrishnan dcdd616e6d Update exception handling code to remove dedicated fault safe printfs and use mbed_error_printf to optimize memory usage. 
Dedicated safe printfs were originally developed to print data over serial with minimal resources. But this adds more code space, so we are switching to use mbed_error_printf.
 2018-06-20 11:56:32 -05:00
ccli8 afc0a28cc5 Support thread-safety with ARMC6 
1. Define RTX_NO_MULTITHREAD_CLIB to provide Mbed-specific multi-thread support for ARM/ARMC6
2. All overridden _mutex_xxx functions are declared with __USED to avoid excluded by linker

NOTE: Microlib doesn't support multi-thread
 2018-06-20 10:35:47 +08:00
Jan Jongboom 63d1684bbe
Spelling error in fault handler 2018-06-18 10:58:12 +08:00
Michael Coulter 3d3e89097d Fixes for RZ_A1H issue 6543 
Removed debugging code, fixed errors indicated in the comments.
 2018-06-11 13:30:17 -05:00
Cruz Monrreal 1fa333df82
Merge pull request #7032 from TomoYamanaka/feature-rtx_update 
Update cmsis/rtx for Cortex-A
 2018-06-02 20:52:40 -05:00
Cruz Monrreal f92c227558
Merge pull request #7027 from c1728p9/timer_fix 
Fix possible bug with SysTimer
 2018-05-31 11:07:34 -05:00
Vladimir Umek 4251af0248 RTX5 (Cortex-A): exception handling restructured, post processing moved after context save. 2018-05-28 19:36:42 +09:00
Vladimir Umek 165c663871 RTX5: fixed nesting interrupt handling (Cortex-A) 2018-05-28 13:55:35 +09:00
Vladimir Umek b6c4139328 RTX5: ignoring CPUID field in GIC implementation 
updated interrupt handler for GCC and IAR
 2018-05-28 13:54:44 +09:00
Vladimir Umek 0226b11b67 RTX5: disabled OS Tick interrupt during post processing in IRQ handler for Cortex-A devices 2018-05-28 12:52:11 +09:00
Russ Butler aa6b931698 Fix possible bug with SysTimer 
Ensure the SysTimer isn't added to the timer list twice by adding
an extra call to remove() inside suspend().
 2018-05-27 13:15:00 -05:00
Bartek Szatkowski a92ff94904 Fix rebase error 2018-05-25 12:20:10 -05:00
Bartek Szatkowski 9575dd26ec Don't use tickless if LPTICKER is not present 
The current implementation of tickless requires LPTICKER to be present.
 2018-05-25 12:20:09 -05:00
Cruz Monrreal 527f9a12fd
Merge pull request #6983 from SenRamakri/sen_ErrorHandling_Push2 
Standardized Error Handling and Error Codes
 2018-05-24 10:57:00 -05:00
Martin Kojtal d8cb72a0a2
Merge pull request #6273 from bulislaw/update_cmsis_5.3 
Update cmsis/rtx to version 5.3
 2018-05-24 09:37:40 +02:00
Senthil Ramakrishnan 5ef6728c08 Splitting MBED_ERROR macros to support ones with/without error value argument 2018-05-23 12:21:28 -05:00
Senthil Ramakrishnan 693a6c40bb Refactor error reporting 2018-05-23 12:21:11 -05:00
Senthil Ramakrishnan d4fe75731d Adding mbed prefixes to all macros and functions to avoid namespace conflicts 2018-05-23 12:21:10 -05:00
Senthil Ramakrishnan 147d9cac4e Test application/cases optimization for some low memory targets, macro changes and test fixes 2018-05-23 12:21:10 -05:00
Senthil Ramakrishnan cbfc06577b Fixes to align with naming conventions 2018-05-23 12:21:09 -05:00
Senthil Ramakrishnan 92df68b1ea Changed variable names for registers to avoid namespace conflicts, build fixes, macros and other fixes 2018-05-23 12:21:09 -05:00
Senthil Ramakrishnan 530e9d323f Changed variable names for registers to avoid namespace conflicts and rtos disabled build fixes 2018-05-23 12:21:09 -05:00
Senthil Ramakrishnan 2e28dd95e1 Change set_error/set_error_fatal to warning/error, add itm support and other changes 2018-05-23 12:21:08 -05:00
Senthil Ramakrishnan 9041b475c6 Error handling/logging implementation and tests 2018-05-23 12:21:07 -05:00
Bartek Szatkowski b4d5f0e10f CMSIS: Move non-config includes behind PTIM ifdef 
That is to enabled integration with build-it-all Mbed OS type build
system.

Cherry-picked from CMSIS_5 repo: e8d0a476
 2018-05-14 12:18:21 +01:00
Bartek Szatkowski 1752803626 CMSIS/RTX: Fix using FALSE/TRUE with preprocesor 2018-05-14 12:18:21 +01:00
Bartek Szatkowski a1fb51c283 RTX5: uVisor: Remove static from svcRtxKernelUnlock/Lock to support uVisor 2018-05-14 12:18:21 +01:00
Jaeden Amero 2f7a841e0e RTX5: uVisor: Defer to uVisor for SVCall priority 
Only set the SVCall priority if uVisor is not present. If uVisor is
present, keep using whatever priorities it has already set up.
 2018-05-14 12:18:21 +01:00
Jaeden Amero 32d04a08d0 RTX5: uVisor: Add OsEventObserver 
Add the OsEventObserver mechanism. A client interested in receiving
notifications on certain OS events can register to receive notifications
with osRegisterForOsEvents. This is useful for clients like the secure
memory allocator, which observes thread switching events in order to
swap in and out different memory allocator objects.
 2018-05-14 12:18:21 +01:00
Jaeden Amero 86b91beeca RTX5: uVisor: Extend thread control block with context 
OsEventObserver objects expect a context to be maintained per thread on
their behalf. Add this context to the thread control block and extend
the thread creation functions with the ability to supply a context.
 2018-05-14 12:18:21 +01:00
Jaeden Amero c250369803 RTX5: uVisor: Use OsEventObserver 2018-05-14 12:18:21 +01:00