to mbed SDK as there are targets with Cortex-M4. This is similar to the implementation already
done for GCC ARM
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
Various toolchains supported in MBED don't followthe same initialization
steps. This can have impacts on platform behavior.
For STM32, it is needed to call the HAL_Init() _after_ the RAM has been
initialized (sdata from flash / zero initialized data) and _before_ the C++
objects are being created, especially if those objects require support
of tickers for instance.
In GCC and IAR, this was done in previous commit to avoid HAL_Init()
to be called twice.
In ARM this there is no hook defined in MBED yet to place the call.
The proposal is to take benefit of the library's
_platform_post_stackheap_init function that is going to be called before
__rt_lib_init where the C++ object init is done (__cpp_initialize__aeabi_)
In case of mbed with rtos, the __rt_entry is redefined so we need to add
the call to _platform_post_stackheap_init.
This series should solve issue reported here:
STM32 (At least F401) breaks if Tickers are activated in a global object #2115
[XDOT_L151] copy new target CMSIS files from NZ32_SC151 target
[XDOT_L151] remove Modtronix code, add HardFault_Handler, update clock configuration to match xDot hardware
[XDOT_L151] copy new target HAL files from NZ32_SC151 target
[XDOT_L151] update HAL to match xDot hardware
[XDOT_L151] add xdot_eeprom.* and xdot_low_power.* files
[XDOT_L151] add RTOS support for target
Conflicts:
rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c
[XDOT_L151] match NUCLEO_L152RE startup code for GCC_ARM so RTOS works
[XDOT_L151] fix GPIO write failure
[XDOT_L151] add XDOT_L151CC target to targets.json
[XDOT_L151] change xDot default stack size to 256 bytes and main stack size to 1.5kB
[XDOT_L151] update PinNames.h to match rev E hardware - no change to external pinout
[XDOT_L151] update style in custom xDot HAL files
Conflicts:
rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h
rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c
Before, rtx calls would hard fault in critical sections when an svc
instruction was attempted with interrupts disabled.
Required changes:
- Added check for CPSR I bit in cortex A rtx
- Added check for PRIMASK in cortex M rtx
- Modified critical sections in cortex M rtx to be recursive
(already recursive in cortex A)
Disintegrate global RTX target config. Move per-target fragment
to mbed_rtx.h under each vendor's directory.
One mbed_rtx.h is defined for each vendor at this moment, however,
the granularity of mbed_rtx.h can be per-chip, or per-board
if necessary.
Signed-off-by: Tony Wu <tung7970@gmail.com>
Add an RTX hook which gets called when a thread terminates. Add
the function Thread::attach_terminate_hook() to allow users to attach
a hook to this event at runtime.
Add the function osThreadGetInfo to allow various Thread information
to be queried. This includes stack size and maximum stack usage among
other things.
Note - for Cortex-A devices the worst case stack usage is not
available.
Add the functions osThreadsEnumStart, osThreadEnumNext and
osThreadEnumFree to allow enumeration of running threads. Protect
thread creation, thread exit and thread termination with a mutex
so threads are not created or destroyed while an enumeration is
ongoing.
In rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h, Image$$ARM_LIB_HEAP$$Base/Image$$ARM_LIB_HEAP$$Length will cause zero memory allocation.
Fix it with Image$$ARM_LIB_HEAP$$ZI$$Base/Image$$ARM_LIB_HEAP$$ZI$$Length. This is to place heap at external SRAM.
Silence the following compiler warning:
[Warning] RTX_CM_lib.h@807,5: implicit declaration of function 'atexit' [-Wimplicit-function-declaration]
Signed-off-by: Tony Wu <tonywu@realtek.com>
The config store tests use more than 2K of the interrupt stack, causing
an overflow. This patch bumps the K64F interrupt stack size to 4K
for ARMCC and GCC. The IAR interrupt stack is left untouched since
it is 32K.
Test the following components of the heap and stacks:
-Heap and interrupt stack are at the expected locations
-Entire heap can be used
-Heap limit is properly enforced and returns NULL when out of
of memory
Since the heap and stack are no longer shared, stack checking on the
main thread can be turned back on. This allows stack overflows on the
main thread to be caught quickly.
With the latest K64F linker file the initial stack is out of sync
with INITIAL_SP when uVisor is not present. This patch removes
the incorrect declaration.
Set well defined limits for the heap and configure GCC and ARMCC to
correctly check these. IAR already correctly checked its heap.
This also statically declares the main thread stack so the
linker is responsible for its placement.
Sam Grove
Mahadevan Mahesh
Jimmy Brisson
Laurent MEUNIER
Mike Fiore
Rob Meades
Christopher Haster
jeromecoutant
Tony Wu
Vincent Coubard
Martin Kojtal
Russ Butler
Russ Butler
andreas.larsson
ohagendorf
Michel Jaouen
ccli8
Alessandro Angelino
Radhika
Jeremy Brodt
Tony Wu