aff49d8d1e
Renamed files in platform to match source names
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critical.h -> mbed_critical.h
sleep.h -> mbed_sleep.h
toolchain.h -> mbed_toolchain.h
rtc_time.h -> mbed_rtc_time.h
semihost_api.h -> mbed_semihost_api.h
wait_api.h -> mbed_wait_api.h
2017-02-22 18:17:54 -06:00
a8a31da2e8
Merge pull request #3737 from bcostm/dev_can_factorization
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STM32: can_api.c files factorization
2017-02-22 13:36:59 -06:00
8568b40887
F103 devices: Set CAN_RD pins in Input mode instead of A/F Push-Pull
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Now MBED_A27/A28 tests are OK again.
Problem seen also by @mgiaco and discussed in PR 2988.
2017-02-20 11:19:53 +01:00
5fa0c4e172
Remove can_api.c file for F1 targets
2017-02-20 11:19:53 +01:00
311648ab6c
Add F1 differences.
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Create can_device.h files to define specific code for the STM32 family
2017-02-20 11:19:53 +01:00
32ecd00c3a
STM32: move pin_lines_desc to c file
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Move the const table initialization from the header file
to a new C file to avoid any multiple defined errors.
2017-02-16 19:34:11 +01:00
73955b678e
STM32: pins: move pin_lines_desc table to const
2017-02-16 19:34:05 +01:00
273ac81680
stm32: use default in switch case
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As commented during PR review, better use default case.
2017-02-16 19:34:01 +01:00
21bc5af3c2
STM32: common pinmap using LL layer to access registers
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this first makes pinmap.c a common file
then rework it with several goals:
- avoid gpio / irq / pin management extra dependencies
- improve performances when switching between pin modes
This change is based on LL layer to access to registers level
instead of using HAL higher level API.
The family specific functions are implemented in pin_device.h
of each family. Mostly this is F1 family that is differnt
from other ones.
2017-02-16 18:57:18 +01:00
6bd488db4d
STM32: gpio irq: Use LL registers access
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Instead of using HAL_GPIO_Init / Deinit which makes a lot of registers
being written and re-written, and which creates extra gpio / pin / irq
dependencies, we directly set the IRQ related registers thanks for the
STM32 LL layers which provides APIs to modify registers.
2017-02-16 18:55:36 +01:00
74774f9424
STM32 Make gpio_irq_api.c a common files
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This requires the creation of gpio_irq_device.h file, where
family specific EXTI IRQ mapping is defined
2017-02-16 18:55:28 +01:00
0e2cc3824b
STM32 : Make port_api.c a common file
2017-02-16 18:55:20 +01:00
ec329be6f2
Revert "Target stm usb config"
2017-02-09 15:37:19 -06:00
91c53131db
TARGET_STM: add NUCLEO_F103RB
2017-02-03 10:32:30 +01:00
bdcda386d5
Merge pull request #3618 from LMESTM/dev_stm32_PinNamesTypes
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STM32: Move types definitions to a common file
2017-01-26 10:35:59 +02:00
42f6622f8e
STM32: Move types definitions to a common file
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Only one point of attention:
STM_MODE_ANALOG_ADC_CONTROL is a specific mode that is only supported on L4.
So STM_MODE_ANALOG_ADC_CONTROL was moved to index 13 (last entry)
of gpio_mode table so that all the other modes are common and only the last
one is specific.
2017-01-24 10:58:36 +01:00
5d04b97b80
STM32: make PortNames.h a common file
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the same file can be used for all targets
2017-01-19 15:27:19 +01:00
3933ccf76e
Merge pull request #3584 from LMESTM/dev_stm32_common_peripheralpins
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STM32: make PeripheralPins.h a common file
2017-01-16 16:29:28 +00:00
1a4394a4a2
STM32: make PeripheralPins.h a common file
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Simple effort to avoid duplicate code.
2017-01-13 13:25:33 +01:00
57e0225248
STM32: gpio: factorize gpio_api.c and gpio_object.h
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Let's make the code more common for gpios.
The only difference between STM32 families is that BRR register may
not be available. In case BRR is not available, we use the 16 left bits
of BSRR instead. We could always use BSRR, but BRR saves one left-shift
operation, so let's use it when available.
By default we will consider using BRR, except for platforms that define
GPIO_IP_WITHOUT_BRR.
2017-01-12 19:24:32 +01:00
7a36614e74
STM32: remove useless include
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gpio_object.h is included from common_objects.h,
so no need to have it here.
2017-01-12 19:11:36 +01:00
885b018f77
Set bit without reseting the whole register
2017-01-03 11:46:27 +01:00
7e0b4fe3c9
Fix can_read() return value for STM32 boards
2017-01-03 11:46:25 +01:00
6598e32785
Merge pull request #3405 from samos2011/stm32f1_can_bug
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Repair the transmit mailbox (0,1,2) empty interrupt flag not clear BUG
2016-12-30 12:31:18 +01:00
6e7ee0e51e
Merge pull request #3489 from bcostm/fix_issue_3474
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NUCLEO_F103RB - Correct CAN and PWM alternate-functions
2016-12-23 13:15:37 +00:00
ab28a5e5cb
STM32: Refactor lp_ticker.c + rtc_api.c + sleep.c + rtc_api_hal.h files
2016-12-21 16:54:18 +00:00
30dddf115a
Correct wrong alternate-function number for CAN PB_8/PB_9 pins and PWM PC_7 pin
2016-12-21 10:27:50 +01:00
f2ce7ebb99
Merge pull request #3442 from LMESTM/dev_stm_i2c_f1
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Dev stm i2c f1
2016-12-19 17:51:58 +00:00
89190fd794
Merge pull request #3381 from jeromecoutant/PR_ST_F1_ASSERT
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STM32F1 : map ST HAL assert into MBED assert
2016-12-19 17:22:54 +00:00
57eb4a0d1d
STM32 F1: move F1 to I2C common code
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Now that F1 HAL has been updated to support required APIs,
the F1 family can also be moved to common code.
2016-12-14 08:36:30 +01:00
e7cab5c8dc
[STM32] HAL F1: I2C fix btf / rxne cases
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Applying the same fix as in L1 and F4.
This is an alignement to F4 HAL as the same IP is used.
2016-12-14 08:35:32 +01:00
f88803b7fe
STM32 F1 HAL V1.0.5
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This is a partial update of HAL drivers, especially for I2C driver update
2016-12-14 08:35:12 +01:00
d4c18b0058
Use __HAL_CAN_CLEAR_FLAG macro clear TSR .
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Redress stm32f1xx_hal_can.h header file comment
2016-12-14 08:42:55 +08:00
6085905658
Renames i2c_api.c for STM32F1 targets to fix IAR exporter.
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The IAR build system does not allow two files to have the same name.
This renames the i2c_api.c file for the STM32F1 family to
i2c_api_stm32f1.c to avoid this issue. The common i2c_api.c file shared
among all ST targets is not actually used for STM32F1 targets as it
protected with an #ifdef guard.
2016-12-09 12:47:17 -06:00
0e404c2b48
STM32F1 : correct ST HAL API call
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- GPIO: mode was not allowed by ST HAL API
- PIN map: assert has highlighted an issue for pullup/pulldown setting
- RTC: year after 2000 was not taken into account
2016-12-09 14:48:26 +01:00
b2f8de8294
Repair the Transmit mailbox (0,1,2) empty interrupt Flag not clear BUG
2016-12-09 10:44:28 +08:00
88988b688b
Add external declaration of PinMap_UART_RTS/CTS[] const tables
2016-12-08 16:43:26 +01:00
b606267641
STM32F1 : map ST HAL assert into MBED assert
2016-12-07 14:08:06 +01:00
1c2c121741
Merge pull request #3303 from adustm/stm_fix_interrupt_in
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Fix #2956 #2939 #2957 #2959 #2960 : Add HAL_DeInit function in gpio_irq destructor
2016-12-02 15:47:50 +01:00
a8ebfaa058
Merge pull request #3288 from LMESTM/dev_spi_asynch_l0l1
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Dev spi asynch l0l1
2016-11-29 18:17:06 +01:00
bb2d03f34b
Merge pull request #3213 from bcostm/factorize_ticker
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STM32: Refactor us_ticker.c + hal_tick.c files
2016-11-29 18:10:45 +01:00
0219b64af4
fix #2956 . Add HAL_DeInit function if gpio_irq destructor
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This allows ci-test-shield tests-api-interruptin to pass
2016-11-21 15:55:15 +01:00
7cdaba8474
[stm32] remove unused module member in spi_s struct
2016-11-18 09:59:53 +01:00
6f12eca4a6
NUCLEO_F103RB - Add RTS/CTS pins for Serial Flow Control
2016-11-17 10:15:21 +01:00
896293d5be
Replace TIM_MST_GET_PCLK_FREQ macro with TIM_MST_PCLK macro
2016-11-14 09:31:14 +01:00
ae858b4323
STM32F0/F1/L0 - Update TIM_MST_GET_PCLK_FREQ macro
2016-11-14 09:31:14 +01:00
a43e5b8a48
STM32F1 - Remove devices hal-tick files and update hal_tick.h
2016-11-14 09:31:14 +01:00
bb10409954
Replace all devices us_ticker files with a common 16b and 32b file
2016-11-14 09:31:14 +01:00
4a4d09f6d1
Merge pull request #3074 from jamike/TARGET_STM_INIT_GCC_ALIGNEMENT
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Target STM - init gcc alignement
2016-10-28 11:04:50 +02:00
4a69072161
INIT:GCC add call to HAL_Init
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system_init, stops all on going timer.
gcc _start , perform zero initialized.
=> HAL_Init must be done again also in GCC toolchain
2016-10-27 10:40:28 +02:00
Christopher Haster
Sam Grove
bcostm
Laurent MEUNIER
Michel Jaouen
Martin Kojtal
Adrien Chardon
jeromecoutant
Anna Bridge
Sam Lin
Brian Daniels
adustm