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190 Commits (aa09e7d409e00b8b51dc272b403c945d0193c31d)

Author SHA1 Message Date
ccli8 95d4110e31 [M487] Remove mbedtls_internal_ecp_mul in ECP alter. 
MbedTLS doesn't support point multiplication for MBEDTLS_ECP_INTERNAL_ALT acceleration configuration.
 2018-02-06 09:58:36 +08:00
ccli8 df76e297b4 [M487] Remove mbedtls prefix for internal functions in ECP alter. 2018-02-06 09:43:53 +08:00
ccli8 c9cc357734 [M487] Check divisor is not zero in MODOP_DIV operation in ECP alter. 2018-02-06 09:30:57 +08:00
Kimmo Vaisanen 41490f48d0 Add MTB_ADV_WISE_1570 target 2018-02-05 14:31:20 +02:00
Krzysztof Stachowiak 174530b5fe Resolve conflicts after master update 2018-02-01 14:30:56 +01:00
Cruz Monrreal c06a42b05d
Merge pull request #5630 from adustm/fix5079_sha1_md5_sha256_hwcrypto 
Fix #5079. Support of call to mbedtls_x_finish without calling mbedtls_x_update
 2018-01-31 12:08:44 -06:00
Krzysztof Stachowiak 876a3b1a74 Update Mbed TLS HW acceleration partner code to new hashing API 2018-01-30 14:49:53 +01:00
adustm 88c3b3ee28 Remove last code redundancy 2018-01-30 11:06:15 +01:00
adustm 53027fd590 Improve fix calling Accumulate function every time in finish function 2018-01-30 09:41:23 +01:00
adustm cba538854d Fix MD5 link issue 2018-01-30 09:41:23 +01:00
adustm 3250e2d6d4 Fix #5079. Add the support of call to mbedtls_xxx_finish even if mbedtls_xxx_udate 
was not called since mbedtls_xxx_start
 2018-01-30 09:41:23 +01:00
Wilfried Chauveau e6b19d838c add support for STM32L443RC & WISE-1510 2018-01-26 17:06:39 +00:00
ccli8 17280372a7 [M487] Refine code in ECP alter. 
1. Add comment for unnecessary parameter 'n' in mbedtls_internal_run_eccop
2. Fix warning message with goto which causes `bypass initialization`
3. Fix comment
 2018-01-22 11:21:19 +08:00
ccli8 a68750473c [M487] Support ECP H/W accelerator 2018-01-09 16:20:41 +08:00
ccli8 67386b9ebd [NUC472/M487] Fix DMA input/output buffers are overlapped in AES alter. 2018-01-05 09:18:26 +08:00
ccli8 4023078e14 [NUC472/M487] Remove unnecessary H/W context clone functions in SHA alter. 2018-01-05 09:18:26 +08:00
ccli8 acff29e6f2 [NUC472/M487] Fix context clone corner case in SHA alter. 
As destination/source contexts are the same, we return immediately.
 2018-01-05 09:18:25 +08:00
ccli8 d96bcda606 [NUC472/M487] Fix indefinite loop in SHA alter. 2018-01-05 09:18:25 +08:00
ccli8 8b7ff095a9 [NUC472/M487] Remove duplicate configuration of CRPT->SHA_CTL/CRPT->HMAC_CTL in SHA alter. 2018-01-05 09:18:25 +08:00
ccli8 3a8c1aa687 [NUC472/M487] Use interrupt signal rather than polling to check operation completion in DES alter. 
This is to be consistent with PRNG/AES.
 2018-01-05 09:18:24 +08:00
ccli8 0c1098483f [NUC472/M487] Refine flow control code between crypto start and crypto ISR 2018-01-05 09:18:24 +08:00
ccli8 add839c808 [NUC472/M487] Refine code in SHA alter. 2018-01-05 09:18:24 +08:00
ccli8 b443a23b07 [NUC472/M487] Add memory barrier for DMA transfer in AES/DES alter. 2018-01-05 09:18:23 +08:00
ccli8 c906790257 [NUC472/M487] Call BSP driver rather than direct register access in DES alter. 2018-01-05 09:18:23 +08:00
ccli8 dc3c84c011 [NUC472/M487] Fix parameter check for TMODE/OPMODE in DES alter. 2018-01-05 09:18:23 +08:00
ccli8 815a6a7c4d [NUC472/M487] Add parameter check for configuring DES registers in DES alter. 2018-01-05 09:18:23 +08:00
ccli8 1d62b9120b [NUC472/M487] Refine comment with BSP driver use in DES alter. 2018-01-05 09:18:22 +08:00
ccli8 479cf687ff [NUC472/M487] Fix multiple calls to SHA free in SHA alter. 2018-01-05 09:18:22 +08:00
ccli8 7d92550d11 [NUC472/M487] Remove superfluous code in AES alter. 2018-01-05 09:18:22 +08:00
ccli8 116b14aa84 [NUC472/M487] Refine code with SHA context selection in SHA alter. 2018-01-05 09:18:22 +08:00
ccli8 980cb6b9c8 [NUC472/M487] Guard against SHA internal state size is not word-aligned in SHA alter. 2018-01-05 09:18:21 +08:00
ccli8 8ba07815ed [NUC472/M487] Fix SHA H/W resource leakage in context cloning 2018-01-05 09:18:21 +08:00
ccli8 83fb50cca3 [NUC472/M487] Fix SHA H/W is not stopped in corner case 
Take SHA1 for example, without the fix, SHA H/W is not stopped in either case:
(1) ctx->total == 0 in mbedtls_sha1_hw_finish()
(2) mbedtls_sha1_hw_finish() is not called by upper layer
 2018-01-05 09:18:21 +08:00
ccli8 a0a8a955a9 [NUC472/M487] Strengthen crypto DMA buffer check 
1. Catch incompatible buffer range, where buffer base = 0xffffff00 and buffer size = 0x100.
2. Add buffer size alignment check.
 2018-01-05 09:18:21 +08:00
ccli8 ac000244f4 [NUC472/M487] Refine AES/DES alter. DMA buffer requirement comment 2018-01-05 09:18:20 +08:00
ccli8 aafbdc8d38 [NUC472/M487] Fix compile error with disabled crypto 
For example, even though MBEDTLS_SHA512_C is disabled (via #undef MBEDTLS_SHA512_C),
mbedtls_sha512_context is still necessary due to referenced in sha512.h.
 2018-01-05 09:18:20 +08:00
ccli8 b0228d020d [NUC472/M487] Fix compile error as mbedtls is not included 
Currently, trng_api.c is located in targets/ and AES/DES/SHA alter. are located in mbedtls/.
They have shared crypto code.
If they could locate at same location e.g. mbedtls/, the shared crypto code placement would be more reasonable.
 2018-01-05 09:18:20 +08:00
ccli8 ba16fd9617 [NUC472/M487] Refine AES alter. key endianness code 2018-01-05 09:18:20 +08:00
ccli8 6464649c41 [NUC472/M487] Coordinate crypto interrupt handler among AES/PRNG 2018-01-05 09:18:20 +08:00
ccli8 0c2d59d327 [NUC472/M487] Refine AES/DES alter. code 2018-01-05 09:18:19 +08:00
ccli8 289bbf0ec7 [NUC472/M487] Fix AES alter. CFB128 error 2018-01-05 09:18:19 +08:00
ccli8 7076675fec [NUC472/M487] Optimize AES alter. code 2018-01-05 09:18:19 +08:00
ccli8 6cc3aa3e54 [NUC472/M487] Guard from re-entry into crypto H/W 2018-01-05 09:18:19 +08:00
ccli8 d66074fecc [NUC472/M487] Coordinate crypto init among AES/DES/SHA/PRNG 
Add counter to track crypto init among crypto sub-modules. It includes:
1. Enable crypto clock
2. Enable crypto interrupt

As counter gets zero, crypto clock is disabled to save power.
 2018-01-05 09:18:18 +08:00
ccli8 b0eededdaf [NUC472/M487] Fix DES alter. DMA buffer could locate at unsupported region 2018-01-05 09:18:18 +08:00
ccli8 f85875c7b6 [NUC472/M487] Fix AES alter. DMA buffer could locate at unsupported region 2018-01-05 09:18:18 +08:00
ccli8 70e9a90957 [NUC472/M487] Refine AES alter. input/output data endianness 2018-01-05 09:18:18 +08:00
ccli8 a1e202518f [NUC472/M487] Fix AES alter. DMA buffer check 2018-01-05 09:18:18 +08:00
ccli8 20aa516e79 [NUC472/M487] Refine config check code 2018-01-05 09:18:17 +08:00
ccli8 126aa565c7 [NUC472/M487] Remove redundant S/W DES code 
This S/W DES code was to test DES H/W port before.
 2018-01-05 09:18:17 +08:00
ccli8 2e7f07e264 [NUC472/M487] Refine DES alter. code 2018-01-05 09:18:17 +08:00
ccli8 b2b67af189 [NUC472/M487] Add comment for DES alter. context 2018-01-05 09:18:17 +08:00
ccli8 ed57432c95 [NUC472/M487] Add comment for AES alter. context 2018-01-05 09:18:17 +08:00
ccli8 9e5837fd77 [NUC472/M487] Refine AES alter. code with IV endianness 2018-01-05 09:18:16 +08:00
ccli8 087186aba7 [NUC472/M487] Rework AES alter. CFB128 
1. Fix bug on non-block aligned data size
2. More concise
 2018-01-05 09:18:16 +08:00
ccli8 93f6ef996f [NUC472/M487] Refine AES alter. DMA buffer code 2018-01-05 09:18:16 +08:00
ccli8 f24ca8c857 [NUC472/M487] Refine AES alter. code 2018-01-05 09:18:16 +08:00
ccli8 82bd285e51 [NUC472/M487] Support multiple contexts in AES alter. with context save & restore 2018-01-05 09:18:15 +08:00
ccli8 0d25a9c421 [NUC472/M487] Fix AES DMA buffer cannot locate at ROM region 2018-01-05 09:18:15 +08:00
ccli8 2dcc1e9e27 [NUC472/M487] Remove AES alter. dead code 2018-01-05 09:18:15 +08:00
ccli8 5665247d4a [NUC472/M487] Fix AES alternative function not thread-safe 2018-01-05 09:18:14 +08:00
ccli8 315b684bd9 [NUC472] Refine coding style 2018-01-05 09:18:14 +08:00
ccli8 0c5b860409 [M487] Refine coding style 2018-01-05 09:18:14 +08:00
ccli8 19e9dbf799 [NUC472] Fix DES alternative function not thread-safe 2018-01-05 09:18:13 +08:00
ccli8 61d9e69be4 [NUC472] Remove unnecessary MBEDTLS_CONFIG_FILE check from AES/DES/SHA alternative 
1. aes.h/des.h/sha1.h/sha256.h/sha512.h includes config.h before aes_alt.h/des_alt.h/sha1_alt.h/sha256_alt.h/sha512_alt.h.
2. aes_alt.h/des_alt.h/sha1_alt.h/sha256_alt.h/sha512_alt.h should not be included in any other location.
3. Just include aes.h/des.h/sha1.h/sha256.h/sha512.h in aes_alt.c/des_alt.c/sha1_alt.c/sha256_alt.c/sha512_alt.c.
 2018-01-05 09:18:13 +08:00
ccli8 6b0213c13d [NUC472] Remove other unnecessary AES alternative macro definitions 
As MBEDTLS_AES_ALT is defined, alternative implementations for all AES functions should be defined.
 2018-01-05 09:18:13 +08:00
ccli8 925eee0688 [NUC472] Remove debug code in AES alternative 2018-01-05 09:18:13 +08:00
ccli8 530b8dfdb9 [M487] Fix DES alternative function not thread-safe 2018-01-05 09:18:13 +08:00
ccli8 436ecdbd60 [M487] Remove unnecessary MBEDTLS_CONFIG_FILE check from AES/DES/SHA alternative 
1. aes.h/des.h/sha1.h/sha256.h/sha512.h includes config.h before aes_alt.h/des_alt.h/sha1_alt.h/sha256_alt.h/sha512_alt.h.
2. aes_alt.h/des_alt.h/sha1_alt.h/sha256_alt.h/sha512_alt.h should not be included in any other location.
3. Just include aes.h/des.h/sha1.h/sha256.h/sha512.h in aes_alt.c/des_alt.c/sha1_alt.c/sha256_alt.c/sha512_alt.c.
 2018-01-05 09:18:12 +08:00
ccli8 8f7df9ab41 [M487] Remove other unnecessary AES alternative macro definitions 
As MBEDTLS_AES_ALT is defined, alternative implementations for all AES functions should be defined.
 2018-01-05 09:18:12 +08:00
ccli8 fbf7d40778 [M487] Remove debug code in AES alternative 2018-01-05 09:18:12 +08:00
Martin Kojtal 3bedff36e3
Merge pull request #4825 from SiliconLabs/feature/mbedtls-hw-accel 
Silicon Labs: Add cryptographic acceleration support
 2017-11-16 16:24:52 +00:00
Steven Cooreman 1dc3941a5f Apply feedback by @Patater 2017-11-11 19:38:54 +01:00
Steven Cooreman 2f02a23ac0 Cosmetic fix 2017-10-31 18:58:15 +01:00
stcoorem 2e2fb6ff26 Applied @yanesca and @andresag01 comments (#4825) 2017-10-19 12:00:09 +02:00
Jimmy Brisson 2f652be4c0 Merge pull request #4898 from u-blox/stm32f437xg_hw_security 
Enable crypto HW acceleration for STM32F437xG platforms
 2017-10-13 09:16:19 -05:00
Jimmy Brisson 181d7bc1bb Merge pull request #5080 from andresag01/fix-hw-acc-sha1-md5-sha256 
mbedtls: Disable MD5, SHA1, SHA256 HW ACC for STM32F439xI
 2017-09-21 09:03:33 -05:00
adustm e6fa5f07a2 Change after code review : standardize calls among ST families 
Check return values in alignment with MBEDTLS error codes
 2017-09-15 14:59:08 +02:00
adustm cd1a18fee3 Use new interface of mbedtls instead of deprecated functions 2017-09-14 13:49:43 +02:00
adustm c1fcae6c50 Fix multi context for AES CBC and ECB mode 
Fix mbed-os-example-tls-client use case
 2017-09-14 13:49:03 +02:00
adustm 458b0ec99f Enable AES_ALT mode again (remove workaround) 2017-09-14 13:48:52 +02:00
Andres Amaya Garcia f928e7a707 mbedtls: Disable MD5, SHA1, SHA256 HW ACC for STM32F439xI 
STM32F439xI-family MD5, SHA1 and SHA256 hardware acceleration
occasionally produces incorrect output (#5079).

Don't enable MD5, SHA1 and SHA256 HW acceleration on STM32F439xI-family
targets by default until issue #5079 is fixed.
 2017-09-12 13:39:04 +01:00
Jaeden Amero bea62d6b8c mbedtls: STM32F439xI: Don't enable AES acceleration by default 
STM32F439xI-family AES hardware acceleration occasionally produces
incorrect output (https://github.com/ARMmbed/mbed-os/issues/4928).

Don't enable AES HW acceleration on STM32F439xI-family targets by
default until issue #4928 is fixed.
 2017-08-18 10:12:14 +01:00
Jimmy Brisson 0f0a461209 Merge pull request #4832 from OpenNuvoton/nuvoton 
NUC472/M453: Fix several startup and hal bugs
 2017-08-14 11:38:18 -05:00
Jimmy Brisson 0150f58e12 Merge pull request #4608 from OpenNuvoton/nuvoton_m487 
Support Nuvoton's new target NUMAKER_PFM_M487
 2017-08-14 11:35:33 -05:00
Rob Meades 410a345b70 Enable crypto HW acceleration for STM32F437xG platforms (i.e. ublox C030 family). 2017-08-14 11:44:13 +01:00
Martin Kojtal 744c364683 STM mbedtls: clear algo value for md5/sha1 and sha256 
The hw block for mbedtls is shared, thus HASH algo value should be cleared
in the init.
 2017-08-09 07:45:20 +01:00
Martin Kojtal d92e4b5fcd STM32F4: remove md5 from the mbedtls config file 2017-08-09 07:45:20 +01:00
adustm 85c8bf87a1 Add a check 'non busy' status of the HW before save restore procedures 2017-08-09 07:45:20 +01:00
adustm f033c87640 Handle context swap + Modify macro name ST_MD5_BLOCK_SIZE 2017-08-09 07:45:20 +01:00
adustm de2899279e Move MBEDTLS_MD5_C from mbetdls_device.h to targets.json 2017-08-09 07:45:20 +01:00
adustm 766e451c88 Replace 64 by a define 2017-08-09 07:45:19 +01:00
adustm 53a8b75e4e Improve md5 buffer storing concept 2017-08-09 07:45:19 +01:00
adustm d39d52b042 Fix use case with size = 0 (md5_selftest #1) 2017-08-09 07:45:19 +01:00
adustm b2092f072f Handle 64bytes per 64 bytes 
+ remove unused includes files
 2017-08-09 07:45:19 +01:00
adustm 29114f1a56 Remove unused variables in mbedtls_md5_context + remove unnecessary ifdef 
__cplusplus
 2017-08-09 07:45:19 +01:00
adustm e126975d91 Remove unnecessary functions in md5_alt.h file 2017-08-09 07:45:19 +01:00
adustm c174191eb9 Move MBEDTLS_MD5_C define from mbedtls_device.h to targets.json 2017-08-09 07:45:19 +01:00
adustm bd1c4f5c62 NUCLEO_F756ZG/mbedtls : MD5 hw activation 2017-08-09 07:45:18 +01:00
ccli8 afb5aba8d9 [M487] Fix compile warnings with IAR toolchain 2017-08-03 13:33:17 +08:00