When reading a data block, the returned error codes from the I2C subsystem
are different from normal single byte operations. We have to verify that
the read-function for multiple bytes does return zero, because it
returns "readBytes != expectedLength".
Additionally, sync before trying to read from the eeprom as slow devices
may not yet be ready to return data, especially with low-priced ones
used with fast controllers.
This is a special case since targets do not provide by default GPIO pin-maps.
This extension is required for FPGA GPIO tests - if some pins have limitations (e.g. fixed pull-up) we need to skip these pins while testing.
To do that we were adding a dummy pin-map with commented out pins that can't be tested because of the limitations.
This solution is redundant and the proposition is to provide a list of restricted gpio pins if required (by default weak implementation is provided with an empty list).
This mechanism will be backward compatible, so the old method with dummy gpio pinmap will also work. The switch from dummy pin-maps to pinmap_gpio_restricted_pins() will be performed in separate commits/PRs.
Substantiation for this is that the STDIO UART peripheral is used by Mbed, so it should never be tested.
Also solve the potential problem with accidenty skipped peripherals in FPGA testing. Currently, we have a one `pinmap_restricted_peripherals()` function for all interfaces (UART, I2C, SPI, etc.).
The problem can be encountered if different interfaces have the same peripheral ids (e.g. `UART_0` = 0, `SPI_0` = 0). In this case, if `UART_0` is on the restricted list, then SPI tests will be also skipped for `SPI_0`.
The good news is that usually, the peripheral ids are the base addresses of the peripheral's register set, but we can't rely on this. It is also good that `pinmap_restricted_peripherals()` at this moment is only required for STDIO UART (Nuvoton and STM).
To solve this issue we will change name of `pinmap_restricted_peripherals()` to `pinmap_uart_restricted_peripherals()`, make STDIO UART restricted by default for all targets and update FPGA test utilily functions to use `pinmap_uart_restricted_peripherals()` to skip only uart peripherals.
In the future if needed we can consider to add support to restrict peripherals of other interfaces(SPI, I2C, etc).
The existing logic was insufficient to properly handle odd and even
parity setting, e.g. serial_getc() returned 9-bit data for 8O1
transmission format.
1. Do not disable and enable osillators during deep sleep
entry and exit
2. Increase the deep sleep to pass tests
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Martin Kojtal
Kimmo Vaisanen
Stephan Brunner
Przemyslaw Stekiel
midd
jeromecoutant
thegecko
Gabor Abonyi
Filip Jagodzinski
Shaik Abdul Sadiq
Qinghao Shi
Hugues Kamba
Evelyne Donnaes
Mahesh Mahadevan