The DEVICE_FOO macros are always defined (either 0 or 1).
This patch replaces any instances of a define check on a DEVICE_FOO
macro with value test instead.
Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
- Consider data section in GCC_ARM toolchain
- Consider init_array section in IAR toolchain
- Rename macro to FLASHIAP_APP_ROM_END_ADDR for clarity sake
This is achieved by checking whether the board can allocate a certain memory
chunk (threshold) and skipping the test if it can't.
This should prevent these boards from failing in CI.
- Remove require integrity flag (authentication) - always authenticate
- Use RBP KV to store CMAC also in write once case
- Allow removing a key if reading it failed on RBP authentication error
- Disable SecureStore if user disables MBED TLS AES CTR or CMAC
* Modify linker scripts to be compatible with bootloader and PSA
* Add memory protection
* Modify original post-build step to allow link with PSA binaries
* Config kvstore for ITS on FUTURE_SEQUANA_PSA
* Enable PSA-Crypto on PSoC6 with NVSeed
Adding new modules inside the namespace could be breaking change for existing code base
hence add `using namespace::class` for classes newly added to mbed namespace to maintian
backwards compatibility.
MBED_NO_GLOBAL_USING_DIRECTIVE is added to remove auto-addition of namespace
Macro guard `MBED_NO_GLOBAL_USING_DIRECTIVE` is added around namespace, to avoid
polluting users namespace.
Implement the following:
KVStore base class
TDBStore class
FileSystemStore class
SecureStore class
Global APIs
Configuration framework
Design documentation
1. In drivers/Timer.cpp make sure that hardware timer is initialized outside of critical section.
This is because on PSoC 6 hardware resources are shared between both cores
and we have to make sure that the other core is not already using a particular resource.
This mechanism is based on interprocessor communication taht cannot be handled iside of
critical section.
2. Added support for post-binary hook function for PSoC 6 targets, so the hex image for M0+ CPU core
can be merged with M4 core image for the final image.
3. Added possibility to use hook function from exportes, so the M0+ hex image could be included
in the generated project.
4. Included hex images in the build dependency list, so the update of image is catched by the
build process.