Commit Graph

28 Commits (93f8cfed058174b2de468353c173c0d7b9335ea4)

Author SHA1 Message Date
bcostm 8c0ff8be79 Fix typos causing ARM build error 2018-04-03 14:01:03 +02:00
bcostm d8aa587782 L1 ST CUBE V1.8.1 2018-04-03 14:01:02 +02:00
Senthil Ramakrishnan 96d900c99f Fixes for targets with invalid HardFault_Handler implementation and review/other fixes 2018-02-12 11:50:33 -06:00
Jimmy Brisson cc0b3d05aa Merge pull request #5130 from bcostm/freeze_timer_in_debug
STM32: Freeze master timer on stop/breakpoint
2017-10-02 10:38:57 -05:00
Jimmy Brisson c24fed135b Merge pull request #5032 from 0xc0170/fix_mts_debug
mts targets: fix debug() usage
2017-09-27 09:07:53 -05:00
bcostm 9f86a32baf Add freeze timer on debug for all STM32 devices
This is a continuation of the work done on the STM32F401xE devices only.
2017-09-18 13:31:46 +02:00
Jimmy Brisson d3b33d75a4 Correct NRF SDK11 assembly 2017-09-11 13:20:33 -05:00
Jimmy Brisson 15a9a0382b Enable Compiling with ARMC6 across all targets
remove duplicate sys.cpp
2017-09-11 13:20:32 -05:00
Martin Kojtal 52f84810a7 mts targets: fix debug() usage
Instead of using #if NDEBUG, we can directly invoke debug() function. Fixes #5013
2017-09-06 15:56:01 +01:00
Jan Jongboom 72262ca0b3 MTS targets: Don't use any printf() calls when NDEBUG is defined, prevents linking out printf() and friends in release build 2017-09-04 12:05:41 +01:00
jeromecoutant 912c0de938 STM32L1 : json clock source configuration
- default value is the same as before patch
- system_stm32l1xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
2017-07-19 16:39:17 +02:00
Chris 8484467fdd GCC Bootloader support 2017-06-30 22:28:06 +01:00
Chris 82a33b2a70 IAR Bootloader support 2017-06-30 22:28:06 +01:00
Chris a4c7a29144 uArm Bootloader support 2017-06-30 22:28:06 +01:00
Chris 802000b059 GCC_ARM VTOR fixed, doesnt fit in the bootloader region though.. 2017-06-30 22:28:06 +01:00
Chris 0ff055115a VTOR bootloader aware
Attempt to add flash API but not working properly
2017-06-30 22:28:06 +01:00
Chris c1e32a75df initial commit of xDot bootloader 2017-06-30 22:25:53 +01:00
Russ Butler 47b78a2d17 Fix STM32 crashes on boot due to unset VTOR
Remove HAL_Init and related code from SystemInit and move it to
mbed_sdk_init. The function SystemInit is called early in the boot
sequence before RAM is initialized or the VTOR is setup, so it should
not be used to perform the HAL initialization.

This fixes crashes due the vector table being used before it has been
relocated.
2017-06-13 12:12:20 -05:00
Sam Grove 72de85c62f Merge pull request #4417 from monkiineko/master
STM32: Fix 32-bit us ticker interrupt scheduling
2017-06-06 19:59:52 -05:00
Bradley Scott 260378e774 STM32: Fix 32-bit us ticker interrupt scheduling
For STM32 targets using a 32-bit timer for the microsecond ticker, the
driver did not properly handle timestamps that are in the past.  It
would just blindly set the compare register to the requested timestamp,
resulting in the interrupt being serviced up to 4295 seconds late
(i.e. after the 32-bit timer counts all the way around to hit the
timestamp again).

This problem can easily be reproduced by creating a Timeout object
then calling the timeout's attach_us() member function to attach a
callback with a timeout of 0 us.  The callback will not get called for
over 2147 seconds, and possibly up to 4295 seconds late if no other
microsecond ticker events are getting scheduled in the meantime.

Now, after the compare register has been set, the timestamp is checked
against the current time to see if the timestamp is in the past, and
if so, the compare event is manually set.

NOTE: By checking if the timestamp is in the past after configuring the
capture register, we ensure proper handling in the case where the timer
updates past the timestamp while setting the capture register.
2017-06-01 12:52:03 -04:00
Bartek Szatkowski f194ea7be9 Remove redefinitions of register macros from target code 2017-05-30 18:55:53 +01:00
Bartek Szatkowski b97ffe8fdc CMSIS5: Replace target defined NVIC_Set/GetVector with CMSIS implementation 2017-05-30 18:55:51 +01:00
jeromecoutant 3ab5dce41d STM32L1 : correct ST HAL API call
- RCC init: unused clock was enabled without any init parameters
- RCC init: one PLL parameter was missing
- ADC: a parameter setting was missing to init clock
- GPIO: mode was not allowed by ST HAL API
- ll_utils: compilation issue
2016-12-09 11:32:08 +01:00
jeromecoutant 12d2795871 STM32L1 : refactor stm32l1xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-08 17:03:25 +01:00
bcostm 896293d5be Replace TIM_MST_GET_PCLK_FREQ macro with TIM_MST_PCLK macro 2016-11-14 09:31:14 +01:00
bcostm 0524811c75 STM32xx - Remove hal_tick.c files and update hal_tick.h with new macro 2016-11-14 09:31:14 +01:00
Michel Jaouen 479a1a2715 STM32L1xx : GCC_ARM remove zero bss, in startup.
zero bss is done in libc init after call to _start.
2016-10-27 10:38:52 +02:00
Christopher Haster 26ced98734 restructure - Restructured cmsis directory
targets/cmsis -> cmsis
targets/cmsis/TARGET_* -> targets/TARGET_*/device
targets/cmsis/TARGET_*/mbed_rtx.h -> targets/TARGET_*/mbed_rtx.h
2016-10-04 17:51:44 -05:00