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95 Commits (8b05a2a02b4de182d3d60e34a2d6a30ed58a549c)

Author SHA1 Message Date
Sam Grove 38a9c84bae Merge pull request #2988 from martinjaeger/master 
Update of can_api.c fixing #2987
 2016-11-01 10:02:37 -05:00
Martin Jäger eb95c14fa6 Fixing some typos 2016-10-30 16:49:49 +01:00
Martin Kojtal 4a4d09f6d1 Merge pull request #3074 from jamike/TARGET_STM_INIT_GCC_ALIGNEMENT 
Target STM - init gcc alignement
 2016-10-28 11:04:50 +02:00
Michel Jaouen 4a69072161 INIT:GCC add call to HAL_Init 
system_init, stops all on going timer.
gcc _start , perform zero initialized.
=> HAL_Init must be done again also in GCC toolchain
 2016-10-27 10:40:28 +02:00
Michel Jaouen b225a5ca97 STM32F1xx : GCC_ARM remove zero bss done at startup. 
Zero bss is done after the call to _start.
 2016-10-27 10:40:17 +02:00
Michel Jaouen 702f64a6f2 STM32F0xx: GCC_ARM remove zero bss, in startup. 
zero bss is done in libc init after call to _start.
 2016-10-27 10:40:02 +02:00
Michel Jaouen 9f20c4641d STM32F0xx : GCC_ARM use a call to _start which performs 
zero bss, C++ init and the call to main.
Remove direct call to __libc_init_array and main not needed
as _start is beeing called.
 2016-10-27 10:39:02 +02:00
Michel Jaouen af090e3e6e STM32L0xx : GCC_ARM remove zero bss, in startup. 
zero bss is done in libc init after call to _start.
 2016-10-27 10:38:56 +02:00
Michel Jaouen 479a1a2715 STM32L1xx : GCC_ARM remove zero bss, in startup. 
zero bss is done in libc init after call to _start.
 2016-10-27 10:38:52 +02:00
Michel Jaouen f3b1c0a0c8 STM32L1xx : GCC_ARM a call to _start which performs 
zero bss, C++ init and the call to main.
    Remove direct call to __libc_init_array and main not needed
    as _start is beeing called.
 2016-10-27 10:38:35 +02:00
Martin Kojtal da377aa5d8 Merge pull request #3121 from monkiineko/master 
STM32F3: Correct UART4 and UART5 defines when using DEVICE_SERIAL_ASYNCH
 2016-10-27 10:12:13 +02:00
Michel Jaouen a711ff360b STM32F7xx : GCC_ARM remove zero bss, in startup. 
zero bss is done in libc init after call to _start.
 2016-10-26 14:42:47 +02:00
Michel Jaouen 93a0b9ce60 STM32L4xx : GCC_ARM remove zero bss, in startup. 
zero bss is done in libc init after call to _start.
 2016-10-26 14:42:24 +02:00
Michel Jaouen ee22d0a054 STM32F4xx: GCC_ARM remove zero bss, in startup. 
zero bss is done in libc init after call to _start.
 2016-10-26 14:41:45 +02:00
Martin Kojtal 7499177a5b Merge pull request #3076 from bcostm/fix_issue-2910_nucleo-f103rb 
STM32F1: Correct timer master value reading
 2016-10-26 13:55:29 +02:00
Bradley Scott 97eaed7b0a STM32F3: Eliminate two unused variable warnings 2016-10-25 10:59:19 -04:00
Bradley Scott 4f9bdf5ee0 STM32F3: Correct UART4 and UART5 defines when using DEVICE_SERIAL_ASYNCH 2016-10-25 10:58:38 -04:00
Martin Kojtal 4d1d1c5b69 Merge pull request #3068 from MultiTechSystems/mdot-pin-updates 
MultiTech mDot - clean up PeripheralPins.c and add new pin names
 2016-10-25 10:47:59 +02:00
Martin Kojtal 5b67832959 Merge pull request #3054 from andreaslarssonublox/ublox_fix_odin_mbedtls_config 
Moved mbedtls config for u-blox ODIN-W2 to macros in target.json
 2016-10-20 10:59:05 +01:00
bcostm 8a570cce93 STM32F1: correct the read of timer master value 2016-10-19 16:46:51 +02:00
Michel Jaouen 26f3352f83 STM32F3xxx : GCC_ARM remove zero bss, in startup. 
zero bss is done in libc init after call _start.
 2016-10-19 14:54:43 +02:00
Michel Jaouen 759837aff4 STM32F207: GCC_ARM remove zero bss, in startup. 
zero bss is done in libc init after call to _start.
 2016-10-19 14:54:41 +02:00
Sam Grove fc39f6b736 Merge pull request #3064 from c1728p9/f429_heap 
NUCLEO_F429 - Increase IAR heap size
 2016-10-19 05:51:20 -05:00
Sam Grove f1d678f8a4 Merge pull request #3056 from LMESTM/fix_stm32_pull_overwrite 
Fix stm32 pull overwrite
 2016-10-19 05:50:30 -05:00
Sam Grove 2ae71777aa Merge pull request #3013 from bcostm/check_adcintch_pins 
STM32xx - Change how the ADC internal pins are checked before pinmap_…
 2016-10-19 05:43:15 -05:00
Sam Grove 5eee95b7f5 Merge pull request #3008 from bcostm/fix_pwm_nucleo-f072rb 
NUCLEO_F072RB: Fix wrong timer channel number on pwm PB_5 pin
 2016-10-19 05:42:57 -05:00
Russ Butler d854547b0c NUCLEO_F429 - Increase IAR heap size 
Increase the IAR heap size from 48KiB to 64KiB. This give enough heap
space to run the TLS encryption examples.
 2016-10-18 16:43:28 -05:00
Mike Fiore c6fde7cfce [MTS_MDOT_F411RE] remove duplicate PWMs, fix swapped pins 2016-10-18 09:34:46 -05:00
Laurent MEUNIER 24d82d10ba [STM32F1] Fix pull overwrite 
This fix addresses issue #2638 for STM32F1.
The STM32F1 family has a diffeerent register set for pull-up and pull-down
settings.

The same principle to read HW state is applied, as in commit:
[STM32] Fix pull over write to all families
except registers are different.

Also in this patch we make code a bit more linear.
Depending on pin_index, different register and shift index must be used.
Instead of checking this in several place, let's make a check at the
beginning of the function and use local register and shift variables.
 2016-10-18 12:16:58 +02:00
Laurent MEUNIER af51027f61 [STM32] Fix pull over write to all families 
This applies the same fix as was done for F4 to solve issue #2638.
The fix applies ell to all other families excpet STM32F1.

Basically, to avoid over-writing the pull-up/-down settings, we read the
current state from HW.
 2016-10-18 12:16:58 +02:00
andreas.larsson cb113d738e Moved mbedtls config for u-blox ODIN-W2 to macros in target.json 2016-10-18 01:07:48 +02:00
andreas.larsson b8355c2073 Fixed the emac_interface_t struct so that the struct constructor is not used. 
We can not rely on the struct constructor to be run since wifi_emac_get_interface can be run from the OdinWiFiInterface constructor before that.
 2016-10-18 00:36:30 +02:00
Mike Fiore b6f7b8c463 [MTS_MDOT_F411RE] clean up peripheral pins & add new pin names 2016-10-17 15:36:28 -05:00
Russ Butler 7bcc63b202 Merge pull request #2977 from andreaslarssonublox/ublox_drivers 
Ublox drivers
 2016-10-14 14:56:06 -05:00
andreas.larsson 394796f47e Added guard for DEVICE_EMAC in wifi_emac_api.cpp 2016-10-14 02:42:53 +02:00
andreas.larsson 62bc6869e8 Added u-blox ODIN-W2 drivers for all toolchains 2016-10-13 23:37:42 +02:00
Sam Grove 08ff689afa Merge pull request #2979 from adustm/STM_F429_F439 
New platforms: NUCLEO_F439ZI, NUCLEO_F756ZG, NUCLEO_L486RG
 2016-10-13 16:22:36 -05:00
Brian Daniels 5d344e9548 Remove shared spi_s struct from XDOT_L151CC 2016-10-13 12:43:27 -05:00
adustm ff4fca6747 ADD NEW TARGET : NUCLEO_F756ZG, based on existing NUCLEO_F746ZG 2016-10-13 18:29:09 +02:00
adustm 78fd559d11 ADD NEW TARGET : NUCLEO_L486RG, based on existing NUCLEO_L476RG 2016-10-13 18:29:09 +02:00
adustm a07a271fe5 ADD NEW TARGET : NUCLEO_F439ZI, based on existing NUCLEO_F429ZI 2016-10-13 18:29:09 +02:00
Sam Grove 0ef0c617a9 Merge pull request #2999 from jeromecoutant/PR_F303ZE_I2C 
NUCLEO_F303ZE: Enable all I2C instances
 2016-10-13 11:14:46 -05:00
bcostm a484f51904 STM32xx - Change how the ADC internal pins are checked before pinmap_pinout 2016-10-13 16:28:57 +02:00
Laurent MEUNIER aeac255509 [STM32F303ZE] Update objects definition 
STM32F303ZE was introduced in parallel to the changes which consist in
having family wide definitions like device.h file and a common objects
definition.

This target is updated accordingly now to benefit of SPI definitions.
 2016-10-13 14:21:02 +02:00
Laurent MEUNIER 446dbe6a0e Clean-up style issues 
Fix indentation issues, remove useless comments, correct if/else format
 2016-10-13 14:21:02 +02:00
Laurent MEUNIER 1fb5b3f2d0 [STM32F4] SPI Peripheral pin - allow SPI3 to be used 
Let's swap default PA_4 pin mapping to SPI_3 otherwise SPI3 cannot be used
 2016-10-13 14:21:02 +02:00
Laurent MEUNIER 661b6adb93 [STM32] spi_master_write - rely on HAL 
ASYNCH SPI transfer support has been added based on STM HAL services.
To have both ASYNCH and SYNCH work together, we're also moving the
write API to STM HAL instead of direct registers access.
 2016-10-13 14:18:21 +02:00
Laurent MEUNIER 0aeea4950c [STM32] Deploy SPI_ASYNCH to all family 
the SPI_ASYNCH feature has been already activated for STM32F4.
This patchset makes it supported on all STM32 families by:
- moving spi_s structure at family level instead of board level
- using the F4 spi_api.c reference implementation and making it a common
stm_spi_api.c file which makes maintenance a lot easier.
- the only part that needs to be implemented for each family is the computation
of the clock frequency input to the spi peripheral which is not the same
accross families. So this is what remains in the spi_api.c of each family.

Because of the introduction of the common file, all the above modifications
needs to be done at once.
 2016-10-13 14:18:21 +02:00
bcostm f2ceed9e52 Fix wrong timer channel number of pwm PB_5 pin 2016-10-13 10:25:20 +02:00
Sam Grove 217a8fba8e Merge pull request #2972 from betzw/betzw_i2c_wb 
Make (synchronous) I2C work again
 2016-10-12 17:16:10 -05:00