Commit Graph

13662 Commits (8340f5041a3887193d536f3632b2a80b3e7008c6)

Author SHA1 Message Date
Wilfried Chauveau 8340f5041a add support for STM32L443RC & WISE-1510 2018-02-09 14:18:42 +00:00
jeromecoutant 0e78e7ef4e STM32 : set all PinMap structures as weak
This allow custom overwrites
2018-02-09 14:18:42 +00:00
Ashok Rao 3d0c222c42 Add license info 2018-02-09 14:18:41 +00:00
Ashok Rao fb267818e3 Adding MTB ublox NINA-B1 as a new target 2018-02-09 14:18:41 +00:00
sarahmarshy d158c21676 Change exception in ArmPackManager FLM reader 2018-02-09 14:18:41 +00:00
sarahmarshy 58b5970434 Treat start variable as addrss in `generate_bootloader_build`
Correct spacing.
2018-02-09 14:18:41 +00:00
sarahmarshy 32b8cff1b3 Introduce sector ceiling/floor rounding
Use ceiling for bootloader end address
Use floor for application size
2018-02-09 14:18:41 +00:00
sarahmarshy 9cdc6c75e3 Use Config class sector variable 2018-02-09 14:18:41 +00:00
sarahmarshy dcaeae80c1 Error check existence of sectors 2018-02-09 14:18:41 +00:00
Sarah Marsh 6df1256213 Add pyelftools dependency 2018-02-09 14:18:41 +00:00
Sarah Marsh 82c67effd6 Align managed bootloader addresses on sector boundaries
Aligns application start address to sector boundary
Aligns application end address to sector boundary
2018-02-09 14:18:41 +00:00
Sarah Marsh ce078b75dc Fix typo in _generate_bootloader_build 2018-02-09 14:18:41 +00:00
Sarah Marsh 1a512c9307 Add functions for getting sectors in Config class 2018-02-09 14:18:41 +00:00
Sarah Marsh 52dc6770c2 Move FLM parsing to arm_pack_manager and regenerate index
Modify arm_pack_manager to look for new keys in pdsc files, because some
vendors have changed their format
2018-02-09 14:18:41 +00:00
jeromecoutant ee333a5cd0 SMT32L4 : add missing ST HAL LPUART functions
To enable/disable UART Clock in Stop Mode
2018-02-09 14:18:41 +00:00
Clemens Mandl a457d71bd3 Updated List comparision with shorter implementaion using python build-in function zip() 2018-02-09 14:18:41 +00:00
Clemens Mandl 035fe91ebd Fixed a bug with multiple Sub-Directories with same name 2018-02-09 14:18:40 +00:00
Christopher Haster 3a8da4c24c Added pretty bar printing for compile output
Looks like this:

    Building project mbed-os-prettyoutput (ARCH_PRO, GCC_ARM)
    Scan: .
    Scan: env
    Scan: mbed
    Scan: FEATURE_LWIP
    Text 70.5KB Data 2.72KB BSS 7.43KB                 ROM 73.2KB RAM 10.1KB
    ROM [|||||||                                             ]  73.2KB/512KB
    RAM [||||||||||||||||                                    ]   10.1KB/32KB
    Image: BUILD/ARCH_PRO/GCC_ARM/mbed-os-prettyoutput.bin

If you build a target without a cmsis-pack it looks like this:

    Building project mbed-os-prettyoutput (ARM_BEETLE_SOC, GCC_ARM)
    Scan: .
    Scan: env
    Scan: mbed
    Scan: FEATURE_BLE
    Text 99KB Data 2.84KB BSS 13KB ROM 102KB RAM 15.8KB
    Image: BUILD/ARM_BEETLE_SOC/GCC_ARM/mbed-os-prettyoutput.bin

And the old behaviour of displaying the memap table can be brought back
by passing the --stats-depth parameter
2018-02-09 14:18:40 +00:00
Phyo Kyaw 454545aba2 Updated exporter for e2 studio: added new launch file 2018-02-09 14:18:40 +00:00
Kevin Bracey 6e2584e39e Correct return value of nsapi_dns_query_multiple
Documentation states that nsapi_dns_query_multiple returns the number of
addresses found on success - it was returning 0.

Overloads using SocketAddress are relying on the return value, meaning
those calls didn't work at all.

Fixes #5921.
2018-02-09 14:18:40 +00:00
jeromecoutant 73ed270d2d STM32 NUCLEO F413ZH and L433RC : STDIO configuration
#5795 patches are missing for these 2 targets
STDIO_UART_TX and STDIO_UART_RX can be now user defined
2018-02-09 14:18:40 +00:00
TomoYamanaka 5b25f79f8d RZ_A1LU: cmsis nvic include fix
To get cmsis nvic definitions, I added the process that include "cmsis_nvic.h" in cmsis.h.
Relation PR is #5890.
2018-02-09 14:18:40 +00:00
TomoYamanaka 32ed0f7593 Modify the arrangement of "{" that shows the function start
Regarding "{" that show the function start, I modified the the arrangement from right of function to new line.
2018-02-09 14:18:40 +00:00
TomoYamanaka 856737cb74 Add license header on top in reserved_pins.h
I modified the lack of license header in the below header files.
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/TARGET_MBED_MBRZA1H/reserved_pins.h
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/TARGET_MBED_MBRZA1LU/reserved_pins.h
2018-02-09 14:18:40 +00:00
TomoYamanaka 884d02dc31 Support TRNG function for GR-LYCHEE
I supported the TRNG function when target is GR-LYCHEE.
GR-LYCHEE generates TRNG by acquiring the random number of Wifi module(ESP32) incorporated in it using I2C.
2018-02-09 14:18:40 +00:00
TomoYamanaka 133f4043c2 Add the definition for GR-LYCHEE in mbed_rtx.h
In mbed_rtx.h file, I added the definition for GR-LYCHEE to use the "Dynamic Heap" processing when the target is GR_LYCHEE.
2018-02-09 14:18:40 +00:00
TomoYamanaka e1b7f641de Add startup processing having CMSIS5/RTX5 been available on GR-LYCHEE
For supporting to CMSIS5/RTX5, I added the start-up processing of 3 toolchains (ARMCC, GCC_ARM, IAR) and the register definition of RZ/A1LU specific.
In addition, I added the linker script files to implement the dynamic HEAP the same as GR-PEACH(RZ/A1H).
2018-02-09 14:18:40 +00:00
TomoYamanaka e54f6c7459 Enable exporter for GR_LYCHEE is a Renesas new target board
I added GR_LYCHEE as a new target board in DS-5, e2studio and IAR export.
2018-02-09 14:18:40 +00:00
TomoYamanaka 50d4c258d4 Add GR_LYCHEE as a new target board in terget.json, build_travis.py and tests.py
I added GR-LYCHEE's configuration in targets.json file. Also, I added GR_LYCHEE as a Renesas new target board in build_travis.py and tests.py.
2018-02-09 14:18:40 +00:00
Cruz Monrreal caeaa49d68
Merge pull request #5954 from ARMmbed/release-candidate
Release candidate for mbed-os-5.7.4
2018-01-29 18:22:46 -06:00
TomoYamanaka 0c344ffd58 Add "RZ_A1XX" label for commonizing in targets.json
I added the "RZ_A1XX" label for commonizing the setting in targets.json, and inherited in both RZ_A1H and VK_RZ_A1H.
2018-01-27 01:53:15 -06:00
TomoYamanaka da01e544c9 Modify the lack of copyright to header files
I modified the lack of copyright in the below header files that I added for commonizing the RZ_A1 related files.
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/mbed_drv_cfg.h
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_VK_RZ_A1H/mbed_drv_cfg.h
2018-01-27 01:53:15 -06:00
TomoYamanaka d1c21109ff Add the function declarations of WEAK attribute to use LWIP on GR-LYCHEE
I added the function declarations of Ethernet functions that have a WEAK attribute. Although several Ethernet functions was called in rza1_emac.c, GR-LYCHEE don't have Ethernert feature. But there may be case that GR-LYCHEE uses LWIP feature.
In this case, since GR-LYCHEE will occur the build error, I addressed the error by defining the functions with a WEAK attribute. For reason of WEAK attribute, there is no influence in GR-PEACH and VK_RZ_A1H that have Ethernet feature.
2018-01-27 01:53:14 -06:00
TomoYamanaka 70f017cdaa Modify the TYPO of debug info when using LWIP in RZ/A1 related
I modified the debug message when using LWIP in RZ/A1 related mbed boards.
In eth_arch_enetif_init(), sys_thread_new() was called and task name is appeared as debug information, but task name for debug was a mistake.
2018-01-27 01:53:14 -06:00
TomoYamanaka 78bd1e3e4b Performance improvement of LWIP communication in RZ_A1 related
For LWIP communication speedup in RZ_A1 related, I changed the below macro value and added the definition processing in RZ/A1 related header file(lwipopts_conf.h). For this reason, those macros are overrode by RZ/A1 related values, not default values.
2018-01-27 01:53:14 -06:00
TomoYamanaka 5a08da0807 Change the values of RZ_A1 related "extra_labels" in targets.json
As a result of revision of folder structure, I changed the values of "extra_labels" of RZ_A1-related in targets.json.
2018-01-27 01:53:14 -06:00
TomoYamanaka 73a5c55010 Commonalize the files in "targets/TARGET_RENESAS/TARGET_RZ_A1XX" directory
I made be available in common whatever the board related to RZ_A1 in the below files.
- Since there are the table code of Pinmap differs for each board, I moved the code to "PeripheralPins" file for each board, and changed to include PeripheralPins.h.
  analogin_api.c, can_api.c, gpio_irq_api.c, i2c_api.c, pinmap.c, port_api.c, pwmout_api.c, serial_api.c, spi_api.c and us_ticker.c

- Since there are some board-specific processes, I enclosed the processes with "#ifdef" and rearranged the functions to make be easier to enclose.
  can_api.c, ethernet_api.c and serial_api.c

- Since there are the driver configuration values differs for each board, I added "mbed_drv_cfg.h" file for each board and defined macros for the values, and changed to refer to the macros.
  can_api.c, gpio_api.c, pwmout_api.c and rtc_api.c
2018-01-27 01:52:39 -06:00
TomoYamanaka 7d270160d0 Revise the folder structure in "targets/TARGET_RENESAS" directory
In "targets/TARGET_RENESAS" folders, same as Cortex-M targets, I changed the folder structure to combine files that can be shared as RZ/A1 related.
 And I renamed the folder name to "TARGET_RZ_A1XX" in order to make commonality explicit.
- "targets/TARGET_RENESAS" folder
  <before>
  \targets\TARGET_RENESAS\TARGET_RZ_A1H
  \targets\TARGET_RENESAS\TARGET_VK_RZ_A1H
  <after>
  \targets\TARGET_RENESAS\TARGET_RZ_A1XX
2018-01-27 01:51:06 -06:00
TomoYamanaka b81ad2c166 Commonize RZ_A1 related folders placed in "FEATURE_LWIP" directory
In the below "features/FEATURE_LWIP" folders, same as Cortex-M targets, I changed the folder structure to combine files that can be shared as RZ/A1 related. And I renamed the folder name to "TARGET_RZ_A1XX" in order to make commonality explicit.
- "features/FEATURE_LWIP" folder
  <before>
  \features\FEATURE_LWIP\lwip-interface\lwip-eth\arch\TARGET_RZ_A1H
  \features\FEATURE_LWIP\lwip-interface\lwip-eth\arch\TARGET_VK_RZ_A1H
  <after>
  \features\FEATURE_LWIP\lwip-interface\lwip-eth\arch\TARGET_RZ_A1XX
2018-01-27 01:51:04 -06:00
chrisyang 9ee1b249b4 rtl8195am - remove irrelevant files 2018-01-27 01:48:32 -06:00
chrisyang e38489980c rtl8195am - add missing changes 2018-01-27 01:48:18 -06:00
chrisyang 05bcc9a953 rtl8195am - restructure target files
restructure target files to better sync with Ameba sdk base
2018-01-27 01:48:01 -06:00
bcostm d048ec2fa8 Use legacy CAN api 2018-01-27 01:37:26 -06:00
bcostm 5bb6edc952 Update stm32l4xxxx.h files 2018-01-27 01:37:26 -06:00
bcostm 4c7f0e6e5b Update stm32l4xx.h files 2018-01-27 01:37:25 -06:00
bcostm 9971ad27ca Update system_stm32l4xx.c with latest version 2018-01-27 01:37:25 -06:00
bcostm fb71917adb Remove release notes file 2018-01-27 01:36:57 -06:00
bcostm 6b5302c8f5 Add more comments 2018-01-27 01:36:38 -06:00
bcostm 5fa45e827a L4 ST CUBE V1.11.0
Update to STM32CubeL4 V1.11.0

Conflicts solved:
	targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/stm32l433xx.h
	targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/stm32l4xx.h
	targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/stm32l496xx.h
	targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/stm32l4xx.h
	targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_conf.h
	targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_def.h
	targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_i2c.c
	targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_spi.h
2018-01-27 01:35:20 -06:00
Christopher Haster d6db9b5263 littlefs: Fixed file truncation without writes
In the open call, the LFS_O_TRUNC flag was correctly zeroing the file, but
it wasn't actually writing the change out to disk. This went unnoticed because
in the cases where the truncate was followed by a file write, the
updated contents would be written out correctly.

Marking the file as dirty if the file isn't already truncated fixes the
problem with the least impact. Also added better test cases around
truncating files.
2018-01-27 00:59:16 -06:00