Commit Graph

309 Commits (80d58e55722107d2d004704de7b6050f0eb2e91e)

Author SHA1 Message Date
bcostm bf8587ed50 STM32L496: fix RAM size in ARM scatter file 2018-07-19 14:02:05 +02:00
bcostm 7097e07b62 stm32 ticker: typo corrections 2018-07-11 14:43:36 +02:00
bcostm d8e839a789 stm32 ticker: change license 2018-07-11 14:43:16 +02:00
bcostm 32031cbab3 stm32 ticker: rename hal_tick.h in us_ticker_data.h 2018-07-11 14:42:44 +02:00
bcostm fbd7a97e19 stm32 ticker: rename macro and update ST HAL Tick functions
- rename TIM_MST_16BIT in TIM_MST_BIT_WIDTH in order to use it directly in ticker info structure
- change HAL_InitTick() and HAL_GetTick()
2018-07-11 14:39:42 +02:00
bcostm b6beb74d9d DISCO_L496AG: update LEDs comments in PeripheralPins.c 2018-07-02 10:27:23 +02:00
bcostm a9ba4f9bf5 DISCO_L496AG: change LED1 and LED2 pins 2018-07-02 10:20:49 +02:00
jeromecoutant 3721ac44d2 STM32 serial RX/TX active patch
In serial_tx_active and serial_rx_active functions,
we check the internal state value with

HAL_UART_STATE_BUSY_TX = 0x21U,
HAL_UART_STATE_BUSY_RX = 0x22U,

It seems that value can also be :
HAL_UART_STATE_BUSY_TX_RX = 0x23U,
2018-06-28 18:05:52 +02:00
jeromecoutant 78410e7032 TARGET_STM32L4 astyle 2018-06-27 14:46:00 +02:00
Cruz Monrreal cc1e4f0ff8
Merge pull request #7205 from bcostm/fix_hash_data_alignment
STM32: Fix data alignment issue in HASH function for F2, F7, L4
2018-06-20 07:55:57 -05:00
Martin Kojtal c964f2ee66
Merge pull request #7226 from juhoeskeli/wise_1570_app_start
Make MTB_ADV_WISE_1570 respect MBED_APP_START & enable bootloader
2018-06-19 14:12:07 +02:00
Juho Eskeli 699601535e Make MTB_ADV_WISE_1570 respect MBED_APP_START & enable bootloader 2018-06-15 13:05:00 +03:00
bcostm b5a8dc513c fix hash alignment of F2, F7, L4 2018-06-13 11:51:24 +02:00
bcostm b087390a1a Remove HAL_TICK_DELAY (no more used) 2018-06-05 16:53:40 +02:00
Cruz Monrreal 07fb7c1adc
Merge pull request #6987 from jeromecoutant/PR_ADC
STM32 ADC update
2018-06-02 19:52:51 -05:00
Alan Chuang 7f4272d9a7 make uart console port configurable via mbed_app.json 2018-05-25 16:30:57 +08:00
jeromecoutant 7fd4203b58 STM32L4 ADC internal channels update 2018-05-22 13:18:25 +02:00
jeromecoutant b30f3abf11 STM32 PeripheralPins.c second update after review
genpinmap script version 1.1
2018-05-17 17:58:09 +02:00
jeromecoutant 3ac1855d93 STM32L4 DISCO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:05:14 +02:00
jeromecoutant 3e92ff1f85 STM32L4 NUCLEO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:04:41 +02:00
Cruz Monrreal e2567e5dad
Merge pull request #6599 from jeromecoutant/PR_WARNING
STM32 compilation warning issues
2018-04-16 10:41:36 -05:00
Paul Thompson 20f11bc13f Extend changes to other STM32 devices that have the PCD_WriteEmptyTxFifo() function 2018-04-13 05:27:03 -07:00
jeromecoutant 71d7d24bd6 STM32L4 : correct compilation warnings 2018-04-12 10:56:41 +02:00
Jimmy Brisson d374bb4a5a Correct armc6 detection logic 2018-04-05 15:13:52 -05:00
Cruz Monrreal 7c272fa3e8
Merge pull request #6412 from jeromecoutant/PR_L4_ADC
STM32L4 ADC correct internal channel management
2018-03-22 11:27:50 -05:00
Cruz Monrreal 04a3635eba
Merge pull request #6399 from jeromecoutant/PR_L4_TEMP
STM32L4 ADC Internal Channel : correct sampling time
2018-03-22 11:27:30 -05:00
jeromecoutant ef006931f8 STM32L4 ADC correct internal channel management 2018-03-21 10:57:57 +01:00
Cruz Monrreal 6cb6dd9e62
Merge pull request #6330 from bcostm/fix_pins_nucleo_l433rc_p
NUCLEO_L433RC_P: fix pins definitions
2018-03-20 14:56:05 -05:00
jeromecoutant 6c369d17aa STM32L4 ADC Internal Channel : correct sampling time 2018-03-20 13:15:17 +01:00
bcostm 64a824abd2 DISCO_L496AG: add system clock file (same as Nucleo) 2018-03-16 10:02:12 +01:00
bcostm ade8583044 DISCO_L496AG: add other pins related files 2018-03-16 10:02:11 +01:00
bcostm 63901a803c DISCO_L496AG: remove QSPI2
Base adress not found in registers map file but found in CubeMX xml file.
2018-03-16 10:02:11 +01:00
bcostm eab3e95158 DISCO_L496AG: add PeripheralPins.c 2018-03-16 10:02:11 +01:00
bcostm 8fe02803e1 NUCLEO_L433RC_P: fix LEDs pin assignment 2018-03-12 11:30:52 +01:00
adustm 67953251f9 Use official toolchain defines 2018-02-23 10:29:29 +01:00
adustm f551255ded Add support of separate memories for heap and stack region swith the use of TWO_RAM_REGIONS define 2018-02-22 17:37:34 +01:00
adustm 02b2b01a83 Change STM32L475/76/86 GCC_ARM linker files to have HEAP in SRAM1 and stack in SRAM2 (after the interrupt vector) 2018-02-22 17:36:27 +01:00
Cruz Monrreal 1c5c1c79d0
Merge pull request #6027 from ithinuel/fix-target-names-for-murata-abz-and-adv-wise-1510
rename MURATA type ABZ & WISE 1510 to their expected name
2018-02-07 20:06:50 -06:00
Cruz Monrreal 1ac115d794
Merge pull request #6013 from kivaisan/add-wise-1570
Add MTB_ADV_WISE_1570 target
2018-02-07 20:05:38 -06:00
Wilfried Chauveau 6c9fcf3dd8 rename MURATA type ABZ & WISE_1510 to their expected name 2018-02-06 21:23:37 +00:00
Kimmo Vaisanen 4dad23a6a3 Add WISE-1570 external pin names 2018-02-05 14:47:52 +02:00
Kimmo Vaisanen 41490f48d0 Add MTB_ADV_WISE_1570 target 2018-02-05 14:31:20 +02:00
bcostm 937db051da STM32L476/486: change SRAM config for IAR 2018-02-02 10:23:28 +01:00
Cruz Monrreal f907012e55
Merge pull request #5962 from bcostm/fix_usart_irq_index
STM32: Fix usart irq index
2018-01-31 12:16:17 -06:00
Wilfried Chauveau 3608627a48 fix a silent conflict with PR #5947 2018-01-31 00:48:40 +00:00
Cruz Monrreal b87e98c57b
Merge pull request #5904 from ithinuel/add-wise-1510
add support for STM32L443RC & WISE-1510
2018-01-30 15:01:00 -06:00
Cruz Monrreal fff6c75e28
Merge pull request #5936 from jeromecoutant/PR_WEAK_PINMAP
STM32 : set all PinMap structures as weak
2018-01-30 14:56:42 -06:00
Cruz Monrreal 10e67e659c
Merge pull request #5947 from jeromecoutant/PR_L4_PLUART
STM32L4 : add missing ST HAL UART functions
2018-01-30 14:46:15 -06:00
bcostm 84269c7ca2 STM32 serial: improve irq index management for L4 devices 2018-01-29 17:23:21 +01:00
jeromecoutant 8f647beacb STM32 : set all PinMap structures as weak
This allow custom overwrites
2018-01-29 09:26:49 +01:00