Cruz Monrreal
ea47342f81
Merge pull request #7214 from SenRamakri/sen_ErrorOptimAndConfig
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Error handling configuration updates and Optimization for exception handling
2018-06-25 10:10:49 -05:00
Deepika
bc65153a4d
Add names to idle/timer thread
2018-06-21 18:32:43 -05:00
ccli8
8071409963
Move RTX_NO_MULTITHREAD_CLIB from RTX_Config.h to mbed_rtx_conf.h
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This is to avoid change to RTX code base.
2018-06-21 09:57:21 +08:00
ccli8
f055c2a700
Add comment with RTX_NO_MULTITHREAD_CLIB movement
2018-06-21 09:54:47 +08:00
Senthil Ramakrishnan
baa44eb3f2
Limit error filename capture to 64 chars, wrapping tests with right configs and astyle fixes.
2018-06-20 11:56:32 -05:00
Senthil Ramakrishnan
dcdd616e6d
Update exception handling code to remove dedicated fault safe printfs and use mbed_error_printf to optimize memory usage.
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Dedicated safe printfs were originally developed to print data over serial with minimal resources. But this adds more code space, so we are switching to use mbed_error_printf.
2018-06-20 11:56:32 -05:00
ccli8
afc0a28cc5
Support thread-safety with ARMC6
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1. Define RTX_NO_MULTITHREAD_CLIB to provide Mbed-specific multi-thread support for ARM/ARMC6
2. All overridden _mutex_xxx functions are declared with __USED to avoid excluded by linker
NOTE: Microlib doesn't support multi-thread
2018-06-20 10:35:47 +08:00
Jan Jongboom
63d1684bbe
Spelling error in fault handler
2018-06-18 10:58:12 +08:00
Michael Coulter
3d3e89097d
Fixes for RZ_A1H issue 6543
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Removed debugging code, fixed errors indicated in the comments.
2018-06-11 13:30:17 -05:00
Cruz Monrreal
1fa333df82
Merge pull request #7032 from TomoYamanaka/feature-rtx_update
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Update cmsis/rtx for Cortex-A
2018-06-02 20:52:40 -05:00
Cruz Monrreal
f92c227558
Merge pull request #7027 from c1728p9/timer_fix
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Fix possible bug with SysTimer
2018-05-31 11:07:34 -05:00
Vladimir Umek
4251af0248
RTX5 (Cortex-A): exception handling restructured, post processing moved after context save.
2018-05-28 19:36:42 +09:00
Vladimir Umek
165c663871
RTX5: fixed nesting interrupt handling (Cortex-A)
2018-05-28 13:55:35 +09:00
Vladimir Umek
b6c4139328
RTX5: ignoring CPUID field in GIC implementation
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updated interrupt handler for GCC and IAR
2018-05-28 13:54:44 +09:00
Vladimir Umek
0226b11b67
RTX5: disabled OS Tick interrupt during post processing in IRQ handler for Cortex-A devices
2018-05-28 12:52:11 +09:00
Russ Butler
aa6b931698
Fix possible bug with SysTimer
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Ensure the SysTimer isn't added to the timer list twice by adding
an extra call to remove() inside suspend().
2018-05-27 13:15:00 -05:00
Bartek Szatkowski
a92ff94904
Fix rebase error
2018-05-25 12:20:10 -05:00
Bartek Szatkowski
9575dd26ec
Don't use tickless if LPTICKER is not present
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The current implementation of tickless requires LPTICKER to be present.
2018-05-25 12:20:09 -05:00
Cruz Monrreal
527f9a12fd
Merge pull request #6983 from SenRamakri/sen_ErrorHandling_Push2
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Standardized Error Handling and Error Codes
2018-05-24 10:57:00 -05:00
Martin Kojtal
d8cb72a0a2
Merge pull request #6273 from bulislaw/update_cmsis_5.3
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Update cmsis/rtx to version 5.3
2018-05-24 09:37:40 +02:00
Senthil Ramakrishnan
5ef6728c08
Splitting MBED_ERROR macros to support ones with/without error value argument
2018-05-23 12:21:28 -05:00
Senthil Ramakrishnan
693a6c40bb
Refactor error reporting
2018-05-23 12:21:11 -05:00
Senthil Ramakrishnan
d4fe75731d
Adding mbed prefixes to all macros and functions to avoid namespace conflicts
2018-05-23 12:21:10 -05:00
Senthil Ramakrishnan
147d9cac4e
Test application/cases optimization for some low memory targets, macro changes and test fixes
2018-05-23 12:21:10 -05:00
Senthil Ramakrishnan
cbfc06577b
Fixes to align with naming conventions
2018-05-23 12:21:09 -05:00
Senthil Ramakrishnan
92df68b1ea
Changed variable names for registers to avoid namespace conflicts, build fixes, macros and other fixes
2018-05-23 12:21:09 -05:00
Senthil Ramakrishnan
530e9d323f
Changed variable names for registers to avoid namespace conflicts and rtos disabled build fixes
2018-05-23 12:21:09 -05:00
Senthil Ramakrishnan
2e28dd95e1
Change set_error/set_error_fatal to warning/error, add itm support and other changes
2018-05-23 12:21:08 -05:00
Senthil Ramakrishnan
9041b475c6
Error handling/logging implementation and tests
2018-05-23 12:21:07 -05:00
Bartek Szatkowski
b4d5f0e10f
CMSIS: Move non-config includes behind PTIM ifdef
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That is to enabled integration with build-it-all Mbed OS type build
system.
Cherry-picked from CMSIS_5 repo: e8d0a476
2018-05-14 12:18:21 +01:00
Bartek Szatkowski
1752803626
CMSIS/RTX: Fix using FALSE/TRUE with preprocesor
2018-05-14 12:18:21 +01:00
Bartek Szatkowski
a1fb51c283
RTX5: uVisor: Remove static from svcRtxKernelUnlock/Lock to support uVisor
2018-05-14 12:18:21 +01:00
Jaeden Amero
2f7a841e0e
RTX5: uVisor: Defer to uVisor for SVCall priority
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Only set the SVCall priority if uVisor is not present. If uVisor is
present, keep using whatever priorities it has already set up.
2018-05-14 12:18:21 +01:00
Jaeden Amero
32d04a08d0
RTX5: uVisor: Add OsEventObserver
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Add the OsEventObserver mechanism. A client interested in receiving
notifications on certain OS events can register to receive notifications
with osRegisterForOsEvents. This is useful for clients like the secure
memory allocator, which observes thread switching events in order to
swap in and out different memory allocator objects.
2018-05-14 12:18:21 +01:00
Jaeden Amero
86b91beeca
RTX5: uVisor: Extend thread control block with context
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OsEventObserver objects expect a context to be maintained per thread on
their behalf. Add this context to the thread control block and extend
the thread creation functions with the ability to supply a context.
2018-05-14 12:18:21 +01:00
Jaeden Amero
c250369803
RTX5: uVisor: Use OsEventObserver
2018-05-14 12:18:21 +01:00
Jaeden Amero
73a957997f
RTX5: uVisor: Switch threads very carefully
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uVisor doesn't set the PSP of the target thread. The RTOS sets the PSP
of the target thread from the target thread's TCB. However, when
interrupts of higher priority than PendSV happen between the call to
uVisor to switch boxes, and the RTOS setting PSP, the uVisor vIRQ
interrupt handler will attempt to use an invalid PSP (the PSP from
before the box and thread switch). This leads to a crash. Make box and
thread switching atomic by disabling interrupts immediately before the
box switching until immediately after the new PSP is set.
2018-05-14 12:18:21 +01:00
Bartek Szatkowski
3f1ea4b9ee
CMSIS/RTX: Update idle handler and SysTick ops
2018-05-14 12:18:21 +01:00
deepikabhavnani
287121ffdc
CMSIS/RTX: Pre-processor defines used for assembly
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CMSIS repo does not support pre-processor defines, hence multiple assembly
files are added for secure/non-secure and floating point tools.
Mbed OS tools support assembly file pre-processing, but the build system
does not support multiple assembly files for each target, hence updating
the assembly files.
2018-05-14 12:18:20 +01:00
Bartek Szatkowski
b88254809e
CMSIS/RTX: Allow overwriting mutex ops for ARMC
2018-05-14 12:18:20 +01:00
Bartek Szatkowski
cc2e0517e1
CMSIS/RTX: Patch RTX so irq_cm4f.s files work with no FPU targets
2018-05-14 12:18:20 +01:00
Bartek Szatkowski
4360b7bbf8
CMSIS/RTX: Patch RTX4 to preserve osThreadDef compatibility
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mbed OS used older RTX4 version and with osThreadDef accepting only 3
parameters, to preserve compatibility we hardcode the 'instances'
parameter to 1.
(cherry picked from commit 428acae1b2ac15c3ad523e8d40755a9301220822)
2018-05-14 12:18:20 +01:00
Bartek Szatkowski
8afbd66763
[CMSIS_5]: Updated to 49ac527a
2018-05-14 12:18:20 +01:00
deepikabhavnani
97c88188d0
Cleanup
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1. Enable watermark to get stack space information
2. Restructured code
3. Throw error if MBED_THREAD_STATS_ENABLED is not set
4. Astyle changes
2018-05-11 10:06:44 -05:00
Cruz Monrreal
ab7a856657
Merge pull request #6784 from deepikabhavnani/mbed_stats_fix
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Add common define MBED_ALL_STATS_ENABLED to enable all statistics
2018-05-10 23:25:23 -05:00
deepikabhavnani
52c33b5494
Add stats header file to mbed.h
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All API header files should be part of mbed.h
2018-05-09 10:24:28 -05:00
Cruz Monrreal
53aa1b04ab
Merge pull request #6654 from kjbracey-arm/fault_cr
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Add missing carriage returns to fault handler
2018-05-07 10:41:40 -05:00
ccli8
7b94d4dc32
Add MBED_CONF_APP_TIMER/IDLE_THREAD_STACK_SIZE to configure timer/idle thread stack size by application
2018-05-03 09:46:57 +08:00
ccli8
285bb87fe9
Change back default size of timer thread stack
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Configuration for changing this size is kept.
2018-05-03 09:46:56 +08:00
ccli8
eecdd3834e
Enlarge timer thread stack size for Cortex-M23/M33
2018-05-03 09:46:55 +08:00