* Modify compilation API to provide a list of paths to exclude from the build.
* `_exclude_files_from_build` becomes a static method
* Replace ternary expression with simple `if/else` statement
* Make unit test case for dirs exclusion independent of system files
* Fix rtos include path in NRFCordioHCIDriver
* Flatten USB driver directory structure
* Add missing include for us_ticker
* Add more missing includes for us_ticker
* Fix mbed_hal_fpga_ci_test_shield/uart test
* Fix bare-metal build
* Fix Watchdog UNITTEST
* Fix Mbed OS 2 build for Public/Internal headers relocating
Change the heuristic for selection of CMSE in the tools python, so that
a non-TrustZone ARMv8 build can happen.
Ideally we would have more direct flagging in the targets, but this
refines the heuristic so the necessary behaviour can be easily
achieved.
* DOMAIN_NS=1 is based purely on the `-NS` suffix on the core name.
* Enabling CMSE in the compiler and outputting a secure import library
is now enabled when the core doesn't have an `-NS` suffix by either
the target label `TFM` being present or the flag `trustzone` being set.
This covers the existing ARMv8-M behaviour - TF-M builds have the TFM
label, as per its documentation; M2351 secure builds have no explicit
flagging, so we ensure that the M2351_NS target has the trustzone flag
set, and the out-of-tree secure target inherits that.
* For ARMC6, core types `Cortex-M4` and `Cortex-M7` did not explicitly
add `--fpu=none`, so it defaulted to assuming FPU present. This would
cause a compilation error if the target's cmsis.h had `__FPU_PRESENT`
defined to 0.
* For GCC, `Cortex-M33FE` did not include `+dsp` in the architecture
selection.
* For ARMC5 and ARMC6, `Cortex-M0+` did not pass `M0plus` to the
non-Clang tools.
The sct file path generated in the online compiler
is incorrect. Fix that by changing the correct_scatter_shebang
API to accept a FileRef object instead and use the path.
This change should go with change in online compiler that removes
the override for correct_scatter_shebang.
1. Fix MBED_RAM_START/MBED_RAM_SIZE are not generated when there are
target.mbed_ram_start/target.mbed_ram_size overrides
2. Fix MBED_RAM_START/MBED_RAM_SIZE are duplicated.
There are two new functions: get_valid_toolchain_names and
find_valid_toolchain. These functions are used to figure out if a
fallback is possible and necessary. find_valid_toolchain is expected to
be used by the front-end scripts.
get_toolchain_name was updated with some different logic and comments.
On Windows 7 using --preproc option in ARMC6 assembler doesn't work
when -MD option is also specified. Compiler creates incorrect filename for
dependency file and compilation files.
To workaround this issue, this change returns to using a temporary file and
separately calling preprocessor and assembler (as in a case of ARMC5).
Added WiFi_Bt CM4 PSA target in mbedos json
Added SPE-NSPE mailbox initialization for CM4 SystemInit
Made similar to FUTURE_SEQUANA configurations
Copied FUTURE_SEQUANA CM0 SPM part for WiFi_Bt smoke test
Added CY8CKIT_062_WIFI_BT_M0 and CY8CKIT_062_WIFI_BT_M0_PSA targets
Sorted files for new CY8CKIT_062_WIFI_BT_M0 and CY8CKIT_062_WIFI_BT_M0_PSA targets
Copied files for CY8CKIT_062_WIFI_BT_M0_PSA from FUTURE_SEQUANA
Copied and updated cm0p start files
Corrected according to FUTURE_SEQUANA
Changes to M0 startup files to have SPM started
Fixed implicit declaration warning
Commented interrupts enabling according to FUTURE_SEQUANA flow
Updated prebuild spm_smore CM0 hex for CM4 target
Turned on greentea environment
Used special memory region for common CM0/CM4 data
Updated prebuild CM0 SPM hex
Placed shared memory region for flash operations into SPM shared memory region
Updated cyprotection code and configuration
Start address of protected regions is set by a defined number from target.json
Added masters pcMask configuration
Added support for PSA target to WIFI_BT board
Enabled resources protection for SPM
Aligned RAM usage according to Cypress FlashBoot and CyBootloader
alligned protection config
Added CYW943012P6EVB_01_M0 target
Enlarged heap size, remobed nv_seed
Added heap reservation in linker script from mbed-os
Removed heap size definition
turned on nv_seed config
Removed nv_seed macros
Enabled protection for PSoC6 CM0
Added PSoC6 CM0 PSA readme
Enabled mbed_hal-spm test
Enabled nv_seed and removed unneeded ipc config define
Added SPDX string to feature_ble cypress target files
Removed unneeded supported_toolchains lines for Cypress targets
Disabled protection settings
Corrected flash initialization for PSoC6 CM0 PSA
Changed PSoC6 IPC6 protection for flash
Enabled special flash initialization and enabled protection settings
Updated and added new prebuild PSoC6 CM0 PSA hex files
Disabled HW TRNG and CRC for PSoC6 CM4 PSA target
Added missing const to allow types to match
Updated PSoC6 WIFI_BT_PSA prebuilt directory
Moved PSoC6 shared section usage area definition to begin of ld
Added initial ARM_STD linker and startup files for PSoC6 CM0
Added initial IAR linker and startup files for PSoC6 CM0
Added defines to disable some SPM protection settings for PSoC64
Moved Flash function variables into separate memory region
Added defines for new Public area definition
Updated PSoC6 CM0_PSA hex-files
Mark Edgeworth
Martin Kojtal
Lin Gao
jh228
Hugues Kamba
George Psimenos
Kevin Bracey
Anna Bridge
Brian Daniels
Alexander Zilberkant
Oren Cohen
ccli8
Naveen Kaje
Jimmy Brisson
Cruz Monrreal
Leszek Rusinowicz
Oleg Kapshii