The sct file path generated in the online compiler
is incorrect. Fix that by changing the correct_scatter_shebang
API to accept a FileRef object instead and use the path.
This change should go with change in online compiler that removes
the override for correct_scatter_shebang.
1. Fix MBED_RAM_START/MBED_RAM_SIZE are not generated when there are
target.mbed_ram_start/target.mbed_ram_size overrides
2. Fix MBED_RAM_START/MBED_RAM_SIZE are duplicated.
There are two new functions: get_valid_toolchain_names and
find_valid_toolchain. These functions are used to figure out if a
fallback is possible and necessary. find_valid_toolchain is expected to
be used by the front-end scripts.
get_toolchain_name was updated with some different logic and comments.
On Windows 7 using --preproc option in ARMC6 assembler doesn't work
when -MD option is also specified. Compiler creates incorrect filename for
dependency file and compilation files.
To workaround this issue, this change returns to using a temporary file and
separately calling preprocessor and assembler (as in a case of ARMC5).
Added WiFi_Bt CM4 PSA target in mbedos json
Added SPE-NSPE mailbox initialization for CM4 SystemInit
Made similar to FUTURE_SEQUANA configurations
Copied FUTURE_SEQUANA CM0 SPM part for WiFi_Bt smoke test
Added CY8CKIT_062_WIFI_BT_M0 and CY8CKIT_062_WIFI_BT_M0_PSA targets
Sorted files for new CY8CKIT_062_WIFI_BT_M0 and CY8CKIT_062_WIFI_BT_M0_PSA targets
Copied files for CY8CKIT_062_WIFI_BT_M0_PSA from FUTURE_SEQUANA
Copied and updated cm0p start files
Corrected according to FUTURE_SEQUANA
Changes to M0 startup files to have SPM started
Fixed implicit declaration warning
Commented interrupts enabling according to FUTURE_SEQUANA flow
Updated prebuild spm_smore CM0 hex for CM4 target
Turned on greentea environment
Used special memory region for common CM0/CM4 data
Updated prebuild CM0 SPM hex
Placed shared memory region for flash operations into SPM shared memory region
Updated cyprotection code and configuration
Start address of protected regions is set by a defined number from target.json
Added masters pcMask configuration
Added support for PSA target to WIFI_BT board
Enabled resources protection for SPM
Aligned RAM usage according to Cypress FlashBoot and CyBootloader
alligned protection config
Added CYW943012P6EVB_01_M0 target
Enlarged heap size, remobed nv_seed
Added heap reservation in linker script from mbed-os
Removed heap size definition
turned on nv_seed config
Removed nv_seed macros
Enabled protection for PSoC6 CM0
Added PSoC6 CM0 PSA readme
Enabled mbed_hal-spm test
Enabled nv_seed and removed unneeded ipc config define
Added SPDX string to feature_ble cypress target files
Removed unneeded supported_toolchains lines for Cypress targets
Disabled protection settings
Corrected flash initialization for PSoC6 CM0 PSA
Changed PSoC6 IPC6 protection for flash
Enabled special flash initialization and enabled protection settings
Updated and added new prebuild PSoC6 CM0 PSA hex files
Disabled HW TRNG and CRC for PSoC6 CM4 PSA target
Added missing const to allow types to match
Updated PSoC6 WIFI_BT_PSA prebuilt directory
Moved PSoC6 shared section usage area definition to begin of ld
Added initial ARM_STD linker and startup files for PSoC6 CM0
Added initial IAR linker and startup files for PSoC6 CM0
Added defines to disable some SPM protection settings for PSoC64
Moved Flash function variables into separate memory region
Added defines for new Public area definition
Updated PSoC6 CM0_PSA hex-files
Priously, post-bulid was run before the merge from managed bootloader mode.
This renders many post-build scripts less than useful, as most of them
compute a digest of the ROM image generated in a build.
This reorders the post-build scripts to come after the managed bootloader
mode so that post-build script digests are useful again.
The "hook tools" were capable of hooking into many commands run by the build system.
To my knowlage, the only hook is the "post-build-hook". The post build hook could be
easier to reason about if the implementation is specialized for just post-build
hooking.
This commit make it much easier to point out where post build hooks are called by
making the call explicit.
Support the requirement where bootloader can be in chunks and enable
placing the application at a particular offset specified by config.
With FEATURE_BOOTLOADER support, the bootloader can be placed at a
high address. Add support to the tools so that application can be
placed in the available space before the beginning of the bootloader.
As per the IAR Development guide, below options for CPU are valid
1. Cortex-M33
2. Cortex-M33.no_dsp (core without integer DSP extension)
3. Cortex-M33.fp (floating-point unit with support for single precision)
4. Cortex-M33.no_se (core without support for TrustZone)
5. Cortex-M4
6. Cortex-M4F
7. Cortex-M7
8. Cortex-M7.fp.dp (floating-point unit with support for double precision)
9. Cortex-M7.fp.sp (floating-point unit with support for single precision)
Below are the options read from the toolchains/arm
armclang --target=arm-arm-none-eabi -mcpu=list
The following arguments to option 'mcpu' can be selected:
-mcpu=cortex-m0
-mcpu=cortex-m0plus
-mcpu=cortex-m1
-mcpu=cortex-m3
-mcpu=cortex-m4
-mcpu=cortex-m7
-mcpu=cortex-m23
-mcpu=cortex-m33
...
armlink --cpu=list
The following arguments to option 'cpu' can be selected:
--cpu=Cortex-M0
--cpu=Cortex-M0plus
--cpu=Cortex-M1
--cpu=Cortex-M1.os_extension
--cpu=Cortex-M1.no_os_extension
--cpu=Cortex-M4
--cpu=Cortex-M4.no_fp
--cpu=Cortex-M7
--cpu=Cortex-M7.fp.sp
--cpu=Cortex-M7.no_fp
--cpu=Cortex-M23
--cpu=Cortex-M33
--cpu=Cortex-M33.no_fp
--cpu=Cortex-M33.no_dsp
--cpu=Cortex-M33.no_dsp.no_fp
...
armclang --target=arm-arm-none-eabi -mfpu=list
The following arguments to option 'mfpu' can be selected:
-mfpu=fpv4-sp-d16
-mfpu=fpv5-sp-d16
-mfpu=fpv5-d16
...
For binary compatibility with ARMC5, use the hard ABI variant whenever
we have FP hardware - this is ARMC5's default behaviour, which we do not
override.
Cortex-M4F was already using hard; this brings M7F and M33F into line.
### Description
PR #8607 will cause problems for the NRF52832 and the NRF52840
in the online compiler starting with 5.10.2. This PR prevents this problem
by using a toggle in `targets.json` to enable these new defines for every
target except for the NRF52832 and NRF52840.
### Pull request type
[x] Fix
[ ] Refactor
[ ] Target update
[ ] Functionality change
[ ] Docs update
[ ] Test update
[ ] Breaking change
### Description
This PR moves the old memap file handling required for differential
memap from within memap to the toolchain object. This has the
advantage that we can do the `mv <app>.map <app>.map.old` the moment
before it is overwritten by the linker. This should allow multiple
reruns of memap without modifying your build directory.
### Pull request type
[ ] Fix
[x] Refactor
[ ] Target update
[ ] Functionality change
[ ] Docs update
[ ] Test update
[ ] Breaking change
The 'archive' method of the toolchain class 'ARM' expects that self.ar
is a string, but the constructor of the class 'ARMC6' initializes it
with a list. This patch fixes the issue.
Moved "bootloader_not_supported" check to where it was and handle that exception at only one place.
Removed ram/rom size info for realtek from targets.json. THe info we have is not correct.
was Not handling config exceptions from regions and ram_regions property
adding rom-ram info for REALTEK_RTL8195AM
1. Adding SRAM in available ram
2. If the target doesn't exist in cmsis but targets.json, handle accordingly and raise apt exceptions where needed.
3. If no sram is provided, raise exception
### Description
The prior fix made the assumption that you wanted to compute all of the
parents for a give header file going all the way up the path. This is
not true: you probably want to stop when the project stops. We already
keep track of a virtual name within the project, so instead, we compute
parents of the name, and generate the actual location of these files in
your FS as the path. This makes the solution robust offline and online
(I tested it with my local copy of os.mbed.com)
### Pull request type
[x] Fix
[ ] Refactor
[ ] Target update
[ ] Functionality change
[ ] Docs update
[ ] Test update
[ ] Breaking change
RAM/ROM memory data of target is required for statistics and linker
files, goal here is to fetch maximum 4 RAM/ROM regions from CMSIS pack
and make them available for C/C++/Linker flags as defines
1. In drivers/Timer.cpp make sure that hardware timer is initialized outside of critical section.
This is because on PSoC 6 hardware resources are shared between both cores
and we have to make sure that the other core is not already using a particular resource.
This mechanism is based on interprocessor communication taht cannot be handled iside of
critical section.
2. Added support for post-binary hook function for PSoC 6 targets, so the hex image for M0+ CPU core
can be merged with M4 core image for the final image.
3. Added possibility to use hook function from exportes, so the M0+ hex image could be included
in the generated project.
4. Included hex images in the build dependency list, so the update of image is catched by the
build process.
ccli8
Brian Daniels
Naveen Kaje
Jimmy Brisson
Cruz Monrreal
Martin Kojtal
Leszek Rusinowicz
Oleg Kapshii
Senthil Ramakrishnan
deepikabhavnani
Oren Cohen
Nir Sonnenschein
Michael Schwarcz
Kevin Bracey
Mahesh Mahadevan
Anna Bridge
Mikhail Maltsev
Aashish chaddha
jeromecoutant
Mo Chen