Jimmy Brisson
d374bb4a5a
Correct armc6 detection logic
2018-04-05 15:13:52 -05:00
Wilfried Chauveau
c31676306a
switch to stm32l151cb-a & work around flash size field width.
2018-03-26 18:00:18 +01:00
Wilfried Chauveau
758f3b2dbd
add support for the RAK811
2018-03-23 10:19:49 +00:00
bcostm
f59f7581fb
DISCO_L496AG: add entry in mbed_rtx.h
2018-03-16 10:02:12 +01:00
daid
62599a97f7
Add support for STEVAL-3DP001V1 board, which has an STM32F401VE chip. This support is based on the NUCLEO-F401RE board. Which has the same amount of flash/ram but less pins available on the chip.
2018-02-28 09:37:39 +01:00
adustm
d1e6e8f128
Allow jenkins script to pass
2018-02-23 17:40:09 +01:00
adustm
28a43b55e7
Add initial_sp value for STM32L476 and STM32L486 devices
2018-02-23 10:44:14 +01:00
adustm
67953251f9
Use official toolchain defines
2018-02-23 10:29:29 +01:00
adustm
815be94197
Add defined for GCC_ARM to pass heap and stack tests
2018-02-22 17:38:26 +01:00
Cruz Monrreal
097966b8c7
Merge pull request #5905 from ithinuel/add-CMWX1ZZABZ-078-support
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add support for the murata's module CMWX1ZZABZ-078 based on STM32L0
2018-01-31 12:14:29 -06:00
Wilfried Chauveau
e6b19d838c
add support for STM32L443RC & WISE-1510
2018-01-26 17:06:39 +00:00
Wilfried Chauveau
f8e88d7443
add support for the murata's module based on STM32L0
2018-01-26 12:26:25 +00:00
Helmut Tschemernjak
66a1967fb4
Added TARGET_STM32L433RC stack size define into mbed_rtx.h
2017-11-27 15:15:17 +01:00
Jimmy Brisson
c40b642455
Merge pull request #4650 from catiedev/master
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NUCLEO_L496ZG: Add new Platform
2017-11-02 10:36:23 -05:00
Roberto Spelta
c5e6689e82
added TARGET_STM32L476JG define in mbed_rtx.h
2017-10-10 13:58:41 +02:00
Pierre-Marie Ancele
6d3e17cb3c
add compatibility with STM32L496xG MCUs
2017-10-06 11:35:16 +02:00
jeromecoutant
8b0ee27819
STM32L432KC: increase RAM size from 48k to 64k
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WARNING: you have to update ST-Link FW to V2J29M18
http://www.st.com/en/development-tools/stsw-link007.html
2017-09-19 15:11:23 +02:00
Pavel Slama
2bc224bc2f
target BLUEPILL_F106C8 compile fix
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INITIAL_SP missing when compile, here is a quick fix
2017-08-13 15:32:11 +02:00
bcostm
bd8fd08fe4
STM: cleanup mbed_rtx.h file
2017-07-03 11:16:35 +02:00
arostm
781db4f265
DISCO_F413ZH: add some files and modification (targets.json, rtx...)
2017-06-22 09:16:32 +02:00
bcostm
374f71ca66
Add DISCO_L475VG_IOT in mbed_rtx.h
2017-06-12 17:03:12 +02:00
Bartek Szatkowski
85cc9c8381
Remove deprecated RTX4 config options
2017-05-30 18:55:55 +01:00
Bartek Szatkowski
b793a3fb89
Update codebase for CMSIS5/RTX5
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Update all of mbed-os to use RTX5.
2017-05-30 18:55:52 +01:00
Alexis ROCHE
19109d9404
DISCO_L072CZ: Modifications and verifications to build
2017-05-02 11:50:24 +02:00
Rob Meades
7387c09872
Introducing UBLOX_C030 platform.
2017-04-04 16:22:50 +01:00
Sam Grove
38411e917f
Merge pull request #3366 from bcostm/dev_nucleo_f412zg
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NUCLEO_F412ZG - Add new platform
2016-12-15 10:19:51 -06:00
bcostm
49755981dd
Add this platform in mbed_rtx.h file
2016-12-08 15:57:05 +01:00
Laurent MEUNIER
8e11541a74
STM32 NUCLEO-L152RE Update system core clock to 32MHz
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Even when HSE is used, it is possible to get a 32MHz system clock
8MHz x PLLMUL=12 % PLLDIV=2 = 32MHz
And we still get 48MHz USB clock:
8MHz x PLLMUL=12 % 2 = 48MHz
This allows to take full benefit of the CPU capability.
2016-12-06 11:45:19 +01:00
adustm
ff4fca6747
ADD NEW TARGET : NUCLEO_F756ZG, based on existing NUCLEO_F746ZG
2016-10-13 18:29:09 +02:00
adustm
78fd559d11
ADD NEW TARGET : NUCLEO_L486RG, based on existing NUCLEO_L476RG
2016-10-13 18:29:09 +02:00
adustm
a07a271fe5
ADD NEW TARGET : NUCLEO_F439ZI, based on existing NUCLEO_F429ZI
2016-10-13 18:29:09 +02:00
Christopher Haster
26ced98734
restructure - Restructured cmsis directory
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targets/cmsis -> cmsis
targets/cmsis/TARGET_* -> targets/TARGET_*/device
targets/cmsis/TARGET_*/mbed_rtx.h -> targets/TARGET_*/mbed_rtx.h
2016-10-04 17:51:44 -05:00