TIMER2_7_IRQ is shared among several timer sources, including
us_ticker. Raising TIMER2_7_IRQ pending bit will trigger the timer
interrupt, but the timer interrupt handler will not know which timer
source this interrupt is for. This patch sets timer load value to one
tick and force us_ticker to fire almost "immediately".
TIMER2_7_IRQ is handled through a common interrupt handler, and
is automatically cleared. Therefore, there is no need to clear IRQ.
The underlying timer HAL treats load value as micro-seconds and does
conversion internally. Therefore, simply pass micro-seconds to timer
HAL without converting to tick first.
Signed-off-by: Tony Wu <tung7970@gmail.com>
Cribbed from 4bf42f2e20
I'm not sure if if there are any copyright issues here with what is
effectively a set of config files. A few folks have been bugging me (and
the redbear folks) for these changes, so I wanted them somewhere
centralized.
Updated NanostackRfPhyEfr32 with a receive queue.
Cleaned up debug messages, re-added to non-threaded calls.
Removed debug print override
Removed tr_debug override
Removed normal-operation prints that could have timing implications if enabled
Removed dead NVIC code (and a couple of dead log outputs)
Various RTOS classes were storing their CMSIS-RTOS creation attribute
structure as a member, when it's not required after construction. Reduce
memory by eliminating this member.
The computation of the sector number in GetSector for 2MB flash sizes
consists in adding an extra constant for 2MB dual bank (12 as in
ADDR_FLASH_SECTOR_12), then going through the same address check as if it
was an address of the first sector.
That means that we need to modify tmp and address as if it was a first bank
address, which we're doing here by sub_stracting 0x100000 delta.
Changing this to none as result of build failures. Wifi needs own configuration
per an enviroment. By setting this to none, net tests are skipped for Realtek
platform.
Three main issues:
1) The 0x13 special case section in write data in ncs36510_i2c.c didn't have a write++ command.
2) In the same write function, the WDAT8 command was put before the 0x13 section and this is not correct
3) Needed to add wait_us(0) before and after the register writes for apparent clock domain crossing delay times until registers are stable in HW
There were also a handful of other tweaks related to general code maintenance and moving some status register checks to the proper locations.
Tony Wu
johnny
Dave Wu
Andrea Corrado
Jammu Kekkonen
Kevin Gilbert
Chris Snow
gorazd
Maciej Bocianski
Senthil Ramakrishnan
Martin Kojtal
Ryan Kurte
Boting Ren
jeromecoutant
Filip Jagodzinski
Kevin Bracey
Laurent MEUNIER
Marcus Chang
danclement
Anna Bridge
Shrikant Tudavekar
Vincent Coubard
Amanda Butler