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4 Commits (3baeb8a8a7969e474860def40e389fb41b5ffe86)

Author SHA1 Message Date
Russ Butler cf5cd7dfd4 Ensure isr cannot occur after NVIC_DisableIRQ 
Add data and instruction synchronization barriers to prevent
interrupts from occurring after NVIC_DisableIRQ is called. This
is a backport of changes made in CMSIS_5.
 2016-11-17 12:26:45 -06:00
tomoyuki yamanaka 4b3ce8e568 Add API which cleans Dcache in IAR compiler. 
In "core_caFunc.c" Renesas added the following API of IAR compiler version.
- __v7_clean_dcache_all()
- __v7_clean_inv_dcache_all()
 2016-11-14 20:47:50 +09:00
Steven Cooreman 7c0dd13bc6 [Silicon Labs][CMSIS] Patch CMSIS v4.2+ macros into mbed 
The current version of cmsis shipping with mbed does not provide the __IOM and friends macros that became standard with CMSIS 4.2+. Patching these into CMSIS to allow vendors to continue updating their support libraries, awaiting a full CMSIS update in mbed (which is past due now).
 2016-10-24 18:28:44 +02:00
Christopher Haster 26ced98734 restructure - Restructured cmsis directory 
targets/cmsis -> cmsis
targets/cmsis/TARGET_* -> targets/TARGET_*/device
targets/cmsis/TARGET_*/mbed_rtx.h -> targets/TARGET_*/mbed_rtx.h
 2016-10-04 17:51:44 -05:00